JPH0667204B2 - Power converter - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a power converter (inverter) for converting direct current into alternating current, and in particular, a serial connection type power converter capable of obtaining a high voltage output compared with the withstand voltage of an element used. It is about.

[Prior Art] FIG. 3A is a block diagram showing a conventional power converter (inverter) disclosed in, for example, Japanese Patent Laid-Open No. 57-80260, in which (1) is a DC power source, 2a) to (2d) are connected in series and constitute a semiconductor switch,
(3a) to (3d) are diodes connected in antiparallel to the transistors (2a) to (2d), and (4) is a transistor (2a) to
A capacitor to limit the voltage applied to (2d),
(5) is a load, (6) is an auxiliary power source for initially charging the capacitor (4), (7) is a transformer for insulation, (8)
a) and (8b) are rectifying diodes, (9a) and (9
b) is a drive signal generation circuit for driving the transistors (2a) to (2d), (10a) and (10b) are drive signals,
(10c) and (10d) are drive signals obtained by logically inverting the drive signals (10a) and (10b).

The conventional power converter is configured as described above, and first, the capacitor (4) receives the voltage E of the DC power supply (1) from the auxiliary power supply (6) through the transformer (7) and the rectifying diode (8a). At half the value (E / 2), it is charged to the polarity shown.
From the drive signal generation circuit (9a), a drive signal pulse train (10a) and a logically inverted drive signal pulse train (10c) as shown in FIGS. 3 (B), (a) and (b) are respectively provided in the transistor (2a). )-(2d) to the control electrodes.
For example, if the transistors (2c) and (2d) become conductive, the DC power supply voltage E is applied to the two transistors (2a) and (2b). At this time, since the capacitor (4) is charged to the voltage of E / 2, even if there are variations in the switching characteristics and static characteristics of the above two transistors, the voltage is divided into E / 2 each. Conversely, the transistor (2
Similarly, even if a) and (2b) are turned on, the transistor (2c)
And (2d) are divided by E / 2. As a result, the breakdown voltage of the transistor used can be surely reduced to 1/2. At this time, the AC output terminal (21) has two
With two levels, a waveform similar to the drive signal (10a) can be obtained. Similarly, for the other phases, the pulse train (10b) of the drive signal as shown in FIGS. 3 (B), (c) and (d) from the drive signal generation circuit (9b) and the drive signal whose logic is inverted. Pulse train (10d) is applied to transistors (2e) and (2f) and (2g) and (2h) not shown respectively, and as a result, the output (load) voltage is shown in FIG. 3 (B).
Waveforms at three levels E, zero, and -E as shown in (e) are obtained.

[Problems to be Solved by the Invention] In the conventional power conversion device as described above, the output of each series arm has a pulse width modulation waveform of two levels and the interphase (line-to-line) output has a three-level pulse width modulation waveform. There was a problem that it contained harmonic components.

The present invention has been made to solve such a problem, and is capable of directly utilizing the voltage dividing function of the elements of the conventional power converter and reducing the harmonic component of the output voltage. Aim to get.

[Means for Solving the Problems] A power conversion device according to the present invention includes at least one series connection body including four semiconductor switches connected in series and diodes connected in anti-parallel to each of the semiconductor switches. Connected between the positive and negative terminals of a DC power supply, and between the connection point of the first semiconductor switch and the second semiconductor switch, and the connection point of the third semiconductor switch and the fourth semiconductor switch, which form each of the above-mentioned series connection bodies. In a power conversion device in which a capacitor is connected and a load is connected to a connection point between the second semiconductor switch and the third semiconductor switch, a signal wave generating unit that generates a signal wave, a carrier wave generating unit that generates a carrier wave,
A first drive signal generating means for modulating the carrier wave with the signal wave to generate a first drive signal and a second drive signal; and a second drive signal generating means.
Drive signal generating means for alternately connecting the first semiconductor switch and the fourth semiconductor switch forming the series connection body by the first drive signal, and the second drive signal for the second semiconductor switch. The power supply from the DC power supply to the load is controlled by alternately connecting the second semiconductor switch and the third semiconductor switch.

[Operation] In the present invention, the series connection body including four semiconductor switches is driven by the first drive signal and the second drive signal to output the DC power supply voltage.
Mode in which the semiconductor switch and the second semiconductor switch are conductive, the first semiconductor switch and the third semiconductor switch that output an intermediate voltage
Of the semiconductor switch or the second semiconductor switch and the fourth semiconductor switch are conducted, and the mode in which the third semiconductor switch and the fourth semiconductor switch which output zero voltage are conducted are achieved, and the harmonic component of the output voltage is achieved. Can be reduced.

[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention.
(1) to (7), (8a) and (8b) are exactly the same as the above conventional device. However, with the load of (5),
The illustration of the initial charging circuit for the capacitor (4) including (6), (7), (8a) and (8b) is omitted.

(9a) and (9b) are drive signal generating means, and a comparator is used in this embodiment, and their outputs are different from those of the conventional example shown in FIG. ) And (2b) and (2c) control electrodes.

(11) is a signal wave generation circuit that generates a pattern signal (sine wave) corresponding to the fundamental wave component of the load (output) voltage (not shown), (12) is a carrier wave generation circuit, and (13) and (14) are DC Voltage detection means for the power supply (1) and the capacitor (4), (15) a voltage control circuit for integrating and amplifying the difference between the voltage of 1/2 of the DC power supply voltage and the capacitor voltage, and (16) for the load (output) current. Polarity detection means for detecting polarity, (17)
Is a switch for switching the polarity of the output bias of the carrier wave generation circuit (12), (18) is a switch operation circuit for operating the switch (17) according to the polarity of the load current, (19) is a bias signal addition circuit, and (20) is A sign inversion circuit for a carrier wave (triangular wave), and (21) is an AC output terminal.

In the power converter configured as described above, the capacitor (4) has a voltage (E / 2) that is half that of the DC power supply (1) due to the initial charging circuit (not shown) as in the conventional device of FIG. 3 (A). Is charged to the polarity shown. The signal wave generation circuit (11) generates a sine wave (signal wave) corresponding to the fundamental wave component of the output voltage generated at the AC output terminal (21) as shown in FIGS. The triangular wave (carrier wave) shown in FIGS. 2 (A) and (a) generated from the generation circuit (12) is input to the comparator (9a), and the comparator (9a) outputs the pulse shown in FIGS. 2 (A) and (b). A width-modulated drive signal (pulse train) (10a) and its logically inverted drive signal (10c) are generated to generate a transistor (2
Drive a) and (2d). Meanwhile, the comparator (9
In b), the pulse width modulated drive signal (pulse train) (10b) and its logic inversion shown in FIGS. 2 (A) and 2 (c) by the sine wave and the triangular wave whose sign is inverted by the sign inversion circuit (20). The drive signal (10d) is generated to drive the transistors (2b) and (2c). As a result, the AC output terminal (21) is at the potential of the DC power supply voltage E when the transistors (2a) and (2b) are turned on at the same time.
If b) and (2d) or (2a) and (2c) conduct, the capacitor voltage or the voltage difference between the DC power supply voltage and the capacitor voltage (E / 2 if the capacitor voltage is E / 2)
In addition, if the transistors (2c) and (2d) become conductive, the potential becomes zero, and as shown in FIGS. 2A and 2D, a 3-level pulse width modulation waveform having a small harmonic content is obtained.

However, at this time, if the capacitor voltage is E / 2, the voltage of E / 2 is applied to the non-conductive transistor. Further, at this time, in the mode of the intermediate potential (E / 2), the load current flows through the capacitor (4). That is, if the load current is positive, the transistor (2a) is conducting, and (2b) is non-conducting (at this time, the drive signal is applied to the transistor (2c)), the positive side of the DC power source (1) → transistor A loop is formed from (2a) → capacitor (4) → diode (3c) → load and the capacitor is charged by the load current (called charging mode A). Similarly, if the load current is positive, the transistor (2a) is non-conductive, and (2b) is conductive (at this time, the drive signal is also applied to the transistor (2d)), the negative side of the DC power supply (1) → diode (3d) → capacitor (4) → transistor (2b) → a loop to the load is formed and the capacitor is discharged to the load (referred to as discharge mode B). If the load current becomes negative, the charge mode A
And the charge / discharge relationship of the capacitor (4) in the discharge mode B is opposite. As a result, as shown in FIGS. 2A and 2E, the charging period and the discharging period of the capacitor (4) occur alternately, and the charging / discharging amount is balanced in one cycle of normal output. Therefore, the fluctuation range of the capacitor voltage can be relatively small. However, when asymmetry occurs due to transient conditions or variations in transistor characteristics, the charge / discharge balance is lost and the capacitor voltage tries to change, but this is detected by the voltage detection means (14) and the voltage control circuit (15) In (1), the deviation of the voltage value of the DC power supply (1) detected by the voltage detection means (13) from 1/2 is integrated and amplified, and added to the triangular wave signal as a DC bias by the bias addition circuit (19).
At this time, the polarity detection means (16) detects the polarity of the load (output) current, and the switch operation circuit (18) is detected according to the polarity.
Switches the switch (17) to switch the voltage control circuit (15).
Switches the polarity of the bias signal from. Fig. 2 (B)
Shows the case where the voltage of the capacitor (4) becomes larger than 1/2 of the DC power supply voltage E. The voltage control circuit (1
5) outputs a positive control signal, a positive bias is added to the triangular wave during the period when the load current is positive, and a negative bias is added to the triangular wave during the period when the load current is negative, as compared to FIG. 2 (A) (e). (D) As shown in (d), the charge mode A of the capacitor (4) is small, the phase of the pulse width is changed so that the discharge mode B is increased, and the capacitor voltage is controlled to be equal to E / 2.
Moreover, it is possible to suppress an increase in output voltage waveform distortion that accompanies this.

In the above embodiment, the sign of the triangular wave (carrier wave) is inverted by the sign inversion circuit (20), but the same operation is expected even if an inverted sign of the sine wave (signal wave) is used. it can.

In the above embodiment, the signal wave generation circuit (11), carrier wave generation circuit (12), voltage control circuit (15), switch (17), switch operation circuit (18), bias signal addition circuit (19),
Sign inversion circuit (20), comparators (9a) and (9b)
Are shown as independent circuits, but some or all of them are replaced with software arithmetic processing using a microcomputer etc. and integrated, or the drive signal pattern is calculated in advance based on the above logic, and memory It is also possible to directly generate the drive signal by reading the drive signal pattern stored in the memory.

Further, although the triangular wave has been shown as an example having a frequency six times as high as that of the sine wave, it is obvious that the triangular wave is not limited to this.

By the way, in the above description, the present invention has been described for the case of a single-phase single phase, but it goes without saying that the present invention can also be used if it is configured with a multi-arm multiphase.

[Effects of the Invention] As described above, according to the present invention, at least one set of series-connected bodies composed of four semiconductor switches connected in series and each diode connected in anti-parallel to each semiconductor switch is connected between the positive and negative terminals of the DC power supply. And connecting a capacitor between the connection point of the first semiconductor switch and the second semiconductor switch and the connection point of the third semiconductor switch and the fourth semiconductor switch, which form each of the series connection bodies, In a power conversion device in which a load is connected to a connection point between the second semiconductor switch and the third semiconductor switch, a signal wave generation unit that generates a signal wave, a carrier wave generation unit that generates a carrier wave,
A first drive signal generating means for modulating the carrier wave with the signal wave to generate a first drive signal and a second drive signal; and a second drive signal generating means.
Drive signal generating means for alternately connecting the first semiconductor switch and the fourth semiconductor switch forming the series connection body by the first drive signal, and the second drive signal for the second semiconductor switch. Since the power supply from the DC power source to the load is controlled by alternately conducting the second semiconductor switch and the third semiconductor switch, an output with less waveform distortion of multi-stage level can be obtained and high frequency components There is an effect that the reduction can be achieved and the breakdown voltage of the semiconductor switch used can be reduced to half.

[Brief description of drawings]

1 is a block diagram showing an embodiment of the present invention, FIGS. 2 (A) and 2 (B) are operation waveform diagrams showing the operation waveforms of FIG. 1, and FIGS. 3 (A) and 3 (B) are conventional. FIG. 3 is a configuration diagram of the power conversion device of FIG. In the figure, (1) is a DC power supply, (2a) to (2d) are transistors, (3a) to (3d) are diodes, (4) is a capacitor, (9a) and (9b) are comparators, and (10
a), (10b), (10c) and (10d) are drive signals (pulse width modulated pulse trains), (11) is a signal wave generation circuit,
(12) is a carrier wave generation circuit, (13) and (14) are voltage detection means, (15) is a voltage control circuit, (16) is polarity detection means, (17) is a switch, (18) is a switch operation circuit,
(19) is a bias signal addition circuit, (20) is a sign inversion circuit, and (21) is an AC output terminal. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (5)

[Claims] 1. At least one set of a series connection body composed of four semiconductor switches connected in series and a diode connected in anti-parallel to each of the semiconductor switches is connected between positive and negative terminals of a DC power supply, and each of the series connections is connected. A capacitor is connected between a connection point between the first semiconductor switch and the second semiconductor switch and a connection point between the third semiconductor switch and the fourth semiconductor switch, which form the body, and the second semiconductor switch and the third semiconductor switch are connected. In the power conversion device in which a load is connected to the connection point of the semiconductor switch, a signal wave generating unit that generates a signal wave,
A carrier wave generating means for generating a carrier wave; a first drive signal generating means and a second drive signal generating means for modulating the carrier wave with the signal wave to generate a first drive signal and a second drive signal, The first drive signal and the fourth semiconductor switch forming the series connection body are alternately turned on by the first drive signal, and the second drive switch and the third semiconductor switch are turned on by the second drive signal. A power conversion device, characterized in that power supply from the DC power supply to the load is controlled by alternately conducting semiconductor switches. 2. A signal wave is a signal wave corresponding to a fundamental wave component of a load voltage, a carrier wave is a carrier wave synchronized with the signal wave, and a first drive signal generating means pulses the signal wave and the carrier wave. The first pulse signal which is the first drive signal is generated by the width modulation, and the second drive signal generating means performs the pulse width modulation by inverting the sign of one of the signal wave and the carrier wave. The second drive signal is the second
The power conversion device according to claim 1, wherein the pulse signal is generated. 3. A polarity detecting means for detecting a polarity of a load current flowing through a load, a first voltage detecting means for detecting a voltage of a DC power supply, a second voltage detecting means for detecting a voltage of a capacitor, and the DC power supply. Voltage control means for outputting a deviation between 1/2 of the voltage of the capacitor and the voltage of the capacitor, and controls the carrier wave based on the polarity of the load current detected by the polarity detection means and the deviation which is the output of the voltage control means. The power conversion device according to claim 1 or 2, wherein: 4. A first pulse signal based on the polarity of the load current flowing through the load detected by the polarity detection means and the deviation between 1/2 of the voltage of the DC power source output by the voltage control means and the voltage of the capacitor. The power converter according to claim 3, wherein the pulse width of the second pulse signal is controlled differentially. 5. A direct current bias is applied to the carrier wave on the basis of the polarity of the load current flowing through the load detected by the polarity detection means and the deviation between the voltage of the DC power supply output by the voltage control means and the voltage of the capacitor. Claim 3 characterized in that the capacitor voltage is controlled by
The power converter according to item 4 or item 4.