KR100326328B1 - Impedance matching circuit for vdsl line - Google Patents

Impedance matching circuit for vdsl line Download PDF

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KR100326328B1
KR100326328B1 KR1020000018243A KR20000018243A KR100326328B1 KR 100326328 B1 KR100326328 B1 KR 100326328B1 KR 1020000018243 A KR1020000018243 A KR 1020000018243A KR 20000018243 A KR20000018243 A KR 20000018243A KR 100326328 B1 KR100326328 B1 KR 100326328B1
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South Korea
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terminal
transformer
primary
impedance matching
amplifier
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KR1020000018243A
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KR20010094866A (en
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권오동
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윤종용
삼성전자 주식회사
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F19/00—Fixed transformers or mutual inductances of the signal type
    • H01F19/04—Transformers or mutual inductances suitable for handling frequencies considerably beyond the audio range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/28—Impedance matching networks
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H03H7/40—Automatic matching of load impedance to source impedance

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  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

가. 청구범위에 기재된 발명이 속한 기술분야end. The technical field to which the invention described in the claims belongs

본 발명은 VDSL 라인의 임피던스 매칭회로에 관한 것이다.The present invention relates to an impedance matching circuit of a VDSL line.

나. 발명이 해결하고자 하는 기술적 과제I. The technical problem to be solved by the invention

비교적 저렴한 트랜스포머를 이용하여 송수신신호를 분리함과 아울러 임피던스 매칭을 수행할 수 있게 한다.A relatively inexpensive transformer is used to separate the transmitted and received signals and to perform impedance matching.

다. 발명의 해결방법의 요지All. Summary of Solution of the Invention

제1트랜스포머와, 제1송신단과 상기 제1트랜스포머의 2차측 제1단자사이에 연결된 제1앰프와, 상기 제1트랜스포머의 2차측 제1단자와 접지간에 연결된 제1저항과, 1차측 제1단자가 제1라인과 연결되고, 2차측 제2단자와 상기 제1트랜스포머의 2차측 제2단자와 연결된 제2트랜스포머와, 제2송신단과 상기 제2트랜스포머의 2차측 제1단자사이에 연결된 제2앰프와, 상기 제2트랜스포머의 2차측 제1단자와 접지간에 연결된 제2저항과, 상기 제1트랜스포머의 1차측 제1단자와 2차측 제1단자가 연결된 제3트랜스포머와, 상기 제1트랜스포머의 1차측 제2단자와 상기 제3트랜스포머의 2차측 제2단자간에 연결된 제3저항과, 수신단과 상기 제3트랜스포머의 1차측 제1단자간에 연결된 제3앰프와, 상기 제3앰프의 출력단과 접지간에 연결된 제4저항과, 1차측 제1단자는 상기 제3트랜스포머의 1차측 제1단자와 연결되고, 1차측 제2단자는 접지되며, 2차측 제1단자는 상기 제2트랜스포머의 1차측 제2단자와 연결되고, 2차측 제2단자는 제2라인과 연결된 제4트랜스포머를 구비하는 것을 특징으로한다.A first transformer, a first amplifier connected between the first transmitting end and the first terminal of the secondary side of the first transformer, a first resistor connected between the first terminal of the first transformer and the ground, and the first side of the first transformer A second terminal connected to the first line, a second transformer connected to the second terminal of the second side and the second terminal of the first transformer, and a second terminal connected to the second terminal of the second transmitter and the second transformer of the second transformer. A second amplifier, a second resistor connected between the secondary first terminal of the second transformer and the ground; a third transformer connected between the primary first terminal of the first transformer and the secondary first terminal; and the first transformer; A third resistor connected between the primary second terminal of the third transformer and the secondary second terminal of the third transformer, a third amplifier connected between the receiving terminal and the primary terminal of the third transformer, and an output terminal of the third amplifier. The fourth resistor connected between the ground and the primary first terminal is the third The first terminal of the transformer is connected to the primary terminal, the second terminal of the primary side is grounded, the first terminal of the secondary side is connected to the first terminal of the second transformer, and the second terminal of the secondary side is connected to the second line. And a fourth transformer connected thereto.

라. 발명의 중요한 용도la. Important uses of the invention

본 발명은 VDSL 라인 임피던스 매칭시에 사용된다.The present invention is used in VDSL line impedance matching.

Description

브이디에스엘 라인의 임피던스 매칭회로{IMPEDANCE MATCHING CIRCUIT FOR VDSL LINE}VMD line impedance matching circuit {IMPEDANCE MATCHING CIRCUIT FOR VDSL LINE}

본 발명은 VDSL(very highspeed digital subscriber line) 시스템에 관한 것으로, 특히 VDSL 라인 임피던스 매칭회로에 관한 것이다.The present invention relates to a very high speed digital subscriber line (VDSL) system, and more particularly to a VDSL line impedance matching circuit.

FTTC(fiber to the cuber)에 연동되는 셋 탑 박스(set top box)와 같은 액세스 네트워크 터미날(access network termonal)의 연결선로의 임피던스를 매칭하기 위한 회로를 구비하였는데, 특히 신호의 송수신 신호를 분리하는 디플렉스와 임피던스를 매칭시키기 위한 회로를 구비하였다.A circuit for matching impedance of a connection line of an access network termonal, such as a set top box, which is linked to an FTTC (fiber to the cuber), is provided. A circuit for matching the deplex with the impedance was provided.

종래의 임피던스 매칭회로의 블럭구성도를 도시한 도 1을 참조하면, 100[ohm]의 임피던스를 가진 라인단으로부터의 신호는 디플렉스(D)를 통해 분리되고, 디플렉스(D)는 75[ohm]으로 임피던스 매칭을 수행하였다. 상기와 같은 디플렉스(D) 내부에는 로패스 필터와 하이패스 필터의 특성이 구비되어, 신호를 분리함은 물론이며 입력 임피던스가 100[ohm]이고 출력 임피던스가 75[ohm]으로 임피던스 매칭까지 수행하였다.Referring to FIG. 1, which shows a block diagram of a conventional impedance matching circuit, a signal from a line end having an impedance of 100 [ohm] is separated through a deplex (D), and the deplex (D) is 75 [ ohm] impedance matching was performed. The above-described deplex (D) is provided with characteristics of a low pass filter and a high pass filter to separate signals and perform impedance matching with an input impedance of 100 [ohm] and an output impedance of 75 [ohm]. It was.

수신신호의 임피던스 매칭은 제1OP 앰프(A1)의 입력 임피던스가 무한대이므로 제1저항(R1)을 통해 이루어지고, 송신신호의 임피던스 매칭은 제2OP 앰프(A2)의 출력 임피던스가 0[ohm]이므로 제2저항(R2)을 통해 이루어졌다.Since the impedance matching of the received signal is performed through the first resistor R1 because the input impedance of the first OP amplifier A1 is infinite, the impedance matching of the transmission signal is 0 [ohm] because the output impedance of the second OP amplifier A2 is 0 [ohm]. It made through the second resistor R2.

상기한 바와 같이 종래에는 75[ohm] 임피던스를 가진 디플렉스(D)로 송신신호와 수신신호를 분리하였다. 그러나 주파수 대역이 수신신호, 송신신호로 변경되어 동일한 디플렉스를 사용할 수가 없었으며, 임피던스도 75[ohm]이므로 사용하지 못하고 가격도 비싼 문제점이 있었다.As described above, conventionally, a transmission signal and a reception signal are separated by a deplex D having a 75 [ohm] impedance. However, since the frequency band was changed into a reception signal and a transmission signal, the same deplex could not be used. Since the impedance was 75 [ohm], there was a problem in that the price was expensive.

상술한 바와 같이 종래에 사용하던 디플렉스를 주파수 대역의 변경에 따라 사용할 수 없는 문제점이 있었으며, 가격도 비싼 문제점이 있었다.As described above, there has been a problem in that the conventionally used deplex cannot be used in accordance with the change of the frequency band, and there is a problem that the price is expensive.

따라서 본 발명의 목적은 비교적 저렴한 트랜스포머를 이용하여 송수신신호를 분리함과 아울러 임피던스 매칭을 수행할 수 있는 임피던스 매칭장치를 제공함에 있다.Accordingly, an object of the present invention is to provide an impedance matching device capable of performing impedance matching and separating transmission and reception signals using a relatively inexpensive transformer.

도 1은 종래의 VDSL 라인 임피던스 매칭회로의 블럭구성도,1 is a block diagram of a conventional VDSL line impedance matching circuit;

도 2는 본 발명의 바람직한 실시예에 따른 VDSL 라인 임피던스 매칭회로의 회로도,2 is a circuit diagram of a VDSL line impedance matching circuit according to a preferred embodiment of the present invention;

도 3은 도 2의 트랜스포머 부분의 연결구성을 간략하게 도시한 도면.3 is a view schematically illustrating a connection configuration of a transformer part of FIG. 2.

상술한 바와 같은 목적을 달성하기 위한 본 발명은 제1트랜스포머와, 제1송신단과 상기 제1트랜스포머의 2차측 제1단자사이에 연결된 제1앰프와, 상기 제1트랜스포머의 2차측 제1단자와 접지간에 연결된 제1저항과, 1차측 제1단자가 제1라인과 연결되고, 2차측 제2단자와 상기 제1트랜스포머의 2차측 제2단자와 연결된 제2트랜스포머와, 제2송신단과 상기 제2트랜스포머의 2차측 제1단자사이에 연결된 제2앰프와, 상기 제2트랜스포머의 2차측 제1단자와 접지간에 연결된 제2저항과, 상기 제1트랜스포머의 1차측 제1단자와 2차측 제1단자가 연결된 제3트랜스포머와, 상기 제1트랜스포머의 1차측 제2단자와 상기 제3트랜스포머의 2차측 제2단자간에 연결된 제3저항과, 수신단과 상기 제3트랜스포머의 1차측 제1단자간에 연결된 제3앰프와, 상기 제3앰프의 출력단과 접지간에 연결된 제4저항과, 1차측 제1단자는 상기 제3트랜스포머의 1차측 제1단자와 연결되고, 1차측 제2단자는 접지되며, 2차측 제1단자는 상기 제2트랜스포머의 1차측 제2단자와 연결되고, 2차측 제2단자는 제2라인과 연결된 제4트랜스포머를 구비하는 것을 특징으로 한다.According to an aspect of the present invention, a first transformer, a first amplifier connected between a first transmitter and a first terminal of a secondary side of the first transformer, and a first terminal of a secondary side of the first transformer are provided. A first resistor connected between ground, a first transformer connected to the first line of the primary side, a second transformer connected to the second terminal of the secondary side and a second terminal of the second transformer of the first transformer, a second transmitter and the first resistor; A second amplifier connected between the first terminal of the secondary transformer and a second resistor connected between the first terminal of the second transformer and the ground; the first terminal of the first transformer and the second terminal of the first transformer; A third transformer having a terminal connected thereto, a third resistor connected between the second terminal of the first side of the first transformer and the second terminal of the second side of the third transformer, and connected between the receiving terminal and the first terminal of the first side of the third transformer. A third amplifier and an output terminal of the third amplifier The fourth resistor connected to the ground and the primary first terminal are connected to the primary first terminal of the third transformer, the primary second terminal is grounded, and the secondary first terminal is the primary side of the second transformer. The second terminal is connected to the second terminal, and the fourth transformer is connected to the second line.

이하 본 발명의 바람직한 실시예를 첨부한 도면을 참조하여 상세히 설명한다. 하기 설명 및 첨부 도면에서 많은 특정 상세들이 본 발명의 보다 전반적인 이해를 제공하기 위해 나타나 있으나, 이들 특정 상세들은 본 발명의 설명을 위해 예시한 것으로 본 발명이 그들에 한정됨을 의미하는 것은 아니다. 그리고 본 발명의 요지를 불필요하게 흐릴 수 있는 공지 기능 및 구성에 대한 상세한 설명은 생략한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. While many specific details are set forth in the following description and in the accompanying drawings, to provide a more general understanding of the invention, these specific details are illustrated for the purpose of illustrating the invention and are not meant to limit the invention thereto. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

본 발명은 FTTC(fiber to the curb) 망에 연동되는 액세스 네트워크 터미날에 대한 것으로, 헤드 엔드 시스템에서 옵티컬 파이버 유니트까지는 광을 이용하고 옵티컵 파이버 유니트에서 집안까지는 기존의 전화선로를 이용하는 구조로 되어 있다.The present invention relates to an access network terminal interworking with an FTTC (fiber to the curb) network, wherein the optical fiber unit is used from the head end system to the optical fiber and the existing telephone line is used from the optical cup fiber unit to the home. .

본 발명의 바람직한 실시예에 따른 임피던스 매칭장치는 한 전송선로에 송신신호(low frequency)와 수신신호(high frequency)를 분리하는 디플렉스 기능을 트랜스포머를 통해 달성하며, 또한 임피던스 매칭도 이룬다.The impedance matching device according to the preferred embodiment of the present invention achieves a deflex function for separating a low frequency signal and a high frequency signal on a transmission line through a transformer, and also achieves impedance matching.

이러한 본 발명의 바람직한 실시예에 따른 임피던스 매칭장치를 도시한 도 2와, 상기 도 2의 트랜스포머 연결부분을 간략하게 도시한 도 3을 참조하여, 본 발명의 바람직한 실시예를 상세히 설명한다. 트랜스포머부(T)는 제1 내지 제4트랜스포머(T1내지 T4)로 구성되며, 각 트랜스포머의 권선비는 1:1이다. 제1선로측 단자(L1)는 제2트랜스포머(T2)의 1차측 제1단자에 연결되고, 상기 제2트랜스포머(T2)의 1차측 제2단자는 콘덴서(C)의 일측에 연결된다. 상기 콘덴서(C)는 트랜스포머의 인덕턴스와 연동하여 저주파를 차단한다. 상기 콘덴서(C)의 타측은 제4트랜스포머(T4)의 2차측 제1단자와 연결되고, 상기 제4트랜스포머(T4)의 2차측 제2단자는 제2선로측단자(L2)와 연결된다.The preferred embodiment of the present invention will be described in detail with reference to FIG. 2 showing the impedance matching device according to the preferred embodiment of the present invention and FIG. 3 which briefly illustrates the transformer connecting portion of FIG. 2. The transformer unit T includes first to fourth transformers T 1 to T 4 , and a winding ratio of each transformer is 1: 1. The first line-side terminal (L1) is connected to the primary-side first terminal of the second transformer (T 2), the second terminal primary winding of the second transformer (T 2) is connected to one side of the capacitor (C) . The condenser C blocks low frequencies in conjunction with the inductance of the transformer. The other side of the condenser C is connected to the first terminal of the second side of the fourth transformer T 4 , and the second side terminal of the fourth transformer T 4 is connected to the second line side terminal L2. do.

제1트랜스포머(T1)의 1차측 제1단자는 100[ohm]의 저항(RA)의 일측과 연결되고, 저항(RA)의 타측은 제3트랜스포머(T3)의 2차측 제1단자와 연결된다. 상기 제3트랜스포머(T3)의 2차측 제2단자는 상기 제1트랜스포머(T1)의 1차측 제1단자와 연결된다. 상기 제1트랜스포머(T1)의 2차측 제1단자는 일측이 접지된 저항(RB)의 타측과 연결됨과 아울러 제BOP 앰프(AB)의 입력단과 연결된다. 상기 저항(RB)은 100[ohm]이며, 이는 무한대인 제BOP 앰프(AB)의 입력 임피던스와의 매칭을 위해 설치된다. 상기 제1트랜스포머(T1)의 2차측 제2단자는 제2트랜스포머(T2)의 2차측 제1단자와 연결되고, 상기 제2트랜스포머(T2)의 2차측 제2단자는 일측이 접지된 저항(RC)의 타측과 연결됨과 아울러 제COP 앰프(AC)의 입력단과 연결된다. 상기 저항(RC)은 100[ohm]이며, 이는 무한대인 제COP 앰프(AC)의 입력 임피던스와의 매칭을 위해 설치된다.The first terminal of the first side of the first transformer T1 is connected to one side of the resistor RA of 100 [ohm], and the other side of the resistor RA is connected to the second side first terminal of the third transformer T 3 . do. The secondary second terminal of the third transformer T 3 is connected to the primary first terminal of the first transformer T 1 . The first terminal of the secondary side of the first transformer T 1 is connected to the other end of the resistor RB of which one side is grounded and to the input terminal of the BOP amplifier AB. The resistor RB is 100 [ohm], which is provided for matching with the input impedance of the BOP amplifier AB which is infinite. The secondary second terminal of the first transformer T1 is connected to the secondary first terminal of the second transformer T2, and the secondary second terminal of the second transformer T2 is grounded at one side thereof. It is connected to the other side of RC) and the input terminal of the COP amplifier (AC). The resistance RC is 100 [ohm], which is provided for matching with the input impedance of the COP amplifier AC which is infinite.

상기 제3트랜스포머(T3)의 1차측 제1단자는 디퍼런셜 모드로 설계된 제A앰프(AA)를 통해 수신측(TX)과 연결된다. 또한 상기 제3트랜스포머(T3)의 1차측 제1단자와 제4트랜스포머(T4)의 1차측 제1단자 사이에 저항(RD)이 연결되며, 이 저항(RD)은 200[ohm]이다. 그리고 제3트랜스포머(T3)의 1차측 제2단자와 제4트랜스포머(T4)의 1차측 제2단자가 서로 연결된다.The first terminal of the first side of the third transformer T 3 is connected to the receiving side TX through the A amplifier AA designed in the differential mode. In addition, a resistor RD is connected between the primary terminal of the third transformer T 3 and the primary terminal of the fourth transformer T 4 , and the resistor RD is 200 ohm. . The primary second terminal of the third transformer T 3 and the primary second terminal of the fourth transformer T 4 are connected to each other.

이렇게 구성된 임피던스 매칭회로를 간략하게 도시한 도 3에서 수신측 임피던스(RX) 및 송신측 임피던스(TX)는 모두 200[ohm]이며, 저항(RT)는 100[ohm]이다.In FIG. 3, which briefly illustrates the impedance matching circuit configured as described above, both the reception impedance RX and the transmission impedance TX are 200 [ohm], and the resistance RT is 100 [ohm].

상술한 바와 같이 본 발명은 간단한 트랜스포머를 이용하여 신호를 분리하고 임피던스를 매칭할 수 있는 이점이 있다.As described above, the present invention has the advantage of separating signals and matching impedance by using a simple transformer.

Claims (1)

브이디에스엘 라인의 임피던스 매칭회로에 있어서,In the impedance matching circuit of VDS line, 제1트랜스포머와,With the first transformer, 제1송신단과 상기 제1트랜스포머의 2차측 제1단자사이에 연결된 제1앰프와,A first amplifier connected between a first transmitter and a first terminal of the secondary side of the first transformer, 상기 제1트랜스포머의 2차측 제1단자와 접지간에 연결된 제1저항과,A first resistor connected between the second terminal of the first transformer and a ground; 1차측 제1단자가 제1라인과 연결되고, 2차측 제2단자와 상기 제1트랜스포머의 2차측 제2단자와 연결된 제2트랜스포머와,A second transformer connected to a first first terminal of the primary side and connected to a second terminal of the second side of the first transformer and a second second terminal of the first transformer; 제2송신단과 상기 제2트랜스포머의 2차측 제1단자사이에 연결된 제2앰프와,A second amplifier connected between a second transmitter and a first terminal of a secondary side of the second transformer; 상기 제2트랜스포머의 2차측 제1단자와 접지간에 연결된 제2저항과,A second resistor connected between the first terminal of the second transformer and a ground of the second transformer; 상기 제1트랜스포머의 1차측 제1단자와 2차측 제1단자가 연결된 제3트랜스포머와,A third transformer connected to the first terminal of the first transformer and the second terminal of the first transformer; 상기 제1트랜스포머의 1차측 제2단자와 상기 제3트랜스포머의 2차측 제2단자간에 연결된 제3저항과,A third resistor connected between the second terminal of the first side of the first transformer and the second terminal of the second side of the third transformer; 수신단과 상기 제3트랜스포머의 1차측 제1단자간에 연결된 제3앰프와,A third amplifier connected between the receiving terminal and the first terminal of the primary side of the third transformer; 상기 제3앰프의 출력단과 접지간에 연결된 제4저항과,A fourth resistor connected between the output terminal of the third amplifier and ground; 1차측 제1단자는 상기 제3트랜스포머의 1차측 제1단자와 연결되고, 1차측 제2단자는 접지되며, 2차측 제1단자는 상기 제2트랜스포머의 1차측 제2단자와 연결되고, 2차측 제2단자는 제2라인과 연결된 제4트랜스포머를 구비하는 것을 특징으로 하는 브이디에스엘 라인의 임피던스 매칭회로.A primary first terminal is connected to a primary first terminal of the third transformer, a primary second terminal is grounded, a secondary first terminal is connected to a primary second terminal of the second transformer, and The second terminal of the vehicle side includes a fourth transformer connected to the second line, and the impedance matching circuit of the VLS line.
KR1020000018243A 2000-04-07 2000-04-07 Impedance matching circuit for vdsl line KR100326328B1 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6361840A (en) * 1986-09-03 1988-03-18 Aichi Electric Co Ltd Electric warm-air generator and manufacture thereof
JPH09266420A (en) * 1996-03-27 1997-10-07 Nippon Telegr & Teleph Corp <Ntt> Distribution amplifier
JPH10290183A (en) * 1997-04-14 1998-10-27 Nec Eng Ltd Impedance matching device
JPH11331027A (en) * 1998-02-20 1999-11-30 Koninkl Philips Electronics Nv Hybrid amplifier
US6037841A (en) * 1997-10-07 2000-03-14 Applied Micro Circuits Corporation Impedance matched CMOS transimpedance amplifier for high-speed fiber optic communications

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6361840A (en) * 1986-09-03 1988-03-18 Aichi Electric Co Ltd Electric warm-air generator and manufacture thereof
JPH09266420A (en) * 1996-03-27 1997-10-07 Nippon Telegr & Teleph Corp <Ntt> Distribution amplifier
JPH10290183A (en) * 1997-04-14 1998-10-27 Nec Eng Ltd Impedance matching device
US6037841A (en) * 1997-10-07 2000-03-14 Applied Micro Circuits Corporation Impedance matched CMOS transimpedance amplifier for high-speed fiber optic communications
JPH11331027A (en) * 1998-02-20 1999-11-30 Koninkl Philips Electronics Nv Hybrid amplifier

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