KR100320328B1 - Surface Discharge Plasma Display Panel - Google Patents

Abstract

An object of the present invention is to increase the contrast of a display by making the non-light emitting area between lines inconspicuous.

The structure is a surface discharge type having a pair of display electrodes X and Y extending in a line direction for each display line L on the inner surface of the substrates 11 and 21 on the front side or the rear side of the pair of substrates sandwiching the discharge space 30. In the PDP 1, a band-shaped optical film extending in the line direction overlapping with the region S2 sandwiched by the display electrode pairs X and Y between adjacent lines L in plan view on the inner surface side or the outer surface side of the substrate 11 on the front side ( 45).

Description

Surface Discharge Plasma Display Panel

The present invention relates to a surface discharge plasma display panel (PDP) of a matrix display method.

A surface discharge type PDP is a PDP in which a pair of display electrodes for defining a discharge cell are arranged adjacent to one another on a same substrate, and is suitable for color display by phosphors, and thus is widely used as a thin device capable of displaying television images. It is responding. Moreover, it is considered as a big screen display device for high-vision video. Under such circumstances, it is desired to improve display quality due to high contrast and high contrast, and high contrast.

14 is a sectional view showing the principal parts of the conventional PDP 90, showing its internal structure. The PDP 90 is a surface discharge type PDP having a three-electrode structure having a matrix display system, and is called a reflection type according to the arrangement of the phosphors.

In the PDP 90, a pair of parallel pairs of display electrodes X and Y for generating light surface discharge on the substrate surface on the inner surface of the glass substrate 11 on the front side is arranged in pairs for each line of the matrix display. . The display electrode pairs X and Y are covered with the discharge space 30, and a dielectric layer 17 for AC driving is formed. The protective film 18 is deposited on the surface of the dielectric layer 17. The dielectric layer 17 and the protective film 18 are both transparent.

The display electrode pairs X and Y each consist of a wide linear transparent electrode 41 made of an ITO thin film and a narrow linear bus electrode 42 made of a metal thin film (Cr / Cu / Cr). . The bus electrode 42 is an auxiliary electrode for ensuring proper conductivity, and is disposed at a far end of the transparent electrode 41 far from the surface discharge gap. By employing such an electrode structure, the light emission efficiency can be increased by widening the surface discharge area while minimizing light shielding of the display light.

On the other hand, an address electrode A orthogonal to the display electrode pairs X and Y is arranged on the inner surface of the glass substrate 21 on the rear side. The phosphor layer 28 covering the glass substrate 21 including the upper portion of the address electrode A is formed. The accumulation state of the wall charges in the dielectric layer 17 is controlled by the counter discharge between the address electrode A and the display electrode Y. The phosphor layer 28 is locally excited by ultraviolet (UV) light generated by surface discharge to emit visible light of a predetermined color. Among the visible light, the light passing through the glass substrate 11 becomes the display light.

The gap S1 between the display electrode X and the display electrode Y of each line is called a "discharge slit", and the width of the discharge slit S1 (in the arrangement direction of the pair of display electrodes X and Y). Dimension (w1) is selected so that surface discharge occurs by application of a driving voltage of about 100 to 200V. On the other hand, the gap S2 between the display electrode X and the display electrode Y between adjacent lines is called "reverse slit", and the width w2 of the reverse slit S2 is the width of the discharge slit S1. It is set to a value sufficiently larger than (w1). That is, discharge between the display electrodes X and Y arranged with the reverse slit S2 therebetween is prevented. In this way, by disposing the display electrodes X and Y with the discharge slit S1 and the reverse slit S2 interposed therebetween, each line can be selectively emitted. Therefore, the part corresponding to the reverse slit S2 in the display screen becomes a non-light emitting area or a non-display area, and the slit S1 part becomes a light emitting area or a display area.

The conventional panel structure is a structure in which the non-light-emitting state and the phosphor layer 28 are visible through the reverse slit S2 from the front side. The phosphor layer 28 in the non-luminous state is white or light grayish white in color. For this reason, when used in a particularly bright place, external light is scattered in the phosphor layer 28 so that the non-light emitting area between the lines becomes white, and the contrast of the display is damaged.

In addition, as a method of increasing the contrast of the PDP for color display, a method of applying a color filter by applying a translucent paint corresponding to the emission color of the phosphor on the outer surface of the front substrate, a method of disposing a filter separately manufactured on the front of the PDP, and a dielectric layer ( The method of color-dividing 17) into R, G, and B is proposed.

However, it is very difficult to apply various paints in correspondence with the minute pixels. If a separate filter is arranged, the display image is deformed due to the gap between the PDP and the filter. In the case of color classification of the dielectric layer 17, since the colorant (pigment) is different for each color, the uniformity of the dielectric constant is impaired depending on the color classification, resulting in unstable discharge characteristics. In addition, the color classification of the dielectric layer is difficult to align the same as the coating of the paint separately.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object thereof is to increase the display contrast by making the non-light emitting area between lines inconspicuous.

In addition, an object of the present invention is to provide a structure and a method of manufacturing the most suitable for forming a light shielding film containing a black pigment in the non-light emitting region between display lines.

1 is a perspective view showing the basic structure of a PDP according to the present invention;

2 is a cross-sectional view of the main portion of the PDP.

3 is a plan view of a light shielding film;

Fig. 4 is a diagram showing a manufacturing method of the front side portion of the PDP.

Fig. 5 is a sectional view of a main portion of the second PDP.

Fig. 6 is a sectional view of a main portion of a third PDP.

7 is a sectional view of a main portion of a fourth PDP.

Fig. 8 is a sectional view of a main portion of a fifth PDP.

Fig. 9 is a sectional view for explaining a method for manufacturing PDPs of the second, fourth and fifth.

Fig. 10 is a sectional view for explaining a method for manufacturing PDPs of the second, fourth, and fifth.

Fig. 11 is a plan view when the light shielding film 48 is also formed in the outer periphery of the panel display area.

FIG. 12 is a cross-sectional structural view of the part shown by XX-YY in FIG.

Fig. 13 is a sectional view of a modification of the PDP.

Fig. 14 is a sectional view of principal parts showing the internal structure of a conventional PDP.

In order to achieve the above object, according to the present invention, a plurality of pairs of predetermined reverse slits which do not discharge each of the display electrode pairs arranged with the discharge slits for the surface discharge interposed therebetween are arranged on the front substrate. In a three-electrode surface discharge type plasma display panel comprising a dielectric layer covering each display electrode pair and having a plurality of address electrodes and a plurality of stripe-shaped phosphors intersecting the display electrode pair on a rear substrate. A light shielding film is provided at a position corresponding to the reverse slit portion between adjacent pairs of display electrodes on the front substrate and in the middle of the dielectric layer in a thickness direction so as to be spaced apart from the display electrode pair, and the reverse slit by the light shielding film. It is configured to block the projection to the phosphor on the back substrate in the negative portion The surface discharge type plasma display panel to be provided.

In addition, according to the present invention, a plurality of pairs are arranged in parallel on the front substrate, with predetermined reverse slits that do not discharge each of the display electrode pairs disposed with the discharge slits for surface discharge interposed therebetween, and on the rear substrate, In a three-electrode type surface discharge plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors intersecting the display electrodes, the reverse slit portions between adjacent pairs of display electrodes on the front substrate. A strip-shaped light shielding film is provided on the back substrate to block the projection of the stripe-shaped phosphor on the back substrate, wherein each pair of display electrodes has a width smaller than that of the transparent electrode and the transparent electrode, It consists of a metal electrode which overlaps the edge part of the side close to an inverse slit part, and is made with respect to the said discharge space by a dielectric layer. The surface-shielding plasma display panel is coated, wherein the light shielding film is disposed on the front substrate side of the display electrode so as to overlap the metal electrodes on both sides of the reverse slit portion in plan view.

In addition, according to the present invention, a plurality of pairs are arranged in parallel on the front substrate, with predetermined reverse slits that do not discharge each of the display electrode pairs disposed with the discharge slits for surface discharge interposed therebetween, and on the rear substrate, In a three-electrode surface discharge plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors intersecting the display electrode pairs, the reverse slit portion between adjacent display electrode pairs of the front substrate. And a strip-shaped light shielding film partially overlapping with the display electrode, and configured to block the projection from the reverse slit to the phosphor on the rear substrate by the light shielding film. Is provided.

In addition, according to the present invention, a plurality of pairs are arranged in parallel on the front substrate, with predetermined reverse slits that do not discharge each of the display electrode pairs disposed with the discharge slits for surface discharge interposed therebetween, and on the rear substrate, In a three-electrode type surface discharge plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors intersecting the display electrode pairs, the reverse slit portion between adjacent display electrode pairs of the front substrate. And a band-shaped light shielding film in contact with the display electrode at an end thereof, and configured to block the projection to the phosphor on the rear substrate from the reverse slit by the light shielding film. A typical plasma display panel is provided.

EXAMPLE

1 is a perspective view showing the basic structure of a PDP 1 according to the present invention. In Fig. 1, the same reference numerals are given to the corresponding elements in Fig. 14 despite the difference in shape and material. The same applies to other drawings below.

The PDP 1 is a surface discharge type PDP having a three-electrode structure having a matrix display method, which is called a reflection type, like the conventional PDP 90. The outer shape is formed of a pair of glass substrates 11 and 21 which face each other with the discharge space 30 interposed therebetween, and the glass substrates 11 and 21 are formed at the periphery of the opposing regions. It is bonded by the frame-shaped sealing layer which is not shown which consists of low melting-point glass.

On the inner surface of the glass substrate 11 on the front side, a pair of parallel pairs of linear display electrodes X and Y for generating light surface discharge on the substrate surface are arranged in pairs for each line L of the matrix display. . The line pitch is, for example, 660 mu m.

The display electrode pairs X and Y are each composed of a wide linear transparent electrode 41 made of an ITO thin film and a narrow linear bus electrode 42 made of a metal thin film having a multilayer structure. As a specific example of the dimension of the transparent electrode 41 and the bus electrode 42, the transparent electrode 41 is 0.1 micrometer in thickness, 180 micrometers in width, and the bus electrode 42 is 1 micrometer in thickness, and 60 micrometers in width.

The bus electrode 42 is an auxiliary electrode for ensuring proper conductivity, and is disposed at the edge of the transparent electrode 41 far from the surface discharge gap.

In the PDP 1, the display electrode pairs X and Y are covered with the discharge space 30, and a dielectric layer (PbO-based low melting point glass layer) 17 for AC driving is formed. A protective film 18 made of MgO (magnesium oxide) is deposited on the surface of the dielectric layer 17. The thickness of the dielectric layer 17 is about 30 micrometers, and the thickness of the protective film 18 is about 5000 micrometers.

On the other hand, the inner surface of the glass substrate 21 on the back side is uniformly covered with a base layer 22 having a thickness of about 10 mu m of ZnO-based low melting glass. The address electrodes A are arranged on the base layer 22 at a predetermined pitch (220 mu m) orthogonal to the display electrode pairs X and Y. The address electrode A is formed by firing a silver paste, and its thickness is about 10 mu m. The base layer 22 prevents electromigration of the address electrode A. FIG.

The accumulation state of the wall charges on the dielectric layer 17 is controlled by the opposite discharge between the address electrode A and the display electrode Y. FIG. The address electrode A is also covered with a dielectric layer 24 made of low melting glass having the same composition as the base layer 22. The thickness of the upper dielectric layer 24 of the address electrode A is about 10 mu m.

On the dielectric layer 24, a plurality of linearly partitioned barrier ribs 29 having a height of about 150 mu m are provided between each address electrode A. The three primary colors of R (red), G (green), and B (blue) for pre-color display covering the surface of the dielectric layer 24 and the side surface of the partition wall 29 including the upper portion of the address electrode A are covered. Phosphor layers 28R, 28G, and 28B (hereinafter referred to as phosphor layer 28 when there is no need to distinguish colors in particular) are formed. These phosphor layers 28 are excited by ultraviolet rays generated by surface discharge and emit light.

By the partition 29, the discharge space 30 is partitioned for each unit light emitting area in the line direction (pixel array direction parallel to the display electrode pairs (X, Y)), and the gap dimension of the discharge space 30 is defined. It is. In the PDP 1, there is no partition wall that partitions the discharge space 30 in the column direction of the matrix display (array direction of the pair of display electrodes X and Y). The spacing (width of the reverse slit) of the display line L having the display electrode pairs X and Y is selected to be 100 to 400 mu m, and the surface discharge gap of about 50 mu m in each line L (the Since the width is sufficiently large, the interference of discharge between lines does not occur.

In the PDP 1, one display pixel (pixel) is composed of three adjacent unit light emitting regions (sub-pixels) in each line L. As shown in FIG. The emission colors of the lines L in the same column are the same, and the phosphor layers 28R, 28G, and 28B of each color are formed by screen printing continuously in the column. Screen printing is very productive. In the case where the phosphor layers 28 are continuous in the column, the thickness of the phosphor layer 28 of each subpixel can be easily uniformed as compared with the case where the phosphor layers 28 are segmented for each line L.

2 is a cross-sectional view of the main portion of the PDP 1, and FIG. 3 is a plan view of the light shielding film 45. FIG. As shown in FIG. 2, in the PDP 1, a light shielding film 45 which directly contacts the inner surface of the glass substrate 11 to block visible light is formed for each inverse slit S2. Each light shielding film 45 is patterned in a band shape extending in the line direction as shown in FIG. 3, and is overlapped with the area between the display electrodes X and Y between adjacent lines L. As shown in FIG. These light shielding films 45 are separated from each other to form a light shielding pattern having a stripe shape (wrinkle pattern) on the entire display screen, and the fluorescent layer 28 is covered between the lines L, thereby increasing display contrast. According to the stripe pattern, unlike the subpixel or the matrix pattern surrounding the pixels, there is no possibility that the position in the line direction is shifted, so that the positions of the two glass substrates 11 and 21 at the time of manufacturing the PDP 1 can be easily matched.

In addition, it is preferable that at least the top of the partition 29 be formed in the same dark color as the light shielding film. In this way, since the lattice-shaped dark pattern is formed by the partition wall and the light shielding film which cross each other, the outline of each subpixel becomes clear. Specifically, black materials, such as chromium (Cr), are mixed in the material of a partition, and the whole forms a dark partition.

4 is a diagram illustrating a manufacturing method of the front side portion of the PDP 1. The PDP 1 is manufactured by providing predetermined components separately from the glass substrate 11 and the glass substrate 21, and then arranging both glass substrates 11 and 21 to face each other and joining the peripheral edges thereof.

In manufacturing the front side, first, a dark insulating material is deposited on the surface of the glass substrate 11 by sputtering to form an insulating film (not shown) having a lower surface reflectivity than the metal electrode 42. As the insulating material, chromium oxide (CrO), silicon oxide (SiO), or the like can be used. The thickness of the insulating film is preferably 1 μm or less in terms of reducing the step of the transparent electrode 41. Next, the insulating film is patterned by photolithography using a first exposure mask to collectively form the plurality of light shielding films 45 (Fig. 4 (a)).

Next, an ITO film is formed on the glass substrate 11 having the light shielding film 45, and patterned by photolithography using a second exposure mask to form a transparent electrode 41 so as to partially overlap the light shielding film 45 [ 4 (b)].

A negative photosensitive material 61 which is not dissolved by ultraviolet exposure is applied to cover the light shielding film 45 and the transparent electrode 41, and the entire surface is exposed to the photosensitive material from the rear surface side of the glass substrate 11. Figure 4 (c). Then, the photosensitive material is developed to form a resist layer 62 covering only the region between the light shielding films (Fig. 4 (d)).

Next, on the exposed portion of the transparent electrode 41, a multi-layered metal electrode 42 made of nickel / copper / nickel is formed by selective plating (Fig. 4 (e)).

Thereafter, the resist layer 62 is removed, and the dielectric layer 17 and the protective film 18 are sequentially formed to finish the manufacture of the front side (Fig. 4 (f)).

In the manufacture of the front side as described above, the required number of exposure masks is " 2 " which is the same number as that of the conventional PDP 90 (Figs. It is "1" which is a conventional number. That is, according to the manufacturing method of Fig. 4, the light shielding film 45 can be formed without lowering the yield due to misalignment.

Fig. 5 is a sectional view of the main portion of the PDP 2 according to the second embodiment of the present invention, showing the structure of the front side portion of the discharge space. In the PDP 2, a light shielding film 46 having the same width as the reverse slit S2 is formed on the inner surface of the glass substrate 11 on the front side. Similar to the light shielding film 45 of FIG. 3, the light shielding film 46 also has a band shape extending in a line direction in plan view, and constitutes a stripe-shaped light pattern.

In manufacturing the PDP 2, after forming the display electrode pairs X and Y on the glass substrate 11, a black pigment having a heat resistance of 600 ° C. or higher, such as iron oxide or cobalt oxide, for example, is formed in the reverse slit region ( The light shielding film 46 is formed by printing on S2). And low melting glass is baked at the temperature of 500-600 degreeC, and the dielectric layer 17 is formed.

The thickness of the light shielding film 46 is preferably equal to or less than the thickness of each display electrode pair in terms of ensuring flatness of the surface of the dielectric layer 17. In addition, it is preferable that the dielectric layers 17 have a two-layer structure and fire for each layer. That is, first, the low melting glass paste is applied relatively thinly and baked to form the lower dielectric layer 17a. Thereafter, the low melting glass paste is applied again and baked to obtain a dielectric layer 17 having a required thickness, thereby forming the upper dielectric layer 17b. When the lower dielectric layer 17a in contact with the light shielding film 46 is made thin, the flow of the black pigment accompanying softening of the low melting point glass at the time of firing can be reduced, and the light shielding film 46 is unnecessarily spread out to prevent the luminance from falling Can be. If the thickness of the lower dielectric layer 17a is set to 1/10 or less of the width of the light shielding film 46, the effect of the pigment flow does not appear substantially.

In addition, it is possible to prevent the light-shielding film 46 from unnecessarily spreading even when the firing temperature of the lower dielectric layer 17a is lower than the softening temperature of the low melting glass. In this case, the thicknesses of the lower dielectric layer 17a and the upper dielectric layer 17b may be the same, and the upper dielectric layer 17b may be thinner than the lower dielectric layer 7a.

Fig. 6 is a sectional view of the main portion of the PDP 3 according to the third embodiment of the present invention, showing the structure of the front side portion of the discharge space. In the PDP 3, a light shielding film 47 is disposed for each reverse slit S2 in the middle portion of the dielectric layer 17 in the thickness direction. Like the light shielding film 45 of FIG. 3, the light shielding film 47 also has the strip | belt shape extended in a line direction by planar view, and comprises a stripe-shaped light shielding pattern.

The width w47 of the light shielding film 47 is also larger than the width w2 of the reverse slit S2, and is short at the discharge slit S1 side of the metal electrode 42 with the reverse slit S2 interposed therebetween. Smaller than the width w22 of the liver. That is, the planar dimension of the light shielding film 47 is selected so that it may overlap with a part of each metal electrode 42. This makes it easier to determine the position of the light shielding film 47 so as to completely overlap with the reverse slit S2 and not overlap with the light transmitting portion in the line.

7 is a sectional view of principal parts of the PDP 4 according to the fourth embodiment of the present invention. Although the light shielding film 45 shown in FIG. 2 was formed between the X and Y electrodes 41 and 42 and the front glass substrate 10, in the PDP 4 shown in FIG. 7, the X and Y electrodes 41 and 42 were formed. The light shielding film 49 is formed so that a part may overlap on the X and Y electrodes 41 and 42 in the reverse slit S2 area therebetween. This structure is similar to that of FIG. 2 in that the light shielding film 49 is formed so as to completely cover the reverse slit area between the display line regions L. However, the light shielding film 49 containing black pigment is X, Y It is different in that it is a manufacturing process formed after forming the electrodes 41 and 42. This manufacturing process will be described later in detail.

In the structure of the PDP 4 shown in Fig. 7, it is significant that the light shielding film 49 is superposed so that an end part is positioned on the bus electrode 42 having a three-layer structure of Cr / Cu / Cr. That is, the bus electrode 42 is formed to give higher conductivity than the high resistance material of the transparent electrode 41, but has a light shielding property as such. Therefore, when the light shielding film 49 is formed to overlap the bus electrode 42, portions other than the display line region L are completely shielded.

8 is a sectional view of principal parts of the PDP 5 according to the fifth embodiment of the present invention. In this structure, the light shielding film 48 is formed between the X and Y electrodes 41 and 42, and the light shielding film 48 is formed apart without contacting the X and Y electrodes 41 and 42. For example, when the distance between the non-display area portions of the X and Y electrodes 41 and 42 is 500 占 퐉 (example of 42-inch PDP), the distance between the X and Y electrodes 41 and 42 is about 20 占 퐉. Such a structure is not a structure which completely shields between the display line regions L, but is preferable in view of the manufacturing process. That is, as in the case of the PDP 4 shown in Fig. 7, the light shielding film 48 can be formed after the X and Y electrodes 41 and 42 are formed, and further, the dielectric layer 17 made of low melting glass is formed thereon. The light shielding film can also be fired together with the firing step of (). In the firing step at a high temperature, the light shielding film 48 does not come into contact with the X and Y electrodes 41 and 42, thereby achieving stable processing. This point will be described later in detail.

In the structure of the PDP 5 shown in Fig. 8, the width of the light shielding film 48 is considerably narrower than that of the non-display area W22 with respect to the alignment (positioning) when the light shielding film 48 is formed. 48 may be aligned so that they do not overlap on the display line area L. FIG.

9 and 10 are cross-sectional views illustrating the manufacturing method of the PDPs of the second, fourth and fifth shown in Figs.

As shown in Fig. 9A, as a passivation film on the glass substrate 11, a transparent electrode 41 is formed on the entire surface by sputtering, for example, on the silicon oxide film. The material of the transparent electrode 41 is made of ITO, and formed to a thickness of about 0.1 탆. Then, the X and Y electrodes 41 and 42 having a width of about 180 mu m are formed by patterning the stripe by a normal lithography process.

Next, as shown in Fig. 9B, a metal layer 42 having a three-layer structure of Cr / Cu / Cr as a bus electrode layer is formed on the entire surface by a sputtering method having a thickness of about 1 mu m. And it patterns by about 60 micrometers by a normal photolithography process. As described above, the bus electrode 42 is formed to be positioned at an end opposite to the opposite side of the transparent electrode 41.

The formation of the X and Y electrodes 41 and 42 is performed by sputtering a glass substrate in a high vacuum chamber. However, since the light blocking films containing black pigment are not formed on the glass substrate 11, sputtering is performed. High vacuum treatment can be performed stably.

Next, as shown in Fig. 9C, a photoresist layer 71 containing a black pigment is formed by screen printing. This black pigment is an oxide of manganese (Mn), iron (Fe), copper (Cu), for example, and such a pigment is mixed in the photoresist of a photosensitive material. For example, a pigment dispersion type photoresist (trade name CFPR BK) manufactured by Tokyo Chemical Industries, Ltd. is used.

As shown in Fig. 9 (d), the film is exposed and developed through a predetermined mask pattern, and, for example, baked (dry) for 2 to 5 minutes in a dry atmosphere at a temperature of 120 to 200 ° C to form a light shielding film 49. In the example of Fig. 9 (d), like the PDP 4 shown in Fig. 7, the light shielding film 49 is patterned by being superimposed on the X and Y electrodes 41 and 42.

If the mask pattern is changed at this time, the light shielding film 48 may be formed away from the electrodes 41 and 42 as shown in Fig. 9E. This structure becomes the structure of the PDP 5 shown in FIG. Similarly, the light shielding film 46 may be formed as in the structure shown in FIG.

Since the light-shielding films 49 and 48 are made of a photosensitive resist made of a polymer organic material as described above, when the light-shielding film is formed before the electrode 41 and calcined for stabilization, the adhesion of the electrode 41 to the surface is uneven. Sometimes it gets worse. In this regard, the process of Fig. 9 is advantageous.

Fig. 10 is a cross sectional view showing the manufacturing process for forming the dielectric layer 17 and the MgO layer 18 of the protective layer on the light shielding film. In this example, the light shielding film 48 separated from the electrodes 41 and 42 as shown in Figs. 8 and 9 (e) will be described as an example.

In the manufacturing process of the dielectric layer 17 shown in FIG. 10, the baking of the light shielding film 48 is also performed simultaneously in the baking process of the dielectric layer 17. FIG. In the formation of the dielectric layer 17, a paste of low melting glass containing lead oxide (PbO) as a main component is printed and baked on the surface, and the process is performed by printing at least the lower dielectric layer 17a and the upper dielectric layer 17b. It becomes two processes of baking. As the lower dielectric layer 17a, the viscosity is not lowered in the firing atmosphere, and a composition which is difficult to react with ITO of the transparent electrode 41, copper (Cu) of the bus electrode 42, or the like is selected. For example, in the case of a glass paste containing Pb / SiO ₂ / B ₂ O ₃ / ZnO, a material containing a relatively large amount of SiO ₂ is selected.

As the upper dielectric layer 17b, a composition in which the viscosity is sufficiently lowered and the surface is flat in the minor component crisis is selected. For example, in the case of the glass paste containing PbO / SiO ₂ / B ₂ O ₃ / ZnO, a material containing relatively little SiO ₂ is selected.

Figure 10 (a) a glass paste containing _{PbO / SiO 2 / B 2 O} 3 / ZnO containing a relatively large amount of SiO ₂ as shown in is printed on the surface of the glass substrate 11. And it bakes for 60 minutes in the dry atmosphere of about 580-590 degreeC. The glass paste does not have a low viscosity even under a sintering temperature, and therefore, the glass paste hardly reacts with ITO of the transparent electrode 41 or copper (Cu) of the bus electrode 42. It is also baked together with the light shielding film 48. The baking process can be saved compared with the case where the light shielding film 48 is formed before the electrodes 41 and 42.

Next, as shown in Fig. 10B, an upper dielectric layer 17b is formed. As in the case of the lower layer, the glass paste is printed and fired for about 60 minutes in a dry atmosphere at about 580 to 590 ° C. The glass paste as the one containing a relatively small number containing SiO ₂ as described above, _{PbO / SiO 2 / B 2 O} 3 / ZnO glass paste is preferred. As a result, a dielectric layer 17 having a flat surface is formed.

Finally, after the thick film of the low melting glass material for sealing is formed around the glass substrate 11 (not shown), the MgO film 18 is formed by the vapor deposition method as shown in Fig. 10C.

In the process of FIG. 10, the light shielding film 48 is separated from the electrodes 41 and 42 by way of example. However, as described above, the light shielding film is applied to the electrode 41 as in the PDPs 2 and 4 shown in FIGS. 5 and 7. You may be in contact. However, although the reason is not clear, when the light shielding film is placed in a firing atmosphere close to 600 ° C. in contact with the electrodes 41 and 42, the light shielding film may turn brown, and as with the light shielding film 48, It is sometimes possible to stay away. The distance away in this case is referred to as discoloration gap for convenience.

Fig. 11 is a plan view when the light shielding film 48 is also formed in the peripheral portion outside the display area of the panel. 12 is a cross-sectional structural view of the portion indicated by XX-YY in FIG. As described above, the light shielding film 48 is formed between the X electrode and the Y electrode between the display line regions L1, L2, and L3 to increase the contrast. In FIG. 11, the light shielding film 48 is further formed in other peripheral parts.

In the PDP, dummy X and Y electrodes DX and DY are provided in the periphery of a pair of X and Y electrodes X1, Y1, X2, Y2 X3 and Y3 which are normally paired display electrodes. Discharge is also actively performed between the dummy electrodes DX and DY to prevent accumulation of wall charges unnecessary for display. However, such a discharge in the peripheral area or exposure of the phosphor layer is a factor of reducing the contrast of the display area. Accordingly, as shown in FIG. 11, a light shielding film 48 is formed on the dummy electrodes DX and DY (Dummy in the drawing) and on the peripheral area PE in which the lead portion 42R of the bus electrode 42 is formed. . EX denoted by a dashed-dotted line in the figure is a display screen frame provided on the surface of the panel, and a sealing material 50 for sealing the glass substrate is formed at the position of the frame EX. 12, the sealing material 50 formed on the front glass substrate 11 and the MgO film 18 is shown, and the back glass substrate is abbreviate | omitted.

The lead portion 42R of the bus electrode is connected to an external control circuit through a flexible cable (not shown). Therefore, two glass substrates are sealed by the sealing material 50 in the part of the lead part 42R of the bus electrode.

[Material of Shading Film]

As shown in FIG. 10, the dielectric layer 17 was formed on the light shielding film 48 and fired at about 600 ° C. At this time, when the display electrode pair is in contact with the light shielding film, the black color of the light shielding film 48 may cause a problem of discoloration. The reason for this is not necessarily clear, but during the firing, an ionization tendency occurs between the display electrode pair in contact with the light shielding film, and the low melting glass paste deprives oxygen of the oxides of Mn, Fe, and Cu of the black pigment, and these oxides are reduced. I think. Therefore, it is effective to prevent discoloration by incorporating an oxidizing agent that actively releases oxygen into the photosensitive resist 71 containing the black pigment serving as a light shielding film.

Specific oxidizing agents include NaNO ₃ , BaO _2, and the like. As a result, it was confirmed that discoloration does not occur even after the firing process.

In addition, the light shielding film can increase the display contrast of the PDP by not leaking light from the inside of the PDP to the outside. On the other hand, since it is black, light from the outside is specularly reflected at the interface between the light shielding film 48 and the glass substrate 11, and projection by this specular reflection occurs, making the surface of the display screen difficult to see. The specular reflection between the pairs of display electrodes was generated on the surface of the address substrate in the form of a back substrate even in a structure in which a conventional light shielding film was not formed. Therefore, in order to prevent the specular reflection at the interface between the light shielding film 48 and the glass substrate 11, a low melting glass powder is mixed in the material of the light shielding film.

This low melting glass powder is, for example, the same material as the dielectric layer 17, and is contained in the organic photosensitive resist 71 about 50%. Therefore, the organic photoresist 71 contains black pigment and low melting point glass powder. As a result, the specular reflection of external light occurs on the front side of the front glass substrate 11 as in the prior art, but the refractive index of the light shielding film 48 is close to the refractive index of the glass substrate 11 at the interface between the glass substrate 11 and the light shielding film 48. Therefore, the reflectance is halved by that much. Moreover, light is absorbed by the black pigment of the light shielding film 48, and the reflected light by that is further reduced. Therefore, since the specular reflection on the display screen as a whole is reduced, the degree of invisibility due to projection is improved.

When the low melting glass was not mixed, the reflectance was about 8% (4% at the glass surface and 4% at the interface) .However, when the low melting glass powder was incorporated into the light shielding film 48, the specular reflectance was about 6% ( 4% at the glass surface and 2% at the interface).

A light shielding film is formed to increase the contrast of the display screen as described above. In the formation, an oxidizing agent is mixed to prevent discoloration during firing, and a low melting glass powder is mixed to prevent specular reflection.

In addition, a method for preventing discoloration of the light shielding film is to cover each display electrode pair with a thin insulating film, for example, an SiO ₂ film, and to make the light shielding film and the display electrode pair non-contact by the insulating thin film.

Fig. 13 is a sectional view of a modification of the PDP. 13 shows the glass substrate 11 on the front side and the glass substrate 21 on the back side. In this example, the light shielding film 48 is in the region between the display lines L, the example of the light shielding film 48A formed on the outer surface of the front substrate 11, the example of the light shielding film 48B formed in the dielectric layer 17, and the back surface. An example of the light shielding film 48C formed on the fluorescent film 24 of the side substrate is shown.

Even if the light shielding film 48 is formed in these positions, the light from the fluorescent film 24 can be prevented from leaking to the front surface side.

In the above description, the reflective PDPs 1, 2, 3, 4, and 5 are illustrated, but the present invention can also be applied to a transmissive PDP in which the phosphor layer 28 is disposed on the glass substrate 11 on the front side. Further, a light shielding film may be formed on the outer surface of the glass substrate 11. In this case, however, alignment between glass substrates is necessary.

According to the present invention, the non-light emitting area between the display lines can be made inconspicuous, and the display contrast can be increased.

According to the present invention, reflection of external light on the surface of the phosphor layer can be prevented, and high contrast display can be realized.

According to the present invention, it is possible to prevent the reflection of the external light between the display lines and the reflection of the external light on the surface of the metal electrode, thereby realizing high contrast display.

According to the present invention, it is possible to prevent the light shielding film from spreading during the formation of the dielectric layer, thereby preventing the decrease in luminance.

Since the light shielding film can be formed without increasing the number of mask alignments for patterning, the present invention can increase the contrast while maintaining the yield.

According to the present invention, since the light shielding film and the dielectric layer can be formed and baked at the same time after the display electrode pairs are formed, it can be formed by a relatively stable process.

Claims (4)

On the front substrate, a plurality of pairs of predetermined reverse slits which do not discharge each of the display electrode pairs disposed with the discharge slits for the surface discharge interposed therebetween are arranged, and a dielectric layer covering the display electrode pairs is provided. In a three-electrode surface discharge plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors intersecting the display electrode pairs on a rear substrate, A light shielding film is provided at a position corresponding to the reverse slit portion between adjacent pairs of display electrodes on the front substrate and in the middle of the dielectric layer in a thickness direction so as to be spaced apart from the display electrode pair, and the reverse slit by the light shielding film. A surface discharge plasma display panel, characterized in that it is configured to block perspective of the phosphor on the rear substrate. On the front substrate, a plurality of pairs are arranged in parallel with a predetermined reverse slit for discharging the display electrode pairs interposed therebetween with discharge slits for surface discharge interposed therebetween, and intersect with the display electrode pairs on the back substrate. In a three-electrode surface discharge type plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors, In the reverse slit portion between adjacent pairs of display electrodes of the front substrate, a band-shaped light shielding film for blocking the projection to the stripe-shaped phosphor on the rear substrate is provided. Each of the display electrode pairs is composed of a transparent electrode and a metal electrode having a width smaller than that of the transparent electrode and overlapping the edge portion of the transparent electrode and closer to the reverse slit portion. Covered with the discharge space, And the light shielding film is disposed on the front substrate side of the display electrode so as to overlap the metal electrode on both sides of the reverse slit portion in plan view. On the front substrate, a plurality of pairs are arranged in parallel with a predetermined reverse slit for discharging the display electrode pairs interposed therebetween with discharge slits for surface discharge interposed therebetween, and intersect with the display electrode pairs on the back substrate. In a three-electrode surface discharge plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors, A band-shaped light shielding film partially overlapping with the display electrode is provided in the reverse slit portion between adjacent pairs of display electrodes on the front substrate, and the light shielding film is provided to the phosphor on the rear substrate at the reverse slit portion. Surface discharge type plasma display panel, characterized in that configured to block the perspective. On the front substrate, a plurality of pairs of the display electrodes paired with the discharge slits for the surface discharges interposed therebetween are arranged in parallel with a predetermined reverse slit not interposed therebetween. In a three-electrode surface discharge type plasma display panel comprising a plurality of address electrodes and a plurality of stripe-shaped phosphors, A band-shaped light shielding film in contact with the display electrode at an end portion is provided in the reverse slit portion between adjacent pairs of display electrodes of the front substrate, and the back substrate is formed in the reverse slit portion by the light shielding film. Surface discharge type plasma display panel, characterized in that configured to block the projection to the above phosphor.