KR100317352B1 - Video signal vertical converter of tv system - Google Patents

Abstract

PURPOSE: A video signal vertical converter of a TV system is provided to vertical-convert an arbitrary line at an arbitrary ratio by changing only a filter factor without converting the original signal so as to offer a stable clock signal. CONSTITUTION: A video signal vertical converter of a TV system includes a signal judgement unit(21) for judging if an input broadcasting signal is a PAL signal or an NTSC signal, a demodulator(22) for sampling the input broadcasting signal with color sub-carrier frequency determined by the signal judgement unit and then demodulating the signal, and a clipper(23) for clipping the output signal of the demodulator to restrict the level of the signal to a predetermined magnitude. The vertical converter further includes a compander for companding the output signal of the clipper, a high pass filter(26) that converts a filter factor under the control of the signal judgement unit and vertical-filters the output signal of the companding unit with the factor to output a high luminance signal, and a divider(25) for dividing the input broadcasting signal into luminance and color components. The vertical converter also has a low pass filter(27) that converts a filter factor and vertical-filters the output signal of the divider with the factor to output a low luminance signal, and an adder(28) for adding up the outputs of the high pass filter and low pass filter to output a luminance signal.

Description

Video signal vertical conversion device of TV system

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for vertically converting an image signal in a polyphase manner in a television system. In particular, an image signal of a television system for vertically converting an image signal by converting the number of lines at an arbitrary ratio with respect to an arbitrary number of lines. A vertical converter.

In a typical TV system, the number of lines was determined and the conversion restoration ratio of the number of lines was fixed. Therefore, the TV system has a disadvantage in that the system becomes unstable when noise occurs because the number of lines for converting a video signal is fixed due to its characteristics.

In order to solve the disadvantages of the related art, the present invention extracts high and low luminance components by determining an input signal and varies sampling frequency, transforms filter coefficients, and calculates an arbitrary line at any ratio by calculating the extracted luminance component. An object of the present invention is to provide a vertical conversion device for a video signal of a TV system which is designed to perform vertical conversion.

The present invention provides a signal discriminating means for determining whether an input signal is a PAL method or an NTSC method, demodulation means for sampling and demodulating the input signal at a predetermined frequency fsc, and an output level of the demodulation means. A clipping means for limiting the output signal, a companding means for non-linearly compressing the output of the clipping means, and outputting a high-frequency luminance signal, and converting filter coefficients under the control of the signal discriminating means, A high pass means for vertically converting the output, a luminance / color separation means for separating the input signal into luminance and a color signal, and a filter coefficient being converted by the control of the signal discrimination means to convert the low-pass luminance signal of the luminance / color separation means. A low pass means for vertical conversion and an addition means for outputting a luminance signal by summing outputs of the high pass means and the low pass means; The.

The high pass means and the low pass means include a luminance data storage unit for calculating an input luminance signal and outputting luminance data, a filter coefficient storage unit for outputting filter coefficients under the control of the luminance data storage unit, and the filter coefficient storage unit. A multiplier for multiplying the filter coefficients and the luminance data of the luminance data storage unit, an adder for summing outputs of the multiplier and outputting a luminance signal, and a digital-to-analog converter for analog-converting the output of the adder.

The filter coefficient storage unit built in the high pass means is composed of (Q / N) (1 / M) ROMs when the filter tap is Q.

However, M and N are up down sampling coefficients.

The filter coefficient storage unit built in the low pass means is composed of (Q / M) ROMs when the filter tap is Q.

Hereinafter, described in detail with reference to the accompanying drawings of the present invention.

5 is a block diagram of an embodiment of the present invention, as shown therein, a signal discrimination circuit 21 for discriminating whether an input signal is a PAL method or an NTSC method, and demodulating the input signal after sampling at a predetermined frequency fsc. The demodulation circuit 22, a clipper 23 for limiting the output of the demodulation circuit 22 to a constant level, and a comb for non-linearly compressing the output of the clipper 23 to output a high-frequency luminance signal. A high pass circuit 26 for converting filter coefficients under the control of the compander 24 and the signal discrimination circuit 21 to vertically convert the output of the compander 24; A luminance / color separation circuit 25 for separating into color signals and a low pass circuit for vertically converting low-pass luminance signals of the luminance / color separation circuit 25 by converting filter coefficients under the control of the signal discriminating circuit 21. (27) and exit of the high pass circuit 26 and the low pass circuit 27 The sum will be composed of an addition circuit 28 and a switch (SW1) for switching an input signal to the demodulation circuit 22 and a luminance / color separation circuit 25 for outputting a luminance signal.

The high pass circuit 26 and the low pass circuit 27 calculate the input luminance signal to output a luminance data, and the filter coefficients are controlled by the luminance data storage section 11 and the luminance data storage section 11. An output filter coefficient storage section 13, a multiplication section 12 for multiplying the filter coefficients of the filter coefficient storage section 13 and the luminance data of the brightness data storage section 11, and the multiplication section 12; And an digital adder 14 that adds the outputs of the? And outputs the luminance signal, and a digital-to-analog converter 15 that converts the output of the adder 14 into analog.

The filter coefficient storage unit 11 embedded in the high pass circuit 26 is composed of (Q / N) (1 / M) ROMs when the filter tap is Q.

The filter coefficient storage unit 11 embedded in the low pass circuit 27 is composed of (Q / M) ROMs when the filter tap is Q.

When described in detail with reference to Figures 2 to 4 attached to the operation and effects of the present invention configured as described above are as follows.

In general, the vertical conversion of the video signal is a QMF (Quadrature), which is a low pass filter 11B and a high pass filter 12A having a cut-off frequency at Nπ / M in the vertical direction of the luminance signal of the q line input from the transmitting end. Using a Mirror Filter (right angle symmetric filter), the low frequency component in the vertical direction is the luminance signal Y _L of the q * (N / M) line, and the high frequency component is the luminance of the q * {(MN) / M} line. Convert to signal Y _H.

Here, the rectangular symmetric filter has the filling characteristics as shown in FIG.

At this time. The N / M decimation filter 2 is used to generate the luminance signal Y _L of the q * (N / M) line at the transmitting end, and the luminance of the q * {(MN) / M} line. (MN) / M decimation filter 1 is used to generate the signal Y _H.

Here, the filters used are low and high pass filters, each having an N / M cut-off.

Now, the luminance signal thus generated is transmitted to the receiver through the transmission channels 6A and 6B, and the receiver recovers the original signal through filtering.

At this time, as shown in FIG. 1, when upsampling by N times and then downsampling by M times at the low end of the transmitting end, the receiving end upsamples by M times and then downsamples by N times.

Each of the filters applied to FIG. 1 has the same characteristics as those of FIG. 2. When the respective filters are H _L1 (n) and H _H1 (n), the relationship between these tubes is as follows.

The reason for the above equation (1) is due to the characteristics of interpolation and decay. That is, at the receiving end, the low-pass filter side has a gain of M times, the high-pass filter side has a gain of -M times, and the adder 16 adds the outputs passing through the two filters to obtain a desired reproduction signal.

However, in order to perform upsampling of N times and M times, the clock must be increased, but using a polyphase network, filtering can be performed using the same clock.

In this case, the polyphase network for the low pass circuit 4 and the high pass circuit 3 of FIG. 1 using the polyphase network method is expressed as follows.

i) low pass circuit

ii) High pass circuit

If the multi-phase network for Equation (2) and (Equation 3) is implemented in hardware, it is configured as shown in FIG. 4.

First, when FIG. 4 is implemented as a low pass circuit, the luminance data storage unit 11 samples the input luminance signal Y by an analog (A) / digital (B) converter at 4fsc (17.72MMZ). In order to store only the actual luminance signal components excluding the synchronous signal and the color burst part of the extracted signals in the RAM, the vertical synchronous signal is detected to recognize the starting point of a field, and then the instant the horizontal synchronous signal is detected. Count the number of samples from.

When the value of the number of samples is 128, a "high" signal is output and stored in the RAM by validating the output signal of the A / D converter.

Thereafter, when data necessary for the RAM is stored, the RAM is placed into a read enable state at the moment of counting a predetermined number of lines.

At this time, the RAM receives the storage data of the ROM as an address and outputs the data of the corresponding area to the multipliers MP1 to MPn of the multiplier 12.

On the other hand, the line coefficient value is divided by M, and the remaining filter values are addressed to the ROMs (ROM _{1 to} ROMn) of the filter coefficient storage unit 13, and the stored filter coefficient values are output to the multipliers MP1 to MPn of the multiplier 12. Done.

Here, the filter coefficient storage unit 13 includes Q / M ROMs when the filter tap is Q, and the number of filter coefficients is a multiple of the least common multiple of M and N.

Accordingly, the luminance signal of the luminance data storage unit 11 is filtered by the filter coefficients of the filter coefficient storage unit 13, and the filtered signals are summed by the adder 14 and then analogized through the D / A converter 15. Is output as the luminance signal Y _L.

However, the addressing order of the RAM by data stored in the ROM embedded in the luminance data storage unit 11 is as follows. (However, the following numbers mean lines and it is assumed that MN = 1). )

1 → 2 → 2 → 3 → 4 → 5 → 5 → 6 → 7 → 8 → 8 → 9 → 10 → 11 → 11 ‥ (2 + M-1) → (2 + M)

And, in the case of implementing the high frequency communication circuit of FIG. 4, the luminance data storage unit 11 is the same as the structure and operation of the low pass circuit, and the filter coefficient storage unit 13 is the filter tap Q (Q / N) * (Q / M) ROMs will be embedded.

Here, the line output number order of the sample data output from the RAM embedded in the luminance data storage unit 11 is as follows.

1 → 1 → ‥ 1 → 1 → 2 → 2 → ‥ ・ 2 → 2 → 3 → 3 → ‥ 3 → 3 → 4 → 4 → 4 → 4

Thus, as shown in FIG. 1, the luminance signals Y _L and Y _H respectively output from the high pass circuit and the low pass circuit are summed up through the adder 5 and output as the final luminance signal Y. FIG.

An embodiment of FIG. 6 applying a high pass circuit and a low pass circuit to perform the above operation is as follows.

First, when a broadcast signal is input, the signal determination unit 21 determines whether the broadcast signal is a PAL broadcast or an NTSC broadcast, and selects a sampling frequency fsc input to the demodulation circuit 22 according to the broadcast mode determination.

At this time, when the broadcast signal is input to the demodulation circuit 22 through the switch SW1 and the high-frequency luminance component is input, the signal discrimination circuit 21 switches the switch SW1 to convert the broadcast signal into the luminance / color separation circuit ( 25).

Accordingly, when the demodulation circuit 22 samples and demodulates a high-frequency luminance component at a predetermined frequency fsc, the clipper 23 limits the magnitude to a predetermined level and the signal whose size is limited is a compander 24. And is inputted to the high pass circuit 26.

The luminance / color separation circuit 25 separates the broadcast signal into low-pass luminance components and color components, and then outputs the separated low-pass luminance components to the low-pass circuit 27.

Therefore, the high pass luminance signal Y _H is output through the vertical filtering in the high pass circuit 26 implemented as in Equation (3), and the vertical filtering is performed in the low pass circuit 27 implemented as in Equation (2). Through the low luminance signal Y _L is output.

The high-band luminance signal Y _H and the low-band luminance signal Y _L are summed by the adder 28 and output as a final luminance signal Y.

As described in detail above, the present invention uses the multiphase network to determine the broadcasting mode and converts only the filter coefficients to be filtered without converting the original signal. It is possible to prevent noise from being mixed by high frequencies and to provide a stable clock signal.

1 is a general video signal vertical conversion block diagram.

2 is the frequency spectrum of each filter in FIG.

3 is an explanatory diagram of data transmission for vertical filtering.

4 is an embodiment block diagram for a filter in FIG.

5 is a block diagram of a vertical conversion device of the present invention.

*** Explanation of symbols for main parts of drawing ***

1,2: decimation filter 3: high pass circuit

1A, 1C, 2A, 2C, 3A, 3C, 4A, 4C: Sampling frequency converter

4: low pass circuit 5,14,28: adder

6A, 6B: Transmission channel 11,26.27: Luminance data storage

12: multiplication unit 13: filter coefficient storage unit

15: digital to analog converter 21: signal discrimination circuit

22: demodulation circuit 23: clipper

24: compander 25: luminance / color separation circuit

SW1: Switch

Claims (6)

Signal demodulation means for checking the input signal to determine whether it is PAL or NTSC, and demodulating the input broadcast signal after sampling the input broadcast signal at the color subcarrier frequency (fsc) determined by the signal discrimination means. Means for clipping the output of the demodulation means and limiting the level to a predetermined size; companding means for extending the output of the clipping means; and outputting the companding means from the signal discriminating means. A high pass means for converting filter coefficients by control and vertically filtering the output of the companding means with the filter coefficients to output a high frequency luminance signal Y _H , and means for separating the input broadcast signal into luminance and color components; And converting the filter coefficients under the control of the signal discriminating means, and vertically filtering the output of the luminance / color separation means with the filter coefficients to obtain a low-pass luminance signal Y _L For the low-pass means for the output, the output of the high-pass means (Y _H) and a television system, characterized in that configured by adding means for outputting an output luminance signal by summing the (Y _L) (Y) of the low-pass means Video signal vertical conversion device. The apparatus of claim 1, further comprising a switch for switching the broadcast signal to demodulation means and luminance / color separation means under control of the signal discrimination means. 2. The high pass means according to claim 1, wherein the high pass means comprises: a luminance data storage unit for outputting the luminance signal by counting the number of lines of the luminance signal and the number of samples of the lines, and a filter coefficient for outputting filter coefficients under control of the luminance data storage unit. A storage unit, a multiplication unit for multiplying and filtering the output of the filter coefficient storage unit and the output of the luminance data storage unit, an adder for summing the outputs of the multiplication unit and outputting a final luminance signal, and converting the output of the adder into an analog conversion The video signal vertical conversion device of a TV system, characterized by comprising a digital to analog converter. The apparatus of claim 3, wherein the filter coefficient storage unit includes (Q / M) * (1 / N) ROMs. 5. (Where Q is the number of filter taps and M and N are the up and down sampling coefficients.) The video signal vertical converting device of a television system according to claim 1, wherein the low pass means is configured in the same manner as the high pass means. The apparatus of claim 5, wherein the filter coefficient storage unit includes Q / M ROMs (where Q is the number of filter taps and M is an up / down sampling coefficient).