JPH04371090A - Video signal processing circuit - Google Patents

Abstract

PURPOSE:To reduce the load of hardware by reducing signal processing speed at a digital part. CONSTITUTION:By arranging a time extension circuit 23 conventionally arranged between gamma correction circuits 21-1 to 21-3 and a D/A converter 25 at an input stage, a signal compressed in time to 11/12 on the side of transmission is extended in time to 12/11. Thus, the speed of an input signal can be reduced and digital signal processings subsequent to it can be calmly conducted.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit that handles digital video signals, and more particularly to a video signal processing circuit that reproduces a MUSE signal received in a MUSE television receiver into an original high-definition signal.

0002

[Prior Art] Currently, the development of high-definition (high-definition television) broadcasting using satellites is progressing and has already reached the stage of practical use.
iple Sub-nyquist Sampling
encoding method is used.

[0003] In this MUSE method, the bandwidth is 22 MHz.
A baseband signal containing a luminance signal with a bandwidth of 7 MHz and a color signal with a bandwidth of 7 MHz is converted into a
In order to transmit using one MHz channel, this baseband signal is band-compressed to approximately 8.1 MHz. This band compression is performed by thinning out a complete sampling point group extracted from the original video signal according to a predetermined rule. When thinning out the sampling points, we take advantage of the physiological characteristic of the viewer that the resolution in the diagonal direction on the screen is lower than in the vertical and horizontal directions.
Sampling takes place. It also takes advantage of the physiological characteristic of viewers that they do not notice much deterioration in image quality even if the resolution decreases a little in moving areas.

[0004] The decoder on the receiving side performs a so-called interpolation process in which the sampling points thinned out by the encoder on the transmitting side are reproduced based on a group of sampling points before and after those actually sent and received and inserted into the missing points. It is designed to do this.

FIG. 6 shows the general configuration of a conventional video signal processing circuit on the receiver side. This circuit has a Y signal input terminal (11) to which a digital luminance signal (hereinafter referred to as the Y signal) is input, and a digital color difference signal (hereinafter referred to as the (RY) signal) to which it is input (R -Y
) signal input terminal (12), and (B-Y) signal input terminal (13) into which a digital color difference signal (hereinafter referred to as (B-Y) signal) is input. Of these, the Y signal input terminal (11) is directly connected to the inverse matrix circuit (14), and the high-pass filter (
15) is also connected. Further, the (RY) signal input terminal (12) and the (B-Y) signal input terminal (13) are connected to the inverse matrix circuit (14) via the color signal interpolation circuit (16).
)It is connected to the.

From the inverse matrix circuit (14), R, G,
Each of the B signals is output and added to the output of the high-pass filter (15) by adders (17) to (19), respectively. The output side of the adders (17) to (19) is connected to the gamma correction circuit (21-) of the gamma correction section (21).
1) to (21-3) respectively, the time expansion circuit (
23). Each of the RGB signals time-expanded by the time expansion circuit (23) is sent to a D/A converter (
25-1) to (25-3), it is converted into an analog RGB signal, and then passed through a low pass filter (LPF) (26) to (28).
) are outputted from output terminals (31) to (33).

The operation of the conventional video signal processing circuit configured as above will be explained. The Y signal with a speed of 48.6 Mbps, the (RY) signal and the (B-Y) signal with a speed of 16.2 Mbps decoded from the MUSE signal are input to the Y signal input terminal (11) and the (R-Y) signal, respectively. Input terminal (12)
, and (B-Y) are input to the signal input terminal (13). Of these, the Y signal is input to a high-pass filter (15), and its high-frequency components are extracted with a transfer characteristic as shown in the following equation (1).

H0 (Z0 −1)=k[1−(Z0 −1+Z
0 )/2]... (1) Here, Z0 is a function regarding the horizontal frequency f as shown in the following equation (2).

Z0 =exp(j2πf/f0)
… (2
) However, k is a positive constant and f0 is 48.6 MHz.

The color signal interpolation circuit (16) performs interpolation calculations on each of the (R-Y) signal and the (B-Y) signal,
(RY) signal and (B-Y) at a speed of 48.6 Mbps
Outputs the signal. The inverse matrix circuit (14) receives the Y signal input from the Y signal input terminal (11) and the 48.6 Mbps (R) output from the color signal interpolation circuit (16).
-Y) signal and (B-Y) signal, the following formula (3
) and perform the calculations shown in 48.6Mbps RGB
Output a signal.

[0011]

[Math 1]

4 extracted by the high-pass filter (15)
The high frequency component of the 8.6 Mbps Y signal is sent to the adder (17).
~(19), they are respectively added to the 48.6 Mbps RGB signals output from the inverse matrix circuit (14). As a result, from the adders (17) to (19), 4
8.6 Mbps contour-corrected RGB signals are output, and are further subjected to gamma correction by gamma correction circuits (21-1) to (21-3), respectively. As a result, the gamma correction unit (21) outputs 4 images that have been subjected to contour correction and gamma correction.
An 8.6 Mbps RGB signal is output and input to the time expansion circuit (23).

[0013] The time expansion circuit (23) has an 11/1
Processing is performed to time-expand the signal compressed to 12/12 to 12/11. As a result, the 48.6 Mbps RGB signal is converted to the 44.55 Mbps RGB signal and the
/A converter (25).

The digital RGB signals input to the D/A converter (25) are sent to D/A converters (25-1) to (25-1).
5-3), each is converted into an analog signal. Furthermore, the low-pass filters (26) to (28) remove aliasing noise components by limiting the high frequency band and passing only the low horizontal frequency band, as shown by the shaded area in FIG.

In this way, the output terminals (31) to (3
3) outputs RGB signals as reproduced analog signals.

[0016]

SUMMARY OF THE INVENTION As described above, in conventional video signal processing circuits, signal processing is performed at high speed in the digital section. Therefore, the load on the hardware was extremely large, and it was necessary to use high-speed elements. In addition, in the high frequency cut-off process performed after D/A conversion, Figure 4
It was necessary to use a low-pass filter with a steep cutoff characteristic as shown in . As described above, since elements that operate at high speed and low-pass filters having steep cutoff characteristics are generally expensive, there is a problem in that it is difficult to reduce the cost of the entire circuit.

[0017]Therefore, there is a problem that the above problems must be solved.

The present invention was made to solve the above problems, and its first purpose is to provide a video signal processing circuit that can reduce the signal processing speed in the digital section and reduce the load on the hardware. It is about providing.

A second object of the present invention is to provide a video signal processing circuit that can realize necessary cut-off characteristics without using an expensive filter having steep cut-off characteristics.

[0020]

[Means for Solving the Problems] A video signal processing circuit according to the invention as set forth in claim 1 provides (i) processing based on a digital luminance signal and two types of digital color difference signals that are time-compressed and transmitted on a transmitting side; (ii) a color signal insertion circuit that converts the sampling rate of the two types of color difference signals time-stretched by this time expansion circuit to a predetermined times; and (iii) this color signal insertion circuit. (iv) an inverse matrix circuit that performs matrix calculations on the two types of color difference signals output from the circuit and the luminance signal expanded by the time expansion circuit and outputs RGB signals; (v) an adder that adds the output of this high-pass filter to the RGB signals output from the inverse matrix circuit, and (vi) for each output from this adder. (vii
) A digital-to-analog conversion circuit that converts the RGB signals output from the gamma correction circuit into analog quantities.

[0021] The video signal processing circuit according to the second aspect of the invention comprises (i) a high-pass filter for extracting high-frequency components of a digital luminance signal that has been time-compressed and transmitted on the transmitting side; and (ii) A color signal insertion circuit that converts the sampling rate of two types of digital color difference signals time-compressed and transmitted on the transmitting side to a predetermined times, and (iii) two outputs from this color signal insertion circuit and a digital luminance signal. an inverse matrix circuit that performs matrix calculations and outputs RGB signals; (iv) an adder that adds the outputs of the high-pass filters to the RGB signals output from the inverse matrix circuit; (vi) a gamma correction circuit that gives a gamma characteristic to the output of each band-stop filter; and (vii) a time for extending the output of each gamma correction circuit at a predetermined rate. an expansion circuit; (viii) a digital-to-analog conversion circuit that converts each output of the time expansion circuit into analog;
(ix) A low-pass filter that extracts low-frequency components from the output of the digital-to-analog conversion circuit.

[0022] The video signal processing circuit according to the invention as set forth in claim 3 (i) time-expands the digital luminance signal and two types of digital color difference signals, which have been time-compressed and transmitted on the transmitting side, to their original proportions; a time expansion circuit; (ii) a color signal insertion circuit that converts the sampling rate of the two types of color difference signals time-expanded by the time expansion circuit to a predetermined times;
(iii) an inverse matrix circuit that performs matrix calculations on the two types of color difference signals output from the color signal insertion circuit and the luminance signal expanded by the time expansion circuit and outputs RGB signals; and (iv) expansion by the time expansion circuit. (v) an adder that adds the outputs of the high-pass filter to the RGB signals output from the inverse matrix circuit;
) a band-stop filter that band-limits the output of the adder, and (vii) a gamma correction circuit that gives gamma characteristics to the output of the band-stop filter, respectively;
(viii) a digital-to-analog conversion circuit that converts each of the outputs of the gamma correction circuit into analog; and (ix
) A low-pass filter for extracting low-frequency components from the output of the digital-to-analog conversion circuit.

[0023]

In the video signal processing circuit according to the first aspect of the present invention, the input signal is first subjected to time expansion processing, thereby reducing the signal speed and performing various digital signal processing.

In the video signal processing circuit according to the second aspect of the invention, a steep cutoff characteristic can be obtained by adjusting the horizontal frequency characteristic of the output signal using a high-pass filter and a band-elimination filter.

In the video signal processing circuit according to the third aspect of the invention, by first performing time expansion processing on the input signal, it is possible to lower the signal speed and perform various digital signal processing, and also to perform various digital signal processing on the input signal. A steep cutoff characteristic can be obtained by adjusting the horizontal frequency characteristics of the output signal using a pass filter and a band rejection filter.

[0026]

EXAMPLES The present invention will be explained in detail with reference to three examples below.

First Embodiment FIG. 1 shows a video signal processing circuit according to a first embodiment of the present invention. In this figure, the same parts as in the conventional example (FIG. 6) are denoted by the same reference numerals, and the explanation will be omitted as appropriate. In this circuit, a Y signal input terminal (11), a (RY) signal input terminal (12) and a (B-Y) signal input terminal (13) are used.
The Y signal, (RY) signal, and (B-Y) signal respectively input from ) are first input to a time expansion circuit (23). The Y signal output from the time expansion circuit (23) is branched into two and is filtered through a high-pass filter (15).
) and is input to the inverse matrix circuit (14), while (
The R-Y) signal and the B-Y signal are processed by the color signal interpolation circuit (1
6). Other configurations are
The output of gamma correction circuits (21-1) to (21-3) is D
Since it is the same as the conventional example (FIG. 6) except that it is directly connected to the /A converters (25-1) to (25-3), the explanation will be omitted.

The operation of the video signal processing circuit configured as above will be explained. 48. decoded from the MUSE signal.
Y signal with speed of 6Mbps, (R- signal with speed of 16.2Mbps)
The Y) signal and the (B-Y) signal are inputted via the Y signal input terminal (11), (R-Y) signal input terminal (12), and (B-Y) signal input terminal (13), respectively. The signal is input to the decompression circuit (23). The time expansion circuit (23) performs processing to time-expand the signal, which was time-compressed to 11/12 on the transmitting side, to 12/11. As a result, 48.6Mbps
The Y signal with a speed of 44.55 Mbps is converted to a Y signal with a speed of
4) is input. Also, the speed of 16.2Mbps (
RY) signal and (B-Y) signal are both 14.85
The signals are converted into Mbps (R-Y) and (B-Y) signals, respectively, and input to the color signal interpolation circuit (16).

[0029] 4 time-stretched by the time-stretching circuit (23)
The 4.55 Mbps Y signal is a high pass filter (15)
is input, and its high frequency components are extracted with a transfer characteristic as shown in the following equation (4).

H1 (Z1 −1)=k[1−(Z1 −1+Z
1)/2]... (4) Here, Z1 is a function regarding the horizontal frequency f as shown in the following equation (5).

Z1 =exp(j2πf/f1)
... (5
) However, k is a positive constant and f1 is 44.55 MHz.

The color signal interpolation circuit (16) performs interpolation calculations on each of the (R-Y) signal and the (B-Y) signal,
It outputs a (RY) signal and a (B-Y) signal of 44.55 Mbps. The inverse matrix circuit (14) receives the Y signal input from the time expansion circuit (23) and the 44.55 Mbps (R-Y signal) output from the color signal interpolation circuit (16).
) signal and the (B-Y) signal, the calculation shown in Equation 3 is performed, and an RGB signal of 44.55 Mbps is output.

On the other hand, the high-frequency components of the 44.55 Mbps Y signal extracted by the high-pass filter (15) are transferred to the inverse matrix circuit (14) by adders (17) to (19).
and the 44.55 Mbps RGB signals output from the 44.55 Mbps RGB signals. As a result, adders (17) to (19)
Outputs a 44.55 Mbps contour-corrected RGB signal, and further gamma correction circuits (21-1) to (
21-3), each image is subjected to gamma correction corresponding to the characteristics of the cathode ray tube. As a result, the gamma correction unit (21) outputs 44.55 Mb that has been subjected to contour correction and gamma correction.
ps RGB signals are output.

44 output from the gamma correction section (21)
．． The 55 Mbps RGB signals are each input to the D/A converter (25), and the D/A converters (25-1) to (2)
5-3), each is converted into an analog signal. Further, the low-pass filters (26) to (28) remove aliasing noise components by passing only the high horizontal frequency band, as shown by the shaded area in FIG.

In this way, the output terminals (31) to (3
3) outputs RGB signals as reproduced analog signals.

In this way, in this embodiment, the input Y
The decision was made to first perform time expansion processing on the signal, (RY) signal, and (B-Y) signal, and then perform various digital signal processing, allowing digital signal processing to be performed at a slower speed than conventional methods. It can be performed.

Second Embodiment FIG. 2 shows a video signal processing circuit in a second embodiment of the present invention. In this figure, the same parts as in the conventional example (FIG. 6) are denoted by the same reference numerals, and the explanation will be omitted as appropriate. This circuit is provided with band rejection filters (35) to (37), adders (17) to (19) and a gamma correction circuit (
21-1) to (21-3), respectively. The rest of the configuration is the same as that of the conventional example (FIG. 6), so a description thereof will be omitted.

The operation of the video signal processing circuit configured as above will be explained. This circuit's Y signal input terminal (11), (
The operations from the RY) signal input terminal (12) and the (B-Y) signal input terminal (13) to the adders (17) to (19) are completely the same as in the conventional example, and therefore will not be described.

The 48.6 Mbps contour-corrected RGB signals output from the adders (17) to (19) are respectively input to band rejection filters (35) to (37).

FIG. 5 shows the band rejection filter (35) in detail. In addition, the band rejection filter (36)
, (37) are also similar. This circuit includes first and second delay devices (41) and (42), which are connected in series to the input. The R signal input from the adder (17) in FIG. 2 to the first delay device (41) is branched and also input to the first multiplier (43). The output side of the first delay device (41) is branched into two and connected to a second delay device (42) and a second multiplier (44). The output side of the second delay device (42) is connected to the third multiplier (
45). These three multipliers (43)
The outputs of ~ (45) are connected to an adder (46), and the output side of this adder (46) is connected to the gamma correction circuit (
21-1).

Band rejection filter (35
), 48.6 Mbps from the adder (17) in Figure 1
When the contour-corrected R signal is input, this signal is multiplied by 1/4 by the first multiplier (43) and input to the adder (46). The second delay device (42) and the second multiplier (42) are delayed by one clock.
4). The second multiplier (44) multiplies the delayed signal by 1/2 and inputs it to the adder (46). The second delay device (42) further delays the signal delayed by the first delay device (41) by one clock and inputs the delayed signal to the third multiplier (45). The third multiplier (45) multiplies this by 1/4 and inputs it to the adder (46).

The adder (46) adds the outputs of the first to third multipliers (43) to (45). In this way, the transfer characteristic of this band rejection filter (35) becomes as shown in the following equation (6).

H2 (Z0 −1)=1/2+(Z0 −1+Z
0 )/4... (6) Therefore, from equations (1) and (6), the transfer characteristic from the output of the inverse matrix circuit (14) to the output of the band rejection filter (35) in FIG. 1 is expressed by the following equation: The result is as shown in (7).

H3 (Z0 −1)=[1+H0 (Z0 −1
)]・H2 (Z0 −1) … (7) Also, from formulas (1), (2), and (6), the following formula (8
) and formula (9) are derived.

|H0 (Z0 −1)|=(k/2) sin2
(πf/f0) … (8) |H2 (
Z0 −1) |=cos2 (πf/f0)
... (9) And formula (7)
~The following equation (10) is derived from equation (9).

|H3 (Z0 −1)|=[1+(k/2)si
n2 (πf/f0)]
・cos2 (πf/f0)
… (10) Now, the formula (10
), and the RGB signals outputted from the band rejection filters (35) to (37) are sent to gamma correction circuits (21-1) to (21), respectively.
-3), the signal is subjected to gamma correction corresponding to the characteristics of the cathode ray tube, and the time is expanded in the time expansion circuit (23).

Since the data rate of the output of the time expansion circuit (23) changes, its transfer characteristic is expressed by the following equation (11).
).

|H4 (Z1 −1)|=[1+(k/2)si
n2 (πf/f1)]
・cos2 (πf/f1)
... (11) Here, Z1 is expressed by the following equation (12), and the horizontal frequency f1 is 44.55 MHz.

Z1 =exp(j2πf/f1)
… (1
2) 44.55M output from the time expansion circuit (23)
The Hz digital RGB signal is converted into an analog signal by the D/A converter (25), and then passed through the low-pass filter (26).
- (28) are input. Low pass filter (26) ~
(28) removes the aliasing noise component by limiting the high frequency band and passing only the low horizontal frequency band, as shown in the shaded area in FIG. In this case, from equations (11) and (12), the output signal from the D/A converter (25) is
It can be seen that by appropriately selecting the value of , characteristics close to those shown in the shaded area in FIG. 4 can be obtained. Therefore, it is not necessary to provide the low-pass filters (26) to (28) with steep cutoff characteristics. In this way, the output terminals (31) to (3
3) RGB as an analog signal well reproduced from
Each signal is output.

In this way, in this embodiment, the horizontal frequency characteristics of the output signal are adjusted using a high-pass filter and a band-stop filter, so an expensive low-pass filter with steep cut-off characteristics is used. A predetermined horizontal frequency characteristic can be achieved using an inexpensive low-pass filter without any problems.

Third Embodiment FIG. 3 shows a video signal processing circuit according to a third embodiment of the present invention. As shown in the figure, in this embodiment the time expansion circuit (23) is provided immediately after the input terminal as in the first embodiment (FIG. 1). Other configurations are similar to the second embodiment (FIG. 2).

The operation of the video signal processing circuit configured as above will be explained. 48. decoded from the MUSE signal.
Y signal with speed of 6Mbps, (R- signal with speed of 16.2Mbps)
The Y) signal and the (B-Y) signal are inputted via the Y signal input terminal (11), (R-Y) signal input terminal (12), and (B-Y) signal input terminal (13), respectively. The signal is input to the decompression circuit (23). The time expansion circuit (23) performs processing to time-expand the signal, which was time-compressed to 11/12 on the transmitting side, to 12/11. As a result, 48.6Mbps
The Y signal with a speed of 44.55 Mbps is converted to a Y signal with a speed of
4) is input. Also, the speed of 16.2Mbps (
RY) signal and (B-Y) signal are both 14.85
The signals are converted into Mbps (R-Y) and (B-Y) signals, respectively, and input to the color signal interpolation circuit (16).

[0053] 4 time-stretched by the time-stretching circuit (23)
The 4.55 Mbps Y signal is a high pass filter (15)
is input, and its high frequency components are extracted with a transfer characteristic as shown in the following equation (13). Note that this characteristic is expressed by the formula (4
) is the same as

H1 (Z1 −1)=k[1−(Z1 −1+Z
1)/2]... (13) The color signal interpolation circuit (16) performs interpolation calculations on each of the (R-Y) signal and the (B-Y) signal, and generates the (R-Y) signal at 44.55 Mbps. and (B-Y) signal. The inverse matrix circuit (14) receives the Y signal input from the time expansion circuit (23), and the 44.55 Mbps (R-Y) signal and (B-Y) signal output from the color signal interpolation circuit (16).
44. Perform the calculation shown in formula (3) on the signal.
Outputs 55Mbps RGB signals.

4 extracted by the high-pass filter (15)
The high frequency component of the 4.55 Mbps Y signal is processed by an adder (17
) to (19), they are added to the 44.55 Mbps RGB signal output from the inverse matrix circuit (14), respectively. As a result, the adders (17) to (19) output 44.55 Mbps contour-corrected RGB signals, which are input to the band rejection filters (35) to (37), respectively.

[0056] These band rejection filters (35) to (37)
In this case, the same processing as in the second embodiment (FIG. 5) is performed. The transfer characteristic of the band-elimination filter (35) is expressed by the following equation (14).

H2 (Z1 −1)=1/2+(Z1 −1+Z
1 )/4 … (14) Formula (
1) and formula (13), and formula (6) and formula (14), the transfer characteristic from the output of the inverse matrix circuit (14) to the output of the band rejection filter (35) is determined by the formula in the second embodiment. It is similar to (11).

Now, the RGB signals that have been filtered according to the transfer characteristic of equation (11) and output from the band rejection filters (35) to (37) are each passed through the gamma correction circuit (2).
In steps 1-1) to (21-3), gamma correction is performed in accordance with the characteristics of the cathode ray tube. This allows the gamma correction section (21
) is 44.55 with contour correction and gamma correction.
Mbps RGB signals are output.

44 output from the gamma correction section (21)
．． The 55 Mbps RGB signals are each input to the D/A converter (25), and the D/A converters (25-1) to (2)
5-3), each is converted into an analog signal. Further, the low-pass filters (26) to (28) remove aliasing noise components by passing only the high horizontal frequency band, as shown by the shaded area in FIG.

In this way, the output terminals (31) to (3
3) outputs RGB signals as reproduced analog signals.

In this way, in this embodiment, the input Y
We decided to first perform time expansion processing on the signal, (RY) signal, and (B-Y) signal, and then adjust the horizontal frequency characteristics of the output signal using a high-pass filter and a band-stop filter. To perform digital signal processing at a slower speed than conventional methods, and to achieve a predetermined horizontal frequency characteristic with an inexpensive low-pass filter without using an expensive low-pass filter with steep cutoff characteristics. Can be done.

[0062]

As explained above, according to the invention as claimed in claim 1, since the input signal is first subjected to time expansion processing and then various digital signal processing is performed, it is better than the conventional method. It is also possible to perform digital signal processing at slower speeds. Therefore, there is an effect that the load on the hardware can be reduced.

Further, according to the invention as claimed in claim 2, since the horizontal frequency characteristic of the output signal is adjusted by the high-pass filter and the band rejection filter, the predetermined horizontal frequency characteristic can be adjusted by using the inexpensive low-pass filter. can be realized. Therefore, there is no need for an expensive low-pass filter having a steep cutoff characteristic, resulting in an effect that costs can be reduced.

Furthermore, according to the third aspect of the invention, the input signal is first subjected to time expansion processing, and
By adjusting the horizontal frequency characteristics of the output signal using a high-pass filter and a band-stop filter, it is possible to perform digital signal processing at a slower speed than before.
A predetermined horizontal frequency characteristic can be achieved with an inexpensive low-pass filter without using an expensive low-pass filter with steep cutoff characteristics. Therefore, there is an effect that both a reduction in hardware load and a reduction in cost can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a video signal processing circuit in a first embodiment of the present invention.

FIG. 2 is a block diagram showing a video signal processing circuit in a second embodiment of the invention.

FIG. 3 is a block diagram showing a video signal processing circuit in a third embodiment of the present invention.

FIG. 4 is an explanatory diagram showing horizontal frequency characteristics of an output signal.

FIG. 5 is a block diagram showing details of band rejection filters in second and third embodiments.

FIG. 6 is a block diagram showing a conventional video signal processing circuit.

[Explanation of symbols]

(11) Y signal input terminal (12) (R-Y) signal input terminal (13) (B-Y) signal input terminal (14) Inverse matrix circuit (15) High-pass filter (16) Color signal interpolation circuit (21-1) to (21-3) Gamma correction circuit (23
) Time expansion circuit (25) D/A converter (26) to (28) Low pass filter (35) to (
37) Band rejection filter (41), (42) Delay device (43) to (45) Multiplier (46) Adder

Claims (3)

[Claims] Claim 1: In a device that regenerates a MUSE signal into the original high-definition signal, the time required to expand the time of a digital luminance signal and two types of digital color difference signals, which have been time-compressed and transmitted on the transmitting side, to their original proportions. an extension circuit;
A color signal insertion circuit that converts the sampling rate of the two types of color difference signals time-stretched by this time expansion circuit to a predetermined times, and two types of color difference signals output from this color signal insertion circuit and expanded by the time expansion circuit. an inverse matrix circuit that performs a matrix calculation on the luminance signal and outputs an RGB signal, a high-pass filter that extracts the high-frequency component of the luminance signal expanded by the time expansion circuit, and an output of the high-pass filter. RG output from the inverse matrix circuit
An adder that adds each to the B signal, a gamma correction circuit that gives gamma characteristics to each output from this adder, and digital-to-analog conversion that converts the RGB signals output from this gamma correction circuit into analog quantities. A video signal processing circuit comprising: [Claim 2] A device for reproducing a MUSE signal into the original high-definition signal, which includes a high-pass filter that extracts high-frequency components of a digital luminance signal that has been time-compressed and transmitted on a transmitting side, and a high-pass filter that extracts a high-frequency component of a digital luminance signal that is A color signal insertion circuit converts the sampling rate of two types of compressed and transmitted digital color difference signals to a predetermined times, and a matrix calculation is performed on the two outputs from this color signal insertion circuit and the digital luminance signal to generate an RGB signal. an inverse matrix circuit that outputs a a gamma correction circuit that gives gamma characteristics to each output of the band rejection filter;
A time expansion circuit that time-expands the output of this gamma correction circuit at a predetermined rate, a digital-to-analog conversion circuit that converts each of the outputs of this time expansion circuit to analog, and a low-frequency component from the output of this digital-to-analog conversion circuit. A video signal processing circuit characterized by comprising a low-pass filter for each extraction. [Claim 3] In a device that regenerates a MUSE signal into the original high-definition signal, the time required to time-expand the digital luminance signal and two types of digital color difference signals, which have been time-compressed and transmitted on the transmitting side, to their original proportions. an extension circuit;
A color signal insertion circuit that converts the sampling rate of the two types of color difference signals time-stretched by this time expansion circuit to a predetermined times, and two types of color difference signals output from this color signal insertion circuit and expanded by the time expansion circuit. an inverse matrix circuit that performs a matrix calculation on the luminance signal and outputs an RGB signal, a high-pass filter that extracts the high-frequency component of the luminance signal expanded by the time expansion circuit, and an output of the high-pass filter. RG output from the inverse matrix circuit
An adder that adds each to the B signal, a band rejection filter that limits the band of the output of this adder, a gamma correction circuit that gives gamma characteristics to the output of this band rejection filter, and an output of this gamma correction circuit. What is claimed is: 1. A video signal processing circuit comprising: a digital-to-analog conversion circuit for converting each into analog; and a low-pass filter for extracting low-frequency components from the outputs of the digital-to-analog conversion circuit.