KR100315041B1 - Field emission display device and method for manufacturing the same - Google Patents

Abstract

The present invention discloses a field emission device and a method of manufacturing the same. The method of manufacturing a field emission device according to the present invention includes the steps of applying a positive photoresist film on a silicon substrate, and exposing and developing with a mask in the form of a first to form a first photoresist pattern; Isotropically etching the silicon substrate in the form of the first photoresist pattern by a predetermined depth; Removing the first photoresist pattern; Thermally oxidizing a surface of the silicon substrate to form a thermal oxide film and simultaneously form a tip; Forming a gate insulating film on the thermal oxide film; Forming a gate electrode layer on the gate insulating layer; Forming a second photoresist pattern by applying a negative photoresist layer on the gate electrode layer, and exposing and developing the mask with a jagged shape; And etching a predetermined portion of the gate electrode layer, the gate insulating film, and the thermal oxide film by using the second photoresist pattern as a mask, and exposing a tip. The mask of the jagged shape includes several main bodies arranged in parallel. And a plurality of branches extending in both directions orthogonal from each body portion, each arranged at equal intervals, wherein each branch is spaced at equal intervals and entered between two branches passing through a neighboring body. .

Description

FIELD EMISSION DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a field emission display device and a method of manufacturing the same, and more particularly, to a tip structure of a field emission display device capable of maximizing emission current while reducing power consumption, and a method of manufacturing the same. It is about.

As is well known, the field emission display device is a display device using a principle of matrix addressing a field emission array (FEA), and an electron beam stimulating a phosphor, such as a CRT, to cause cathode ray emission.

Such field emission display devices have opposing cathode and anode plates and vacuum gaps therebetween. Here, the cathode plate is provided with a gate electrode and a plurality of emitter tips for emitting electrons. On the other hand, the anode plate facing the cathode plate is provided with phosphors to realize colorization of the field emission display device.

Here, the brightness of the field emission display device is determined by the electron emission capability of the emitter tip, and the electron emission capability of the emitter tip is determined by how low the work function of the material constituting the emitter tip has.

Conventionally, emitter tips are formed of materials such as silicon (Si), molybdenum (Mo), and tungsten (W) having a work function of about 4 to 5 eV.

Here, with reference to FIG. 1, the method of forming a tip from silicon is demonstrated.

Referring to FIG. 1, a predetermined pattern (not shown) is formed on the silicon substrate 1, and then the silicon substrate 1 is isotropically etched using the predetermined pattern (not shown) as a mask. In this case, the isotropic etching is performed by overetching so that the silicon under the pattern becomes a cone shape. Here, the etched portion formed in the shape of a cone is called the tip 4.

Next, the silicon oxide film and the molybdenum layer are formed on both sides of the tip 2 by electron beam evaporation to form the gate oxide film 2 and the gate electrode 3.

However, the cone-shaped tip formed as described above has the following problems.

In general, the tip must be pointed to release a large amount of current. However, according to the prior art, it is practically difficult to make a silicon tip in the form of a cone, which makes it difficult to sharpen the tip of the tip.

In addition, the conventional tip extends only in a single direction, so that the amount of emission current is small compared to the large area, and the operating voltage, that is, the power consumption, is large.

Accordingly, it is an object of the present invention to provide a field emission display device capable of increasing the amount of emission current and reducing power consumption.

Another object of the present invention is to provide a method of manufacturing the field emission display device described above.

1 is a cross-sectional view of a conventional field emission display device.

2A to 2F are perspective views for each process for explaining a method of manufacturing a field emission display device according to an embodiment of the present invention.

3 is a plan view of a mask pattern for forming a tip of the field emission display device.

4 is a plan view showing a tip and a gate electrode of the field emission display device according to the present invention.

(Explanation of symbols for the main parts of the drawing)

11-silicon substrate 12,16-photoresist pattern

13-thermal oxide 14-gate oxide

15-gate electrode

In order to achieve the above object of the present invention, according to one aspect of the present invention, the emitter emits electrons to emit a phosphor and comprises an emitter tip formed on a silicon substrate, and a gate electrode surrounding the emitter tip A field emission display device comprising: a plurality of tip bodies disposed in parallel; A plurality of tip branches extending from each tip body in both directions perpendicular to the longitudinal direction of the tip body, the tip branches being spaced at equal intervals, the tip branches being the other two tip branches passing through neighboring tip bodies Said characterized in that entering the middle position. In this case, the gate electrode is disposed in a concave-convex shape between the tip body and the tip branch. In addition, the tip is characterized in that the silicon film doped with impurities.

On the other hand, according to another aspect of the invention, the step of applying a positive photoresist film on the silicon substrate, and the exposure and development with a mask of the jagged form to form a first photoresist pattern; Isotropically etching the silicon substrate in the form of the first photoresist pattern by a predetermined depth; Removing the first photoresist pattern; Thermally oxidizing a surface of the silicon substrate to form a thermal oxide film and simultaneously form a tip; Forming a gate insulating film on the thermal oxide film; Forming a gate electrode layer on the gate insulating layer; Forming a second photoresist pattern by applying a negative photoresist layer on the gate electrode layer, and exposing and developing the mask with a jagged shape; And etching a predetermined portion of the gate electrode layer, the gate insulating film, and the thermal oxide film by using the second photoresist pattern as a mask, and exposing a tip. The mask of the jagged shape includes several main bodies arranged in parallel. And a plurality of branches extending in both directions orthogonal from each body portion, each arranged at equal intervals, wherein each branch is spaced at equal intervals and entered between two branches passing through a neighboring body. Here, the silicon substrate is characterized in that the doped silicon substrate.

According to the present invention, the tip is formed in a cross shape repeated left and right and up and down, so that a large amount of electrons can be emitted not only from the left and right tips but also from the up and down tips. Accordingly, it is possible not only to generate a high current density in the unit area, but also to maximize the emission area.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are perspective views illustrating processes for manufacturing a field emission display device according to an embodiment of the present invention, and FIG. 3 is a view for forming a tip of a field emission display device. 4 is a plan view of a mask pattern, and FIG. 4 is a plan view illustrating a tip and a gate electrode of the field emission display device according to the present invention.

First, as shown in FIG. 2A, a photoresist pattern 12 having a jagged shape is formed on the silicon substrate 11 where impurity doping is performed and well drive-in is performed. It is formed by photolithography. At this time, the photoresist pattern 12 is a positive photoresist pattern. That is, after the positive photoresist film is applied on the silicon substrate 11, the photoresist pattern 12 is formed by exposing and developing using a mask of a jagged shape. At this time, the mask pattern of the jagged form has the following shape.

This jaggie-shaped mask 120 includes several main bodies 120a arranged in parallel and a plurality of branches 120b and 120c extending in both directions orthogonally extending from each body portion and each arranged at equal intervals. Each branch (120b, 120c) is entered between the two branches passing through the neighboring body (120a), between each of the branches (120b, 120c), the branches (120b, 120c) and the body (120a) Spaces are spaced apart.

Using the jagged photoresist pattern 12 as a mask, the exposed silicon substrate 11 is isotropically etched by a predetermined depth.

As shown in Fig. 2B, the photoresist pattern 12 is removed by a known method.

Thereafter, as illustrated in FIG. 2C, the surface of the semiconductor substrate 11 is thermally oxidized to form a tip 11a having a pointed point and a thermal oxide film 13. At this time, by the thermal oxidation process, the predetermined portion of the silicon substrate 11 participates in the reaction, thereby forming a tip 11a having a point without a separate difficult etching process. In addition, the tip 11a is formed in the form of the jagged photoresist pattern 12.

Next, as shown in FIG. 2D, after the gate oxide film 14 is deposited on the thermal oxide film 13, a gate metal film, for example, an Mo film is sputter deposited on the gate oxide film 14, and the gate electrode layer 15 is deposited. ). Thereafter, a negative photoresist film 16 is applied over the gate electrode layer 15.

Then, as shown in FIG. 2E, the photoresist film 16 is exposed and developed by using the jagged mask 120 on which the silicon tip 11a is formed to form the photoresist pattern 16a. do. Then, the photoresist pattern 16a has an image opposite to that of the photoresist pattern 12 for forming the tip. Thereafter, the gate electrode layer 15, the gate insulating film 14, and the thermal oxide film 13 below are etched using the negative type photoresist pattern as a mask. Accordingly, while the silicon tip 11a is exposed, a gate electrode is formed.

Thereafter, as shown in FIG. 2F, the photoresist pattern 16a is removed to expose the tip 11a of the field emission device.

As shown in FIG. 4, the tip 11a is arranged in parallel with the tip body 11a-1 and the longitudinal direction of the tip body 11a-1 from the tip body 11a-1. A plurality of tip branches 11a-2 and 11a-3 extending in orthogonal directions are included, and these tip branches 11a-2 and 11-3 are arranged at equal intervals. At this time, the tip branch 11a-2 enters the intermediate position between the other two tip branches 11a-3 passing through the neighboring tip body 11a-1. On the other hand, the gate electrode is disposed in a concave-convex shape between the tip body 11a-1 and the tip branches 11a-2 and 11a-3.

In this way, since the emitters are arranged in the left and right up and down directions, a large amount of electrons can be iced not only at the left and right tips but also at the up and down tips.

As described in detail above, according to the present invention, the emitter tip may be formed in the form of left and right and up and down cross, so that a large amount of electrons may be emitted at the tip in the vertical direction as well as at the tip in the left and right directions. Accordingly, it is possible not only to generate a high current density in the unit area, but also to maximize the emission area.

In addition, the silicon substrate is isotropically etched, and then thermal oxidation is performed to react a portion of the silicon substrate, thereby forming a tip having a point. Accordingly, a tip having a cue can be formed in a simple process.

The present invention is not limited to the above embodiment. In the present invention, a silicon film doped with a tip is used, but the tip is formed of a pure silicon film, and the same effect can be obtained even by implanting impurities.

In addition, this invention can be implemented in various changes within the range which does not deviate from the summary.

Claims (5)

A field emission display device comprising an emitter tip which emits electrons to emit phosphors, and is formed on a silicon substrate, and a gate electrode surrounding the emitter tip. The emitter tip includes a plurality of tip bodies disposed in parallel; A plurality of tip branches extending from each tip body in both directions perpendicular to the longitudinal direction of the tip body, The tip branches are arranged at equal intervals, And the tip branch enters a midway position between two other tip branches passing through a neighboring tip body. The field emission display device of claim 1, wherein the gate electrode is disposed in an uneven shape between the tip body and the tip branch. The field emission display device of claim 1, wherein the tip is a silicon film doped with impurities. Forming a first photoresist pattern by applying a positive photoresist film on the silicon substrate, and exposing and developing with a mask in the form of a jaggie; Isotropically etching the silicon substrate in the form of the first photoresist pattern by a predetermined depth; Removing the first photoresist pattern; Thermally oxidizing a surface of the silicon substrate to form a thermal oxide film and simultaneously form a tip; Forming a gate insulating film on the thermal oxide film; Forming a gate electrode layer on the gate insulating layer; Forming a second photoresist pattern by applying a negative photoresist layer on the gate electrode layer, and exposing and developing the mask with a jagged shape; And Etching a predetermined portion of the gate electrode layer, the gate insulating film, and the thermal oxide film using the second photoresist pattern as a mask, and exposing a tip; The jaggie-shaped mask includes several main bodies arranged in parallel and a plurality of branches extending in both directions orthogonal from each main body portion, each of which is arranged at equal intervals, each of the branches at equal intervals, respectively. A method of manufacturing a field emission display device, characterized in that it is spaced apart and entered between two branches passing through a neighboring body. The method of claim 4, wherein the silicon substrate is a doped silicon substrate.