KR100312017B1 - Progress of Forming Ultrathin Gate Oxide using Trideuterium nitrate - Google Patents

Progress of Forming Ultrathin Gate Oxide using Trideuterium nitrate Download PDF

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KR100312017B1
KR100312017B1 KR1019990007762A KR19990007762A KR100312017B1 KR 100312017 B1 KR100312017 B1 KR 100312017B1 KR 1019990007762 A KR1019990007762 A KR 1019990007762A KR 19990007762 A KR19990007762 A KR 19990007762A KR 100312017 B1 KR100312017 B1 KR 100312017B1
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insulating film
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황현상
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김효근
광주과학기술원
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma

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Abstract

본 발명은 ND3가스를 이용한 반도체 소자용 극박막 절연막의 형성공정에 관한 것이다.The present invention relates to a process for forming an ultrathin film insulating film for semiconductor devices using ND 3 gas.

본 발명은 실리콘웨이퍼에 절연막 형성 후 질소원으로 ND3가스를 사용하여 상압 또는 저압에서 600℃∼1000℃의 온도로 5~100분 동안 열처리 혹은 800℃∼1100℃의 온도범위에서 1∼100초 동안 급속 열처리를 하거나 또는 저압, 600℃ 이하의 온도에서 5~100분 동안 플라즈마 처리를 통하여 절연막에 질소도핑을 실시한다. 또한 중수소(D2)를 ND3가스와 동시에 사용함으로써 절연막에 첨가될 질소의 양을 조절할 수 있다.According to the present invention, after forming an insulating film on a silicon wafer, using an ND 3 gas as a nitrogen source, heat treatment is performed at 600 ° C. to 1000 ° C. for 5 to 100 minutes at normal or low pressure, or for 1 to 100 seconds at a temperature range of 800 ° C. to 1100 ° C. Nitrogen doping is performed on the insulating film by rapid heat treatment or by plasma treatment for 5 to 100 minutes at a low pressure and a temperature of less than 600 ℃. In addition, by using deuterium (D 2 ) simultaneously with the ND 3 gas, the amount of nitrogen to be added to the insulating film can be controlled.

본 발명의 목적은 종래의 질소 도핑 개스로 사용되던 NH3대신에 ND3개스를 이용하여 반도체 소자용 극박막 절연막을 형성시켜 종래의 NH3공정의 문제점인 잔류 수소에 의한 전자 트래핑(trapping)을 해결하고 최적 농도의 질소에 의한 소자 특성 및 신뢰성을 개선시키는 데 있다.An object of the present invention is to form an ultra-thin film insulating film for semiconductor devices using ND 3 gas instead of NH 3 used as a conventional nitrogen doping gas to eliminate electron trapping by residual hydrogen, a problem of the conventional NH 3 process. To solve and improve the device characteristics and reliability by the optimum concentration of nitrogen.

Description

ND₃을 이용한 반도체 소자용 극박막 절연막의 형성공정{Progress of Forming Ultrathin Gate Oxide using Trideuterium nitrate}Process of Forming Ultra-thin Film Insulator for Semiconductor Device Using Nd₃ {Progress of Forming Ultrathin Gate Oxide using Trideuterium nitrate}

본 발명은 ND₃를 이용한 반도체 소자용 극박막 절연막의 형성공정에 관한 것이다. 보다 상세하게는 금속산화막(MOS: Multi Oxide Semiconductor)반도체 소자제작에 필수공정인 절연막 형성 공정에 관한 것으로 MOS를 응용한 차세대 모든 초대규모 집적회로(ULSI: Ultra Large Scale Integration) 소자에 적용 가능한 기술이다.The present invention relates to a step of forming an ultrathin film insulating film for semiconductor devices using ND 3. More specifically, the present invention relates to an insulating film forming process, which is an essential process for manufacturing a metal oxide semiconductor (MOS) semiconductor device, and is applicable to all next generation ultra large scale integration (ULSI) devices using MOS. .

종래의 게이트 산화용(Gate Oxide)용 절연막을 형성하는 가장 일반적인 기술은 실리콘웨이퍼(silicon wafer)를 산소, 수소 또는 수증기 분위기에서 고온으로 열처리하여 SiO2막을 형성하는 것이다. 한편 소자의 집적도가 증가할수록 절연막의 두께도 약 50Å이하로 스케일링(Scaling) 되며 얇은 절연막에 인가되는 전기장이 증가하여 절연막의 신뢰성 특성이 중요해진다.The most common technique for forming a conventional gate oxide insulating film (Gate Oxide) is to form a SiO 2 film by heat-treating a silicon wafer at a high temperature in an oxygen, hydrogen or steam atmosphere. On the other hand, as the degree of integration of the device increases, the thickness of the insulating film is also scaled to about 50 GPa or less, and the electric field applied to the thin insulating film increases, thereby increasing the reliability characteristics of the insulating film.

또한 절연막의 두께가 얇아질수록 폴리실리콘 게이트 내의 붕소(boron)가 산화막(oxide)을 통해 실리콘 기판까지 침투하여 소자의 문턱전압(Threshold Voltage, Vth)을 낮추는 문제가 발생한다. 이를 해결하는 방법으로 현재까지 연구된 바에 의하면 Si/SiO2계면에 질소(Nitrogen)를 도핑하여 열처리하는 방법이 있는데 질소원으로는 통상적으로 암모니아(NH3)를 사용하고 있다. 그러나 절연막에 NH3열처리시 NH3에 포함된 수소(hydrogen)가 절연막에 남아서 전자의 트랩싸이트(trap-site)로 작용하여 소자의 신뢰성을 감소시키는 문제점이 있다.In addition, as the thickness of the insulating layer becomes thinner, boron in the polysilicon gate penetrates into the silicon substrate through the oxide, thereby lowering the threshold voltage (V th ) of the device. As a solution to this problem, researches to date have been conducted to do heat treatment by doping nitrogen (Nitrogen) at the Si / SiO 2 interface, a nitrogen source is commonly used ammonia (NH 3 ). However, there is a problem in that the hydrogen (hydrogen) contained in the NH 3 when heat treatment NH 3 in the insulating film remains on the insulating film acts as a trap site (trap-site) of the electronic reduce the reliability of the device.

본 발명과 관련있는 종래기술로서 미합중국 특허 4,980,307호에 의하면 NH3를 사용하여 Oxynitride(SiOxNy)를 제작하면 전기적 특성이 개선된다고 하였으며 또한 Applied Physics Letter(1988년, vol.52, No. 9, pp. 736-738)에 발표된 호리(T. Hori)의 논문 'Correlation between trap density and hydrogen concentration in ultrathin rapidly reoxidized nitrided oxide'에 의하면 NH3열처리과정에서 다량의 수소가 함유되어 이로인해 전자 트랩이 발생하여 신뢰특성이 악화된다고 보고되었다.According to the prior art related to the present invention, U.S. Patent No. 4,980,307 states that the production of Oxynitride (SiOxNy) using NH 3 improves the electrical properties and the Applied Physics Letter (1988, vol. 52, No. 9, pp. According to T. Hori's `` Correlation between trap density and hydrogen concentration in ultrathin rapidly reoxidized nitrided oxide '' published in 736-738, a large amount of hydrogen is contained during NH 3 heat treatment, It has been reported that the reliability characteristics deteriorate.

본 발명자가 발표한 논문(Applied Physics Letter 1999년 2월 1일호에 발표)에 의하면 기존의 수증기(H2O) 대신에 중수(D2O)를 사용함으로써 소자의 특성 및 신뢰성이 현저하게 개선되는 것을 확인하였다. 그 원인으로 SIMS (Secondary Ion Mass Spectroscopy)에서도 확인된 중수소(Deuterium)가 Si/SiO2계면에 존재하여 Si/SiO2계면의 댕글링 본드(dangling bond)를 기존의 Si-H bond 대신 Si-D bond를 형성함으로 인해 소자동작시 높은 전기장이 인가되어도 신뢰성 특성이 상대적으로 우수하다.According to a paper published by the inventor (Applied Physics Letter, February 1, 1999), the use of heavy water (D 2 O) instead of water vapor (H 2 O) significantly improves the characteristics and reliability of the device. It was confirmed. The cause the SIMS (Secondary Ion Mass Spectroscopy) a heavy hydrogen (Deuterium) the Si / SiO 2 interface exists to dangling bonds of the Si / SiO 2 interface on (dangling bond) existing Si-H bond instead of the Si-D confirmed in Due to the formation of bonds, the reliability characteristics are relatively good even when a high electric field is applied during operation.

본 발명은 실리콘웨이퍼 절연막의 문턱전압을 낮추어 소자의 신뢰성을 향상시키기 위해 질소원을 사용하는 방법에 있어서 질소원을 기존의 암모니아(NH3) 가스대신에 ND3가스를 이용함으로써 질소에 의한 붕소가 절연막을 통해 침투하는 성질과, 중수소에 의한 소자의 신뢰성을 개선하는 것을 기술적 과제로 삼는다.The present invention, boron is the insulating film due to nitrogen by using a ND 3 gas nitrogen source in place of an existing ammonia (NH 3) gas according to the method using a nitrogen source to improve the reliability of the device by lowering the threshold voltage of the silicon wafer, the insulating film It is a technical problem to improve the property of penetration and the reliability of the device by deuterium.

도 1의 점선은 NH₃가스를 실리콘웨이퍼에 도핑하고 열처리 후의 문턱전압의 변화를 나타내고, 실선은 ND3가스를 실리콘웨이퍼에 도핑하고 열처리 후의 문턱전압의 변화를 나타낸 그래프.1 shows a change in the threshold voltage after the NH 3 gas is doped into the silicon wafer and the heat treatment, and a solid line shows the change in the threshold voltage after the doped ND 3 gas into the silicon wafer and the heat treatment.

본 발명은 소자의 신뢰성을 향상시키기 위해 실리콘웨이퍼에 절연막 형성 후 질소원으로 기존에 사용하는 암모니아(NH3) 가스대신에 ND3가스를 사용하여 상압 또는 1토르(Torr)∼100토르의 저압, 600℃∼1000℃에서 5~100분 동안 열처리 혹은 800℃-1100℃의 온도범위에서 1-100초 동안 급속 열처리를 하거나 또는 10밀리토르 (mtorr)∼10토르의 저압, 상온∼600℃에서 5~100분 동안 플라즈마 처리를 통하여 절연막에 질소도핑을 실시한다. 이때 ND3가스의 사용량은 상압에서 1∼5slm, 저압처리인 경우 10∼100sccm으로 한다. 또한 중수소(D2)를 ND3가스와 부피비로 1:1∼1:10으로 사용함으로써 ND3의 분압을 조절하거나 또는 1차로 절연막에 ND3가스를 도핑하고 2차로 절연막에 D2도핑후 열처리하여 절연막에 첨가될 질소의 양을 조절할 수 있다.In order to improve the reliability of the device, the present invention uses an ND 3 gas instead of ammonia (NH 3 ) gas, which is used as a nitrogen source after forming an insulating film on a silicon wafer, using a normal pressure or a low pressure of 1 Torr to 100 Torr, 600 Heat treatment for 5-100 minutes at ℃ ~ 1000 ℃ or rapid heat treatment for 1-100 seconds in the temperature range of 800 ℃ -1100 ℃, or low pressure of 10 millitorr to 10 torr, 5 ~ at room temperature to 600 ℃ Nitrogen doping is performed on the insulating film through a plasma treatment for 100 minutes. At this time, the amount of the ND 3 gas used is 1 to 5 slm at normal pressure, and 10 to 100 sccm at low pressure treatment. In addition, by using deuterium (D 2 ) in a volume ratio of 1: 1 to 1:10 with the ND 3 gas, the partial pressure of the ND 3 is controlled or the ND 3 gas is first doped into the insulating film, and the second insulating film is doped with D 2. The amount of nitrogen to be added to the insulating film can be adjusted.

이하 본 발명을 다음의 실시예에 의하여 상세히 설명하고자 한다. 그러나 이들에 의해 본 발명의 기술적 범위가 한정되는 것은 아니다.Hereinafter, the present invention will be described in detail by the following examples. However, the technical scope of the present invention is not limited by these.

<실시예 1><Example 1>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3분위기에서 상압, 850℃의 온도로 1 시간 동안 열처리하였다. 이때 열처리 공정은 기존의 퍼니스(Furnace) 열처리를 사용하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, the silicon wafer was heat-treated at 850 ° C. for 1 hour at atmospheric pressure in an ND 3 atmosphere. At this time, the heat treatment process used a conventional furnace (Furnace) heat treatment.

<실시예 2><Example 2>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3분위기에서 상압, 1000℃의 온도로 10초 동안 열처리하였다. 이때 열처리 공정은 급속 열처리 퍼니스(Rapid Thermal Furnace) 열처리를 사용하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, the silicon wafer was heat-treated at atmospheric pressure at a temperature of 1000 ° C. for 10 seconds in an ND 3 atmosphere. At this time, the heat treatment process was a rapid heat treatment furnace (Rapid Thermal Furnace) heat treatment.

<실시예 3><Example 3>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3와 D2를 부피비로 1:9 혼합하여 ND3의 분압을 0.1로 조절하여 실리콘웨이퍼와 절연막의 계면에 존재하는 질소의 양을 조절한 후 상압, 1000℃에서 10초 동안 급속 열처리하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, ND 3 and D 2 were mixed 1: 9 in a volume ratio to adjust the partial pressure of ND 3 to 0.1 to remove nitrogen from the interface between the silicon wafer and the insulating film. After adjusting the amount, heat treatment was performed at normal pressure and 1000 ° C. for 10 seconds.

<실시예 4><Example 4>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3분위기에서 10 Torr의 저압, 850℃의 온도로 1 시간 동안 열처리하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, heat treatment was performed at a low pressure of 10 Torr and a temperature of 850 ° C. for 1 hour in an ND 3 atmosphere.

<실시예 5><Example 5>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3분위기에서 1torr의 저압, 300℃의 온도로 5분 동안 플라즈마(Plasma) 처리하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, plasma treatment was performed at a low pressure of 1 torr and a temperature of 300 ° C. for 5 minutes in an ND 3 atmosphere.

<실시예 6><Example 6>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, ND3분위기에서 상압, 900℃의 온도로 10초 동안 1차 열처리한 후, D2분위기에서 상압, 1000℃의 온도로 10초 동안 2차 열처리하였다.After forming a SiO 2 insulating film on a silicon wafer using a conventional method, the first heat treatment for 10 seconds at atmospheric pressure, 900 ℃ in ND 3 atmosphere, and then 10 seconds at a temperature of 1000 ℃, atmospheric pressure in D 2 atmosphere During the second heat treatment.

< 비교예 ><Comparative Example>

실리콘웨이퍼에 통상의 방법을 이용하여 SiO2절연막을 형성한 후, 이를 NH3분위기에서 상압, 850℃의 온도로 1 시간 동안 실리콘웨이퍼를 열처리하였다.After the SiO 2 insulating film was formed on the silicon wafer using a conventional method, the silicon wafer was heat-treated for 1 hour at an atmospheric pressure and a temperature of 850 ° C. in an NH 3 atmosphere.

< 시험예 ><Test Example>

실시예 1에서 실리콘웨이퍼에 SiO2절연막을 형성하고 ND3분위기에서 열처리한 실리콘웨이퍼와 비교예에서 실리콘웨이퍼에 SiO2절연막을 형성하고 NH3분위기에서 열처리한 실리콘웨이퍼를 0∼1000초 동안 J=10mA/cm2의 전기적 스트레스하 (Stress)에서 HP4145 반도체소자 측정 장비를 이용하여 문턱전압의 변화를 측정하였으며 그 결과를 도 1의 그래프에 도시하였다. 도 1에서 나타내고 있는 것처럼 NH3분위기 보다 ND3분위기에서 열처리한 실리콘웨이퍼가 훨씬 낮은 문턱전압의 변화를 나타내는 것을 알 수 있었다.Example 1 to form an SiO 2 insulating film on a silicon wafer in ND 3 to form a SiO 2 insulating film on the silicon wafer as in Comparative Example A silicon wafer heat-treated in the atmosphere for the heat treatment a silicon wafer in a NH 3 atmosphere 0-1000 seconds J = The change of the threshold voltage was measured by using the HP4145 semiconductor device measuring equipment under the electrical stress of 10mA / cm 2 and the results are shown in the graph of FIG. As shown in FIG. 1, it was found that the silicon wafer heat-treated in the ND 3 atmosphere showed a much lower threshold voltage change than the NH 3 atmosphere.

본 발명은 실리콘웨이퍼에 SiO2절연막을 형성한 후 실리콘웨이퍼와 절연막 (Si/SiO2)의 계면에 질소원으로 ND3가스를 도핑하여, 기존 NH3공정의 문제점인 수소 첨가에 의한 전자 트래핑으로 야기되는 소자의 문턱전압의 변화를 낮추어 소자의 특성 및 신뢰성을 개선시킬 수 있다.The present invention forms an SiO 2 insulating film on a silicon wafer and then dope ND 3 gas with a nitrogen source at the interface between the silicon wafer and the insulating film (Si / SiO 2 ), causing electron trapping by hydrogenation, a problem of the conventional NH 3 process. By reducing the change in the threshold voltage of the device can be improved the characteristics and reliability of the device.

Claims (6)

실리콘웨이퍼에 통상의 방법으로 SiO2절연막을 형성한 후, ND3분위기에서 실리콘웨이퍼의 절연막을 열처리하거나 또는 ND3와 D2를 이용하여 실리콘웨이퍼의 절연막을 열처리하는 것을 특징으로 하는 ND3을 이용한 반도체 소자용 극박막 절연막의 형성공정.After forming the SiO 2 insulation film by an ordinary method on a silicon wafer, and thermally treating the insulation film of the silicon wafer in ND 3 atmosphere, or by using the ND 3 and D 2 by the ND 3 characterized in that the heat treatment of the insulating film of the silicon wafer Formation process of ultra-thin film insulation film for semiconductor devices. 제 1항에 있어서, 상압 또는 저압(1torr-100torr)에서 600℃-900℃의 온도범위에서 5-100분 동안 열처리 하는 것을 특징으로 하는 ND3를 이용한 반도체 소자용 극박막 절연막의 형성공정.The process for forming an ultra-thin film insulating film for semiconductor devices using ND 3 according to claim 1, wherein the heat treatment is performed at normal pressure or low pressure (1torr-100torr) for 5-100 minutes in a temperature range of 600 ° C-900 ° C. 제 1항에 있어서, 상압 또는 저압(1torr-100torr)에서 800℃-1100℃의 온도범위에서 1-100초 동안 급속 열처리 하는 것을 특징으로 하는 ND3를 이용한 반도체 소자용 극박막 절연막의 형성공정.The process of forming an ultra-thin film insulating film for a semiconductor device using ND 3 according to claim 1, wherein the heat treatment is performed at normal pressure or low pressure (1torr-100torr) for 1-100 seconds in a temperature range of 800 ° C-1100 ° C. 제 1항에 있어서, 열처리는 ND3분위기에서 저압(10mtorr-10torr), 상온∼ 600℃에서 5-100분 동안 플라즈마 처리하는 것을 특징으로 하는 ND3를 이용한 반도체 소자용 극박막 절연막의 형성공정.The method of claim 1, wherein the heat treatment is a low pressure (10mtorr-10torr), room temperature, ~ 600 ℃ 5-100 bun plasma processing semiconductor element electrode formation process of the thin film for the insulating film using the ND 3 characterized in that while in the ND 3 atmosphere. 제 1항에 있어서, ND3와 D2를 이용하여 1차로 ND3분위기에서 열처리하고 2차로 D2분위기에서 열처리하는 것을 특징으로 하는 ND3를 이용한 반도체 소자용 극박막 절연막의 형성공정.According to claim 1, ND 3 and ND 3 D 2 1 Heat Treatment drive from the atmosphere, and then secondly the step of forming the ultra-thin insulating film for a semiconductor device using the ND 3, characterized in that the heat treatment in D 2 atmosphere using a. 제 1항에 있어서, ND3와 D2를 이용하여 ND3와 D2를 부피비로 1:1 ∼ 1:10 혼합하여 열처리하는 것을 특징으로 하는 ND3를 이용한 반도체 소자용 극박막 절연막의 형성공정.According to claim 1, ND 3 D and 1 to 2 using a ND 3 and D 2 in a volume ratio: 1 to 1:10 and mixed with the step of forming the ultra-thin insulating film for a semiconductor device using the ND 3, characterized in that the heat treatment .
KR1019990007762A 1999-03-09 1999-03-09 Progress of Forming Ultrathin Gate Oxide using Trideuterium nitrate KR100312017B1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11329137B2 (en) 2019-11-06 2022-05-10 Samsung Electronics Co., Ltd. Semiconductor devices and methods of manufacturing the same

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