KR100308499B1 - Method for fabricating capacitor of semiconductor device - Google Patents

Abstract

PURPOSE: A method for fabricating a capacitor of a semiconductor device is provided to obtain capacitance of a capacitor by increasing a surface area of a storage electrode. CONSTITUTION: A lower insulating layer is formed on a semiconductor substrate. The first insulating layer is formed on the lower insulating layer. A contact hole is formed by etching the first insulating layer and the lower insulating layer. The first polysilicon layer(27) is formed through the contact hole. The second insulating layer is formed on the first polysilicon layer(27). The first photoresist layer pattern is formed on the second insulating layer. The second polysilicon layer(33) is formed on a whole surface of the above structure. The second photoresist layer pattern is formed on the second polysilicon layer(33). The second photoresist layer pattern is removed. A tunnel is formed in a storage electrode.

Description

Capacitor Manufacturing Method of Semiconductor Device

1A to 1D are cross-sectional views showing a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

* Names of symbols for main parts of drawings *

11: semiconductor substrate 13: device isolation oxide film

15 gate oxide film 17 gate electrode

19 oxide film spacer 21 lower insulating layer

23: first insulating film 25: contact hole

27: first polysilicon film 29: second insulating film

31: first photosensitive film 33: second polycrystalline silicon film

35 second photosensitive film 37 tunnel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a capacitor of a semiconductor device. In particular, in order to secure the capacitance of a capacitor in a highly integrated semiconductor device, the semiconductor device can be highly integrated by increasing the surface area of the storage electrode using an isotropic etching process and an anisotropic etching process. It's a skill that lets you.

Since the semiconductor devices are highly integrated and the cell size is reduced, it is difficult to sufficiently secure a capacitance proportional to the surface area of the storage electrode.

In particular, in a DRAM device having a unit cell composed of one MOS transistor and a capacitor, it is important to reduce the area while increasing the capacitance of a capacitor, which occupies a large area on a chip, which is an important factor for high integration of the DRAM device.

Thus, in order to increase the capacitance of the capacitor, a material having a high dielectric constant is used as the dielectric film or a method of forming the dielectric film thinly.

However, dielectric materials having a high dielectric constant, such as Ta ₂ O ₅ -TiO ₂ or SrTiO ₃ , have not been confirmed with reliability and thin film characteristics. Therefore, it is difficult to apply to the actual device. In addition, reducing the thickness of the dielectric film has a problem in that the dielectric film is destroyed during operation of the device, thereby lowering the reliability of the capacitor, making it difficult to integrate the semiconductor device.

Therefore, in order to solve the problems of the prior art, the first conductive layer and the insulating film are sequentially formed on the semiconductor substrate, and a rounded insulating pattern is formed by a wet etching process using a gate electrode mask to planarize the upper part. The second conductive layer is formed and the second conductive layer is etched by an etching process using a storage electrode mask, and then the insulating film is removed to form a storage electrode having an increased surface area. It is an object of the present invention to provide a capacitor manufacturing method of a semiconductor device to form a capacitor having a high integration of the semiconductor device and thereby improve the reliability of the semiconductor device.

A feature of the present invention for achieving the above object is a method of manufacturing a capacitor of a semiconductor device, the step of sequentially forming a lower insulating layer and a first insulating film on the semiconductor substrate, and an etching process using a storage electrode contact mask Forming a contact hole, forming a first conductive layer connected to the semiconductor substrate through the contact hole, forming a third insulating film over the first conductive layer, and gate the second insulating film. The first conductive layer is formed by isotropic etching using a photolithography process using an electrode mask to form a second insulating layer pattern having a rounded upper portion, and a second conductive layer is formed on the entire surface and a photolithography process using a storage electrode mask. Forming a pattern and a second conductive layer pattern and simultaneously exposing the second insulating layer pattern; removing the exposed second insulating layer pattern; It characterized in that it comprises a step of forming a storage electrode which tunnel is provided at the junction of the second conductive layer.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a capacitor manufacturing process of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1A, a lower insulating layer 21 is formed on the semiconductor substrate 11. In this case, an oxide spacer 19 is formed on the sidewalls of the device isolation oxide layer 13, the gate oxide layer 15, the gate electrode 17, and the gate electrode 17. Planarized with a good insulating material. Next, a first insulating layer 23 is formed on the lower insulating layer 21. In this case, the first insulating layer 23 is formed of a silicon nitride layer. Thereafter, the first insulating layer 23 and the lower insulating layer 21 are etched by an etching process using a contact mask (not shown) to form a contact hole 25 exposing a predetermined portion of the semiconductor substrate 11. do. A first polysilicon film 27 is formed in the predetermined portion through the contact hole 25. In this case, the first polysilicon layer 27 may be formed of a polyside or a similar conductive material as a conductor. Next, a second insulating layer 29 is formed on the first polycrystalline silicon layer 27. . A first photoresist layer 31 pattern is formed on the second insulating layer 29. In this case, the first photoresist layer 31 pattern is formed using a gate electrode mask (not shown).

Referring to FIG. 1B, the second insulating layer 29 is wet-etched using the first photoresist layer 31 as a mask to form a second insulating layer pattern having an undercut. Then, the first photoresist layer 31 pattern is removed.

Referring to FIG. 1C, a second polysilicon film 33 is formed over the entire surface. In this case, the second polysilicon layer 33 may be formed of a polyside or a similar conductive material as the conductive layer. Next, a second photosensitive film 35 pattern is formed on the second polysilicon film 33. In this case, the second photoresist layer 35 pattern is formed by an etching process using a storage electrode mask.

Referring to FIG. 1D, the second polysilicon layer 33, the second insulating layer 29 pattern and the first polysilicon layer 27 are etched using the second photoresist layer 35 as a mask. In this case, the etching process of the second and first polysilicon films 33 and 27 is performed by using the first insulating film 23 as an etching barrier. The pattern of the second insulating layer 29 may not be etched.

Here, the second insulating layer 29 pattern is formed long along the gate electrode (not shown), and the second photosensitive layer 35 pattern formed using the storage electrode mask is formed in a quadrangle. As a result, after the etching process using the second photoresist layer 35 as a mask, the second insulation layer 29 pattern is exposed.

Next, the second photoresist film 35 pattern is removed, and the second insulating film 29 pattern is removed to form a storage electrode having an increased surface area. In this case, the process of removing the pattern of the second insulating layer 29 is performed by a wet method using a difference in etching selectivity from the first and second polysilicon layers 27 and 33. Here, the first insulating layer 23 is used as an etching barrier. As a result, a tunnel 37 is formed inside the storage electrode, thereby increasing the surface area.

In a later step, a dielectric film (not shown) and a third polysilicon film (not shown) are sequentially formed on the surface of the storage electrode to form a capacitor capable of securing a capacitance sufficient for high integration of the semiconductor device. In this case, the dielectric film is formed of a material having excellent dielectric properties. Here, the dielectric film is formed of a NO or ONO composite structure. The third polysilicon film is used as a plate electrode as a conductive layer. Here, the plate electrode may be formed of polysilicon polyside or a similar conductive material.

As described above, in the method of manufacturing a capacitor of a semiconductor device according to the present invention, the first conductive layer and the insulating film are sequentially formed on the semiconductor substrate, and a rounded insulating pattern is formed using a gate electrode mask. A second conductive layer is formed on the substrate, and the second conductive layer, the insulating layer, and the first conductive layer are etched using a storage electrode mask, and then the insulating layer pattern is removed to form a storage electrode having an increased surface area, and is highly integrated in a later process. By forming a capacitor having a sufficient capacitance in the semiconductor device, high integration of the semiconductor device can be achieved, and thus, the reliability of the semiconductor device can be improved.

Claims (5)

A method for manufacturing a capacitor of a semiconductor device, the method comprising: sequentially forming a lower insulating layer and a first insulating layer on an upper surface of a semiconductor substrate; forming a contact hole through etching using a storage electrode contact mask; Forming a first conductive layer connected to the semiconductor substrate, forming a second insulating layer on the first conductive layer, and isotropically etching the second insulating layer by a photolithography process using a gate electrode mask to round the upper portion. Forming the first insulating layer pattern and forming the second conductive layer on the entire surface and forming the first conductive layer pattern and the second conductive layer pattern by a photolithography process using a storage electrode mask. Exposing the insulating layer pattern; and removing the exposed second insulating layer pattern to form a storage electrode having a tunnel at a junction between the first conductive layer and the second conductive layer. Capacitor manufacturing method of a semiconductor device including a step of sex. The method of claim 1, wherein the first insulating layer is formed of a silicon nitride film. The method of manufacturing a capacitor of a semiconductor device according to claim 1, wherein the first and second conductive layers are formed of a polycrystalline silicon film. The method of claim 1, wherein the second insulating layer is formed of an insulating material having an etch ratio difference from the first and second conductive layers during a removal process. The method of claim 1, wherein the removing of the second insulating layer pattern is performed by an etching process using a difference in etching selectivity from the first and second conductive layers.