KR100305923B1 - Method and apparatus for controlling frequency offset in mobile communication system - Google Patents

Abstract

The present invention relates to an apparatus and method for performing frequency offset estimation and calibration for cell search in a mobile communication system. The present invention relates to a primary frequency with a value previously stored in a memory using frequency value statistics based on internal temperature in a first cell search. Compensate for the offset value, and estimate and compensate the frequency offset second by using the first synchronization channel found in step 1 after the cell search step 1 is completed, and continue performing until cell search step 3 is completed. When the search step 3 is completed and the cell is acquired, the base station can be estimated by performing fine estimation of the frequency offset in the third order using the pilot symbol of the first common channel or the pilot symbol of the dedicated channel. Cell) A frequency offset estimation and correction apparatus and method for shortening the searching time to achieve performance improvement are implemented.

Description

Frequency offset estimation and calibration device and method in mobile communication system {METHOD AND APPARATUS FOR CONTROLLING FREQUENCY OFFSET IN MOBILE COMMUNICATION SYSTEM}

The present invention relates to a mobile communication system, and more particularly, to an apparatus and method for performing frequency offset estimation and calibration for cell search.

In general, mobile communication systems can be roughly divided into synchronous and asynchronous. In the meantime, the asynchronous method is one that is adopted in Europe, and the synchronous method is one that is adopted in the United States.

In addition, with the rapid growth of the mobile communication industry, mobile communication systems are emerging as a next generation mobile communication system capable of providing data, video, and the like, as well as normal voice services. However, as mentioned above, the United States and Europe, which implement mobile communication systems in different ways, are working on different types of standardization. Among them, the European next generation mobile communication system is UMTS (Universal Mobile Telecommunication Systems).

On the other hand, in order for a mobile station constituting a mobile communication system (UMTS) to search for a base station, frequency offset estimation and compensation are essential. Such a frequency offset estimation and compensation greatly affects the search time and call quality of the base station. However, there is no standardization of the frequency offset estimation and compensation at this time.

Accordingly, an object of the present invention is to provide an apparatus and method for frequency offset estimation and compensation for improving cell search performance.

Another object of the present invention is to provide a frequency offset estimation and calibration apparatus and method for driving a frequency offset loop using a first synchronization channel after the first cell search step is completed.

In order to achieve the above object, the present invention provides an accumulator for accumulating only synchronization codes of a first synchronization channel when a cell search apparatus of a mobile communication system performs time slot synchronization by a first cell search, and a result value of the accumulator. And a frequency error detector for estimating a frequency offset value as an input, and a local oscillator for generating an estimated oscillation frequency based on the estimated offset value.

In order to achieve the above object, the present invention provides a first process of accumulating only sync codes of a first synchronous channel when a time slot synchronization is performed by a cell search method of a mobile communication system, and the cumulative result value. And a second process of estimating a frequency offset value as an input, and a third process of generating an estimated oscillation frequency based on the estimated offset value.

1 is a diagram illustrating a configuration of a synchronization channel used in a mobile communication system according to an embodiment of the present invention.

2 is a diagram illustrating a configuration of a first common control physical channel in a forward link used in a mobile communication system according to an embodiment of the present invention.

3 is a diagram schematically illustrating a configuration for cell search and frequency offset estimation and correction in a mobile communication system according to an embodiment of the present invention.

4 is a diagram illustrating a configuration for frequency offset estimation and correction in a mobile communication system according to an embodiment of the present invention.

5 illustrates an example of a frequency offset estimator according to an embodiment of the present invention.

6 is a diagram illustrating a control flow for searching a cell in a mobile communication system according to an embodiment of the present invention.

7 is a diagram schematically illustrating a configuration for cell search and frequency offset estimation and correction in a mobile communication system according to another embodiment of the present invention;

8 is a diagram illustrating a configuration for frequency offset estimation and correction in a mobile communication system according to another embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, in adding reference numerals to the components of each drawing, it should be noted that the same reference numerals have the same reference numerals as much as possible even if displayed on different drawings. In the following description of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In general, cell discovery in UMPS, which has the characteristics of an asynchronous base station, is performed in three steps. For this purpose, a synchronization channel, that is, a primary synchronization channel, a secondary synchronization channel, and a first common control are performed. A Primary Common Control Physical Channel must be provided from the base station to the mobile station.

FIG. 1 is a diagram illustrating a configuration of a first synchronization channel and a second synchronization channel described above.

Referring to FIG. 1, the first synchronization code C _P1 is transmitted from the base station by 1/10 periods, i.e., 256 chips of each slot, for each slot constituting the first synchronization channel. Receives 1 synchronization channel and synchronizes the base station slot time with the first synchronization code C _P (cell search step 1).

The base station group designation code of the base station is mapped and transmitted to the second synchronization channel (C _S ^{i, 1} to C _S ^{i, 16} ), and the mobile station synchronized with the timeslot in step 1 of the cell search is performed by the base station group through the second synchronization channel. Detect designated code and frame sync. The base station group designation code is specified according to a COMMA FREE CODE for selecting and combining 16 sync codes among 17 sync codes (SSCH1 to SSCH17) as information for determining a group to which a base station belongs. (Cell navigation step 2)

Meanwhile, since the first synchronization channel and the second synchronization channel do not undergo a scrambling process by the gold code at the base station, the mobile station does not need to descramble the gold code.

FIG. 2 is a diagram illustrating a configuration of a first common control physical channel in a forward link of the UMTS.

Referring to FIG. 2, a minimum unit of transmission in a mobile communication system is a slot of 0.625 ms, and the slot is composed of an 8-bit pilot and 12-bit data. The slots configured as described above are modulated by QPSK (Quadrature Phase Shift Keying), complexly spread the modulated data with an OVSF (Orthogonal Variable Spreading Factor) code, and scrambling using a Gold Code. After performing the transmission, the radio frequency is wirelessly transmitted through a radio frequency (RF) circuit unit and an antenna. On the other hand, the slots disclosed above constitutes one frame having 16 ms in 10 ms time, and the frames configured as described above form 72 super frames of 320 ms in time.

The BCH (Broadcast Channel) is carried on the data of the first common control channel having the above configuration, which contains information on the system being used and the cell where the current terminal is located, and is transmitted to all regions of the cell.

3 is a diagram schematically illustrating a configuration for cell search and frequency offset estimation and correction in a mobile communication system according to an embodiment of the present invention.

Referring to the configuration shown in FIG. 3, the cell searcher 310 performs an operation for searching for a cell to which the current mobile station belongs by data received from the base station. The cell search operation in the Universal Mobile Telecommunication System (UMTS), which is a mobile communication system performed by the cell searcher 310, will be briefly described.

UMTS, which is a mobile communication system, is an asynchronous base station system, and a different cell specific code (base station designation code) is assigned and used for each base station constituting the UMTS to perform asynchronous operation between base stations. have. For example, if there are 512 cells, ie, base stations, constituting the UMTS, each of the 512 base stations allocates and uses 512 different cell designation codes. The cell search algorithm was multileveled by designating a base station constituting the UMTS to a predetermined number of groups, for example, 16 groups, and setting different base station group designation codes to each group.

Here, the multi-stage cell search algorithm may include a cell search step 1 for synchronizing slot times of slots received at maximum power with a primary synchronization channel (P-SCH) transmitted from a base station, and the cell search step 1 Cell search 2 for detecting frame synchronization and a base station group designation code of a base station to which the base station belongs through a second synchronization channel (S-SCH) transmitted from the base station in a time slot synchronized state through And detecting a cell designation code of the base station with a BCH (Broadcast Channel) transmitted by the base station based on the frame synchronization and base station group designation code found in step 2 of the cell search. Cell search is three steps.

Meanwhile, the frequency offset estimator and corrector 320 estimates and corrects a frequency offset using a first synchronization channel received from a base station when the time slot synchronization completion signal from the cell searcher 310 is provided. do.

4 is a diagram illustrating a detailed configuration of the frequency offset estimation and correction unit 320 shown in FIG. 3 for frequency offset estimation and correction according to an embodiment of the present invention.

The configuration of the frequency offset estimation and correction unit 320 will be described with reference to FIG. 4 as follows.

The controller 410 performs overall control of the cell search apparatus for cell search. In particular, in order to implement the present invention, the control unit 410 performs control according to the initialization by the base station measurement request, and performs control according to the frequency offset tracking and calibration performed for the implementation of the present invention after the initialization is performed. To perform. The initial frequency control signal F.C is used as the control signal for the initialization, and the switch control signal S.C is used as the control signal for secondly correcting the frequency offset by the first synchronous channel. In this case, the base station estimation request includes all cases where the mobile station is required to register with the base station, although not shown in the drawing. have. In addition, the initialization referred to in the present invention refers to an operation of first calibrating a frequency offset to receive a synchronization channel received from a base station.

The temperature sensor 412 is configured to measure the internal temperature of the mobile station. In the present invention, the temperature sensor 412 performs the operation of measuring the internal temperature at the request of the controller 410 in performing the initialization described above.

The memory 414 stores a pre-calibrated frequency value for each internal temperature and provides a frequency value corresponding to the internal temperature measured by being accessed by the controller 410. In this case, the frequency value does not mean a specific frequency but is a control value required to generate a specific frequency. When the local oscillator VCTCXO is controlled by a voltage level, the driving frequency value will be a predetermined voltage level. In addition, the frequency value is used as information for the controller 410 to generate the initial frequency control signal (F.C).

The switch 434 is a first synchronous channel that is switched and received by a switch control signal (SC) provided from the control unit 410 after the first time slot is synchronized with the first synchronization channel is completed. The I channel constituting the channel is directly supplied to the despreading unit 418.

The switch 436 is a first synchronization channel which is switched and received by a switch control signal SC provided from the control unit 410 after the first time slot is synchronized with the first synchronization channel. The Q channel constituting the channel is directly supplied to the despreading unit 418.

The descrambling unit Descrambling 416 multiplies the data scrambled using the gold code at the transmitting end of the base station to find the spread data.

The despreading unit 418 multiplies the data spread by using the channelization code at the transmitting end of the base station. The channelization code is used to separate a specific channel when several channels are mixed. It is done. In this case, the data input to the despreading unit 418 is data directly input from the switches 434 and 436 or data input from the descrambling unit 416.

The accumulator 420 accumulates the despread data for a specific time and outputs the accumulated data. An example of the specific time may be 256 chips corresponding to the length of the sync code of the first sync channel.

A frequency offset detector (FDD) 422 determines a frequency offset value based on a value provided from the accumulator 420 and outputs a frequency offset estimate.

The loop filter 424 filters and outputs a frequency offset estimate provided from the FDD 422.

A digital-to-analog converter (DAC) 426 converts the digital frequency offset estimate provided from the loop filter 424 into an analog signal and outputs it. In addition, when performing the above-described initialization, when the initial frequency control signal F.C provided from the controller 410 is input, it is converted into an analog signal and output.

Local oscillator (VCTCXO) 428 generates a suitable frequency by means of an analog voltage level provided from the DAC 426. At this time, the generated frequency is a value of which the frequency offset is firstly corrected by initialization or a value of which the frequency offset is secondly corrected by the first synchronization channel.

The multiplier 430 demodulates the signal by multiplying the received I-channel data by the cosine value cos W _i t of the frequency provided from the VCTCXO 428.

The multiplier 432 demodulates the signal by multiplying the received Q channel data by the sine value sin W _i t of the frequency provided from the VCTCXO 428.

As described above, since the control of the switches 434 and 436 enables the first synchronization channel to be despreaded without going through the descrambling process, the configuration is possible because the base station does not perform scrambling on the first synchronization channel. to be. Therefore, the frequency offset estimation and correction using the first synchronization channel can be performed without completing the three steps of the cell search and the gold code is not determined.

However, according to another embodiment of the present invention, if the cell searcher 310 calculates an estimated value (cumulative value) of the first synchronous channel for a specific purpose, for example, for channel estimation, the cell searcher 310 may be stored therein. It should be provided with a channel estimator, the control unit 410 is to second estimate the frequency offset using the accumulated value output from the channel estimator provided in the cell searcher (310).

7 is a diagram schematically illustrating a configuration for cell search and frequency offset estimation and correction in a mobile communication system according to another embodiment of the present invention.

Referring to the configuration shown in FIG. 7, the cell searcher 310 not only performs an operation for searching for a cell to which the current mobile station belongs by data received from the base station in the same manner as described with reference to FIG. A channel estimator is provided to calculate and output a cumulative value of the first synchronization channel.

Meanwhile, the frequency offset estimator and corrector 320 estimates the frequency offset with the accumulated value in synchronization with the slot synchronization complete signal when the time slot synchronization complete signal and the accumulated value from the cell searcher 310 are provided. Perform the corrective action.

FIG. 8 is a diagram illustrating a detailed configuration of the frequency offset estimation and correction unit 320 shown in FIG. 7 for frequency offset estimation and correction according to another embodiment of the present invention, and the frequency offset shown in FIG. The configuration of the estimating and calibrating unit 320 is a structure in which the switches 438 and 440 and the control unit 410 are changed.

That is, the controller 410 not only performs the control according to the initialization by the base station measurement request but also secondarily corrects the frequency offset by the first synchronization channel by the time slot synchronization completion signal provided from the cell searcher 310. To output a switch control signal (SC).

The switches 438 and 440 are provided to the FDD 422 by switching the output of the accumulator 420 or the accumulated value provided from the cell searcher 310 by the switch control signal SC output from the controller 410. do.

Meanwhile, FIG. 5 is a diagram illustrating an example of a configuration of the FDD 422 described with reference to FIGS. 4 and 8, and is an example implemented by the CPFDD scheme, which includes two delayers 510 and 520 and two multipliers. It can be seen that it is composed of (530, 540) and the adder (550).

The two delayers 510 and 520 delay the I channel data I (n) and the Q channel data Q (n) of the received data, respectively, and are delayed by the I channel data I (n-1) and Q channel data Q (n-1). ) On the other hand, the two multipliers (530, 540) are the I-channel data I (n-1) and Q channel data Q (n-1) and the non-delayed I-channel data I (n) and the output from the delays (510, 520) Q-channel data Q (n) is multiplied and output. The adder 550 outputs a difference between a value output from the multiplier 530 and a value output from the multiplier 540 as a frequency offset value. This is represented by Equation 1 below.

6 is a diagram illustrating a control flow for searching a cell in a mobile communication system according to an embodiment of the present invention. Referring to FIG. 6, after initializing a frequency offset by performing a base station tracking request, the cell searcher 310 sequentially performs steps 1 to 3 of the cell search, and the cell search step 1 is performed. After that, the frequency offset estimation and correction unit 320 performs a frequency offset secondary calibration by a synchronization code of the first synchronization channel.

Hereinafter, an operation according to an embodiment of the present invention will be described in detail with reference to the above configuration.

When the base station measurement request occurs in step 610 of FIG. 6, the mobile station initializes the cell searcher 310 before performing the process of acquiring the base station by performing step 612. The initialization will be referred to as an operation of determining the appropriate oscillation frequency in consideration of the frequency offset.

Looking at the initialization operation in more detail, the control unit 410 is provided with a value measured from the temperature sensor 412 in step 612a. The value provided by the temperature sensor 412 means the current temperature inside the mobile station. In step 612b, the controller 410 receives the predetermined value from the temperature sensor 412, accesses the memory 414 based on the provided value, and reads a pre-calibrated frequency value. The memory 414 should have an appropriate frequency value in the form of a memory table corresponding to the value provided from the temperature sensor 412. In other words, the memory 414 should store the driving frequency value of the local oscillator VCTCXO according to the internal temperature change of the mobile station in advance. An example of the memory table provided in the memory 414 may be represented as shown in Table 1 below.

Temperature Oscillation frequency Drive frequency value ~ T ₁ f ₁ A ₁ T ₁ to T ₂ f ₂ A ₂ T ₂ ~ T ₃ f ₃ A ₃ T ₃ ~ f ₄ A ₄

Looking through the memory table disclosed in Table 1, for example, when the internal temperature measured by the temperature sensor 412 falls within the 'T ₁ ~ T ₂ ' range, the control unit 410 is f ₂ A driving frequency value A ₂ may be obtained from the memory 414 to obtain an oscillation frequency.

Meanwhile, as described above, the driving frequency value specified according to the internal temperature in Table 1 does not mean an oscillation frequency, but is a control value required for generating an oscillation frequency, if the local oscillator (VCTCXO) 428 is used. Is controlled by the voltage level, the driving frequency value will be the value required to obtain a predetermined voltage level. Thus, the oscillation frequency obtained by using the pre-calibrated value of the memory 414 will correct the frequency instability of the local oscillator (VCTCXO) 428 in the mobile station. The description of the local oscillator 428 as 'VCTCXO' means that the factors determining the oscillation frequency are influenced not only by the voltage but also by the internal temperature of the mobile station.

The controller 410 reading the driving frequency value provides it as a control value of a local oscillator (VCTCXO) 428 that generates a local frequency of the mobile station in step 612c.

Meanwhile, the local oscillator (VCTCXO) 428 receiving the control value starts initial driving to generate an initial frequency, and the generated initial frequency is a frequency for decoding a received signal (cos W _i t, sin W). _i t).

Although the frequency offset due to the frequency instability of the local oscillator 428 has been corrected by the above-described operation, the initial frequency offset due to the difference between the received signal frequency and the output frequency of the local oscillator (VCTCXO) 428 is received. It remains in the stomach.

If the initialization is performed by the initial frequency, the process proceeds to step 614 to detect whether a primary synchronization channel is received. Reception detection of the first synchronization channel is performed by the cell searcher 310. When the cell searcher 310 detects reception of the first synchronization channel in step 614, the cell searcher 310 proceeds to step 616 to find a time slot that matches the base station having the strongest signal using the first synchronization channel. step)

In more detail, the operation of the cell search step 1 is performed by accumulating the first synchronous signal received for 256 chip periods to form one hypothesis, and making the hypothesis by one chip unit makes 2560 units during one slot period. You make a hypothesis. At this time, a matched filter or other similar device is used to find a Primary Synchronization Code common to all equipment stations, and when one hypothesis is made to increase reliability, one slot is targeted. Asynchronously accumulate values over multiple slot intervals.

In operation 618, the best hypothesis having the largest value among the cumulative values of the various hypotheses obtained in operation 616 is selected. When the best hypothesis for time slot synchronization is found in step 618, the time slot synchronization completion signal according to the hypothesis is transmitted to the controller 410. The controller 410 estimates and corrects an initial frequency offset in steps 636 and 638 using the slot synchronization and the first synchronization code found in step 1, and performs step 2 in cell searching in steps 620 and 624. do. The process performed in the step 636 will be performed by the frequency offset estimation and correction unit 320, and the process performed in the steps 620 through 624 is performed by the cell searcher 310.

First, the performing operation of the cell search step 2 will be described.

In steps 620 to 624 where the cell search step 2 is performed, the frame synchronization of the base station having the slot synchronization obtained in the cell search step 1 described above and the group to which the base station belongs are found.

That is, the cell searcher 310 proceeds to step 622 when the reception of the second synchronization channel is detected in step 620. In step 622, the cell searcher 310 searches for the frame synchronization of the base station and the group to which the base station belongs by performing the cell search step 2 through the received second synchronization channel.

The hypothesis used to find the group is obtained by asynchronously accumulating a correlator output corresponding to a 16-length sequence, and the number of possible hypotheses thus obtained is 512 considering 32 group codes and 16 cyclic shifts.

An example of a COMMA FREE CODE table required to find a group to which the base station belongs is shown in Table 2 below.

C _s ^{i, 1} C _s ^{i, 2} C _s ^{i, 3} C _s ^{i, 4} C _s ^{i, 5} C _s ^{i, 6} C _s ^{i, 7} C _s ^{i, 8} C _s ^{i, 9} C _s ^{i, 10} C _s ^{i, 11} C _s ^{i, 12} C _s ^{i, 13} C _s ^{i, 14} C _s ^{i, 15} C _s ^{i, 16} G1 One 2 3 11 6 3 15 7 8 8 7 15 3 6 11 2 G2 One 2 9 3 10 11 13 13 11 10 3 9 2 One 16 16 G3 One 3 16 12 14 2 11 2 17 12 16 3 One 13 4 13 G4 One 4 5 4 One 10 9 8 17 14 12 14 17 8 9 10 G5 One 5 13 13 5 One 7 14 3 16 8 8 16 3 14 7 G6 One 6 3 5 9 9 8 3 6 One 4 2 15 15 2 4 G7 One 7 10 14 13 17 3 9 9 3 17 13 14 10 7 One G8 One 8 17 6 17 8 One 15 12 5 13 7 13 5 12 15 G9 One 9 7 15 4 16 16 4 15 7 9 One 12 17 17 12 G10 One 10 14 7 8 7 14 10 One 9 5 12 11 12 5 9 G11 One 11 4 16 12 15 12 16 4 11 One 6 10 7 10 6 G12 One 12 11 8 16 6 10 5 7 13 14 17 9 2 15 3 G13 One 13 One 17 3 14 8 11 10 15 10 11 8 14 3 17 G14 One 14 8 9 7 5 6 17 13 17 6 5 7 9 8 14 G15 One 15 15 One 11 13 4 6 16 2 2 16 6 4 13 11 G16 One 16 5 10 15 4 2 12 2 4 15 10 5 16 One 8 G17 One 17 12 2 2 12 17 One 5 6 11 4 4 11 6 5 G18 2 8 11 15 14 One 4 10 10 4 One 14 15 11 8 2 G19 2 9 One 7 One 9 2 16 13 6 14 8 14 6 13 16 G20 2 10 8 16 5 17 17 5 16 8 10 2 13 One One 13 G21 2 11 15 8 9 8 15 11 2 10 6 13 12 13 6 10 G22 2 12 5 17 13 16 13 17 5 12 2 7 11 8 11 7 G23 2 13 12 9 17 7 11 6 8 14 15 One 10 3 16 4 G24 2 14 2 One 4 15 9 12 11 16 11 12 9 15 4 One G25 2 15 9 10 8 6 7 One 14 One 7 6 8 10 9 15 G26 2 16 16 2 12 14 5 7 17 3 3 17 7 5 14 12 G27 2 17 6 11 16 5 3 13 3 5 16 11 6 17 2 9 G28 2 One 13 3 3 13 One 2 6 7 12 5 5 12 7 6 G29 2 2 3 12 7 4 16 8 9 9 8 16 4 7 12 3 G30 2 3 10 4 11 12 14 14 12 11 4 10 3 2 17 17 G31 2 4 17 13 15 3 12 3 15 13 17 4 2 14 5 14 G32 2 5 7 5 2 11 10 9 One 15 13 15 One 9 10 One

As shown in Table 2, it can be seen that the group designation codes C _s ^{i, 1} to C _s ^{i, 16} that designate each group are uniquely assigned to each group. The group designation code transmits the base station by mapping a sync code corresponding to the base station group designation code to which the base station belongs to the base station through a second synchronization channel.

Next, an operation of estimating and correcting the frequency offset performed in steps 636 and 638 by the timeslot synchronization completion signal provided from the cell searcher 410 or the cell searcher 310 will be described. The frequency offset estimation and correction operation to be described below will be described as different embodiments by dividing the case where the cell searcher 310 has a channel compensator with and without the channel compensator with reference to the configurations shown in FIGS. 4 and 8. do.

First, in the case of the cell searcher 310 having no channel compensator, when the cell search step 1 is completed, the controller 410 receives the timeslot synchronization completion signal and controls the switches 434 and 436 so that the received signal is decoded. Directly inputted to the despreading unit 418 without going through the scrambling unit 416, multiplies the channelization code according to the slot synchronization obtained in the cell search step 1, and accumulates this for 256 chip intervals by the accumulator 420. By inputting to the FDD (422) to estimate the frequency offset value and undergoes a subsequent calibration process.

Secondly, the cell searcher 310 may have a device that compensates for channels during cell search. In the case of the cell searcher 310 having the channel compensator, after the first cell search step is completed, the channel estimation unit of the cell searcher 310 performs the first synchronization code in the first cell search step as shown in the spreading unit 418 of FIG. 4. Based on the obtained slot synchronization, the received signal is multiplied and accumulated in 256 chip intervals. The controller 410 directly inputs this value to the FDD 422 of FIG. 4 to estimate the frequency offset value and then goes through the calibration process. To this end, the control unit 410 blocks the connection between the accumulator 420 and the FDD 422 by controlling the switches 438 and 440 by outputting the switch control signal SC in synchronization with the time slot synchronization completion signal. Connect 310 to the FDD 422. That is, the I channel accumulated value output from the cell searcher 310 is provided to the FDD 422 through the switch 438, and the Q channel accumulated value output from the cell searcher 310 is switched 440. By inputting to the FDD (422) through the to estimate the frequency offset value and then undergoes a calibration process.

At the same time, the cell searcher 310 performs step 2 of cell searching in steps 620 to 624. In this case, as described above, the process performed in step 636 may be performed by the frequency offset estimation and correction unit 320, and steps 620 through 624 may be performed by the cell searcher 310. However, if there is a channel compensator in the cell searcher 310, the cumulative value is generated in the cell searcher 310. If there is no channel compensator in the cell searcher 310, the cumulative value is calculated by the frequency offset estimation and correction unit 320. Is generated.

Meanwhile, the operation of estimating the frequency offset value by the FDD 422 and the operation of correcting the same will be described based on the accumulated values obtained by the first and second embodiments. As the FDD 422, various forms such as CPFDD (Cross Product Frequency DifferenceDetector) and VECTOR separation method may be used.

First, in the case of using the CPFDD, the cumulative accumulation in the accumulator 420 or the cell searcher 310 is accumulated for 256 chip periods to reduce the influence of channel noise. Although the cumulative length is 128 chip intervals, 256 chips are more suitable for maintaining orthogonality with other physical channels. When the accumulation by the accumulator in the accumulator 420 or the cell searcher 310 is completed, the result value is input to the CPFDD, and the frequency offset value is continuously estimated, and the VCTCXO oscillation frequency of the mobile station is estimated second. On the other hand, the accumulator in the accumulator 420 or the cell searcher 310 is not operated for a time when the slot without code in the first synchronization channel corresponds to 9/10.

In more detail, due to the inaccuracy of the local oscillator (VCTCXO) 428 of the base station and the mobile station and the Doppler frequency in the mobile channel, an offset is generated between the carrier frequency of the received signal and the oscillation frequency of the mobile station local oscillator (VCTVXO). Due to the frequency offset, the received data is distorted, which adversely affects data demodulation. Therefore, a feed-back loop is needed to minimize the frequency offset by detecting the frequency offset to synchronize the oscillation frequency with the frequency of the received signal. A loop that plays such a role is an AFC loop, and the FDD 422 detects a frequency difference, and a method of multiplying the delayed I and Q channel values by the original value is called CPFDD. The CDFDD first despreads a pilot signal spread with a spreading code. In order to remove noise components, the pilot filter performs filtering using a pilot symbol known to the receiver of the mobile station, and the pilot filter can be applied to either an Infinite Impulse Response (IIR) type or a Finite Impulse Response (FIR) type. Do. The pilot filter serves as a weighted addition to the despread pilot signal, and the output of the filter is taken for each symbol unit to multiply the delayed I and Q components to obtain a frequency error component.

On the other hand, the vector separation method accumulates from the first chip to 128 chips in the I-channel 256 chip section of the first synchronous channel to form the first half symbol (I ₁ ), and accumulates from the 129th chip to the 256th chip to form the second half symbol (I _2). In the same way, for the Q channel, the first and second symbols Q ₁ and Q ₂ are generated by the method described above. When the symbol is generated, the phase angle of the complex symbol formed by the first half symbol of the I channel and the first half symbol of the Q channel is obtained by an arctangent method, and the phase angle is obtained by similarly for the second half symbol of the I and Q channels. The two phase angles obtained above divided by the time corresponding to 128 chips are used as the frequency offset estimate. At this time, the remaining time without the code is the same as the CPFDD described earlier that the tracker does not operate.

That is, when the frequency offset estimate obtained by the vector separation method is expressed as an equation, it may be expressed as Equation 2 below.

When the step 2 of cell search is completed in step 622, in step 624, the best hypothesis having the largest value among the accumulated values is selected in step 622, and the flow proceeds to step 626 in which the primary common control channel (Primary CCPCH) is established. Detect reception. If the reception of the first common control channel is detected in step 626, the process proceeds to step 628 and performs step 3 of cell searching within the code group determined by the hypothesis. Here, the scrambling code having the largest value is found by obtaining a correlation value between each of the 16 scrambling codes and the first common control channel in the base station group obtained in the second cell search. On the other hand, in step 630, it is determined whether the cell search performed in step 628 is completed, and the FDD 422 driven from the cell search step 2 continuously compensates for the residual frequency offset in the received signal. From the beginning of cell search phase 3, the frequency offset is already within the traceable range.

If the completion of the cell search step 3 is detected in step 630, the flow proceeds to step 632, and the FDD 422 does not use the first synchronous channel and uses the pilot symbol of the first common control channel or in a dedicated channel. A pilot symbol is used to enter frequency offset fine estimation.

In step 634, the finely estimated frequency offset in step 632 passes through the low pass filter through the DAC 426. The output value of the low pass filter adjusts the control voltage of the local oscillator of the mobile station to change the oscillation frequency.

As described above, the present invention is to achieve performance improvement by reducing the base station (cell) search time by performing the estimation and compensation of the frequency offset in three stages. That is, the first frequency offset value is compensated by a value previously stored in the memory 414 using the frequency value statistics based on the internal temperature in the first cell search. In addition, since the first step of the cell search is completed, the frequency offset is secondarily estimated and compensated using the first synchronization channel found in the first step, and this operation is continued until the third step of the cell search is completed. When the cell search step 3 is completed and the cell is obtained, the frequency offset is finely estimated in the third order using a pilot symbol of a first common channel or a pilot symbol of a dedicated channel.

As described above, the present invention reduces the frequency offset value remaining in the received signal before proceeding to the cell search step 3 by using the first synchronization channel in the second order in the frequency offset estimation and compensation process over three orders. Therefore, when the correlation value with the 16 scrambling codes in the base station group found in the cell search step 2 is reduced, the attenuation of the correlation value can be reduced for the same correlation and the length of the correlation interval can be increased for the fixed correlation value attenuation. There is an effect that can improve the performance of the cell search.

Claims (30)

In the cell search apparatus of the mobile communication system, A despreading unit for separating a specific channel from the first synchronization channel by a channelization code when time slot synchronization is performed by the first cell search; An accumulator for accumulating the specific channel value; A frequency error detector for estimating a frequency offset value by inputting the result value of the accumulator; And a local oscillator for generating an estimated oscillation frequency based on the estimated offset value. The method of claim 1, wherein the accumulator, And an I channel and a Q channel for accumulating the I channel and the Q channel of the predetermined cumulative section constituting the specific channel, respectively, to generate two symbols corresponding to the I channel and the Q channel. The method of claim 2, And a specific channel of the predetermined cumulative section is a 256-chip sync code. The method of claim 2 or 3, wherein the frequency error detector, A first delay delaying the I-channel symbol; A second delay delaying the Q channel symbol; A first logic gate for logically multiplying the I channel symbol and the output of the second delay unit; A second logical gate for logically multiplying the Q channel symbol with the output of the first delay unit; And an adder configured to add outputs of the first logic gate and the second logic gate to output a frequency offset value. The method of claim 2, And a specific channel of the predetermined cumulative interval is a synchronization code of 128 chips among 256 chips. The method of claim 2 or 5, wherein the frequency error detector, And a frequency offset value of the complex symbol divided by 128 chips to estimate a frequency offset value. In the cell search apparatus of the mobile communication system, A temperature sensor for measuring the internal temperature of the mobile station, A memory for storing a driving frequency value corresponding to the measured internal temperature; A controller which receives a drive frequency value corresponding to the internal temperature measured by the temperature sensor by a base station search request and performs initialization, and detects that time slot synchronization is performed by a cell search step 1 and outputs a switch control signal; , A switch forming a path of a first synchronous channel by the switch control signal; A spreading unit for separating a specific channel from the first synchronous channel inputted through the switch by a channelization code; An accumulator for accumulating the specific channel value; A frequency error detector for estimating a frequency offset value by inputting the result value of the accumulator; And a local oscillator for generating an estimated oscillation frequency based on the estimated offset value. The method of claim 7, wherein the accumulator, And an I channel and a Q channel for accumulating the I channel and the Q channel of the predetermined cumulative section constituting the specific channel, respectively, to generate two symbols corresponding to the I channel and the Q channel. The method of claim 8, And a specific channel of the predetermined cumulative section is a 256-chip sync code. The method of claim 8 or 9, wherein the frequency error detector, A first delay delaying the I-channel symbol; A second delay delaying the Q channel symbol; A first logic gate for logically multiplying the I channel symbol and the output of the second delay unit; A second logical gate for logically multiplying the Q channel symbol with the output of the first delay unit; And an adder configured to add outputs of the first logic gate and the second logic gate to output a frequency offset value. The method of claim 8, And a specific channel of the predetermined cumulative interval is a synchronization code of 128 chips among 256 chips. The method of claim 8 or 11, wherein the frequency error detector, And a frequency offset value of the complex symbol divided by 128 chips to estimate a frequency offset value. In the cell search apparatus of the mobile communication system, A cell searcher which accumulates the specific channel value by separating a specific channel of the first synchronization channel after synchronizing the time slots by the first cell search; A control unit for receiving a time slot synchronization completion signal from the cell searcher and outputting a switch control signal; A switch switched by the switch control signal; A frequency error detector for estimating a frequency offset value by inputting a cumulative value provided from the cell searcher through the switch; And a local oscillator for generating an estimated oscillation frequency based on the estimated offset value. The method of claim 13, wherein the cell searcher, And an I channel and a Q channel for accumulating the I channel and the Q channel of the predetermined cumulative section constituting the specific channel, respectively, to generate two symbols corresponding to the I channel and the Q channel. The method of claim 14, And a specific channel of the predetermined cumulative section is a 256-chip sync code. The method of claim 14 or 15, wherein the frequency error detector, A first delay delaying the I-channel symbol; A second delay delaying the Q channel symbol; A first logic gate for logically multiplying the I channel symbol and the output of the second delay unit; A second logical gate for logically multiplying the Q channel symbol with the output of the first delay unit; And an adder configured to add outputs of the first logic gate and the second logic gate to output a frequency offset value. The method of claim 14, And a specific channel of the predetermined cumulative interval is a synchronization code of 128 chips among 256 chips. The method of claim 14 or 17, wherein the frequency error detector, And a frequency offset value of the complex symbol divided by 128 chips to estimate a frequency offset value. In the cell search method of the mobile communication system, A first process of separating and accumulating a specific channel from the first synchronization channel by a channelization code when time slot synchronization is performed by the cell search step 1; A second process of estimating a frequency offset value by inputting the cumulative result value; And a third process of generating an estimated oscillation frequency based on the estimated offset value. The method of claim 19, wherein the first process, And calculating two symbols corresponding to the I and Q channels by accumulating the I and Q channels, respectively, of the predetermined cumulative section constituting the specific channel. The method of claim 20, And a specific channel of the predetermined cumulative section is a 256-chip sync code. The method of claim 20 or 21, wherein the second process, Delaying the I-channel symbol; Delaying the Q channel symbol; A third step of logically multiplying the I channel symbol and the output of the second delay unit; A fourth step of logically multiplying the Q channel symbol by the output of the first delay unit; And a fifth step of adding the outputs of the first logic gate and the second logic gate to output a frequency offset value. The method of claim 20, And a specific channel of the predetermined cumulative section is a synchronization code of 128 chips of 256 chips. The method of claim 20 or 23, wherein the second process, And estimating a frequency offset value by dividing the phase angle difference of the complex symbol by the two symbols into 128 chips. In the frequency offset estimation and correction method of the mobile communication system, A first step of determining a driving frequency value based on a measured internal temperature when a base station acquisition request is made; A second process of estimating a first frequency offset by generating an initial frequency based on the driving frequency value; Performing a cell search using the initial frequency to detect time slot synchronization; A fourth process of sensing the time slot synchronization to form a path of a first synchronization channel; A fifth process of separating and accumulating a specific channel from the first synchronous channel input through the path formed by the channelization code; A sixth step of estimating a frequency offset value by inputting the cumulative result value; And a seventh process of estimating a secondary frequency offset by generating an estimated oscillation frequency based on the estimated offset value. The method of claim 25, wherein the fifth process, And calculating two symbols corresponding to the I and Q channels by accumulating the I and Q channels, respectively, of the predetermined cumulative section constituting the specific channel. The method of claim 26, And a specific channel of the predetermined cumulative section is a 256-chip sync code. The method of claim 26 or 27, wherein the fifth process, Delaying the I-channel symbol; Delaying the Q channel symbol; A third step of logically multiplying the I channel symbol and the output of the second delay unit; A fourth step of logically multiplying the Q channel symbol by the output of the first delay unit; And a fifth step of adding the outputs of the first logic gate and the second logic gate to output a frequency offset value. The method of claim 26, And a specific channel of the predetermined cumulative section is a synchronization code of 128 chips of 256 chips. The method of claim 26 or 29, wherein the fifth process, And estimating a frequency offset value by dividing the phase angle difference of the complex symbol by the two symbols into 128 chips.