KR100284002B1 - Multiplexing and demultiplexing unit between the metric unit group signal and the management unit signal in the optical network terminal - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexing and demultiplexing apparatus between a scrambling unit group signal and a management unit signal in an optical network unit, and comprises a transmitting unit and a receiving unit.

At this time, the transmitter receives a predetermined number of leveling unit group signals (TUG-2), selects seven leveling unit group signals out of them, and adds a predetermined high level path overhead (POH) VC-3) and adds the AU-3 pointer again to generate and output the management unit signal (AU-3).

The receiving unit receives the predetermined management unit signal AU-3, analyzes the corresponding AU-3 pointer to find the higher virtual box signal VC-3, processes the upper path overhead POH, And outputs it as a group signal of the gradation unit.

The present invention can be used to multiplex seven metric unit group signals TUG-2 to form and transmit a management unit signal AU-3 or receive the management unit signal AU-3 to generate seven Demultiplexing unit group signal (TUG-2), and thus can be usefully used in a multiplexing / demultiplexing apparatus in an optical network unit.

Description

A multiplexing and demultiplexing unit for a tributary unit group signals or a fiber loop carrier system between a metric unit group signal and a management unit signal in an optical network terminal,

The present invention relates to a multiplexing and demultiplexing device between a scrambling unit group signal and a management unit signal in an optical network unit, and more particularly, to an apparatus for multiplexing and demultiplexing a scrambling unit group signal (TUG-2) (AU-3), or receives the management unit signal (AU-3) and separates it into seven metric unit group signals (TUG-2) And a device for performing a function of transmitting the data.

FIG. 1 is a basic network configuration diagram of an optical network terminal, which includes a Central Office Terminal (COT) 10 and a Remote Terminal (RT) 11. At this time, the COT 10 is connected to each subscriber through a general exchange line, a leased line, a LAN (Local Area Network), etc., and these subscribers are connected to a public telephone subscriber or leased line subscribers .

The COT 10 and the RT 11 constituting the optical network terminal are connected to each other by the optical line 12 so that they can communicate with each other. At this time, the communication by the light between the COT 10 and the RT 11 is performed by using the synchronous transmission method. In the synchronous transmission method, the signals are multiplexed according to the synchronous multiplexing procedure and then transmitted and received.

2 is a mapping structure diagram for a DS1 signal to a synchronous transport module signal (STM-1: Synchronous Transport Module-1). The DS1 signal 110 is mapped to a sub-box (C-11) And when the sub-path overhead 131 is added to the sub-box (C-11: 120), it becomes a sub-virtual box 130 (Virtual Container).

When the pointer 141 indicating the position of the lower virtual box 130 is added to the lower virtual box (VC-11: 130), the scale unit signal (TU-11: 140) The pointer 151 for the four gradation unit signals (TU-11: 140) is set to the front of the gradation unit group signal 150 (TUG-2) Respectively.

A high-level virtual box signal (VC-3: 160) is generated when seven hierarchical level group signals 150 (TUG-2) are collected and an upper path overhead 161 is added at the foremost part. A management unit signal (AU-3) 170 is generated when a pointer 171 is added to the management unit signal 160 and three management unit signals 170 are gathered to create a management unit group signal 180 (AUG) When a section overhead is added to the unit group signal 180 (AUG), a synchronous transport module signal (STM-1: 190) is finally generated.

As described above, the DS1 signal 110 input to the optical network unit using the synchronous transmission scheme is multiplexed to form the synchronous transport module signal STM-1 190, and then transmitted to the optical line 12 Lt; / RTI >

Therefore, in the optical network unit using the synchronous transmission method, seven mapping units (i.e., the mapping unit group signal TUG-2) between the metrics unit group signal 150 and the management unit signal 170 in the above- (TUG-2) and transmits the management unit signal (AU-3) after forming the management unit signal (AU-3) .

Accordingly, the present invention has been developed in order to meet the above-mentioned needs, and it is an object of the present invention to provide a system and method for transmitting a control unit signal AU-3 by multiplexing seven metric unit group signals TUG- -3) and separates the signals into seven metric unit group signals TUG-2 and transmits them. That is, multiplexing and demultiplexing between the metric unit group signals and the management unit signals in the optical network terminal The purpose of the device is to provide.

In order to achieve the above object, a multiplexing and demultiplexing apparatus between a scrambling unit group signal and a management unit signal in the optical network terminal according to the present invention includes a predetermined number of scrambling unit group signals TUG- A metric unit group signal input unit for selecting a predetermined number of metric unit group signals TUG-2, multiplexing them, and outputting the multiplexed metric unit group signals as parallel data of a predetermined number of bits; The high level virtual box signal VC-3 is formed by inserting a predetermined high path overhead into the parallel data outputted from the hierarchy unit group signal input unit, and then outputs the high level virtual box signal VC-3 and the J1 offset clock A high virtual box signal forming unit; A pointer word of a higher virtual box VC-3 is generated based on the J1 offset clock, inserted into the higher virtual box signal VC-3 output from the higher virtual box signal forming unit, A management unit signal forming and pointer generating unit for forming the unit signal AU-3; And a management unit signal output unit for receiving the parallel management unit signal AU-3 output from the management unit signal forming and pointer generating unit, converting the parallel management unit signal into a serial management unit signal AU-3, and outputting the serial management unit signal AU-3; And a predetermined management unit signal (AU-3), converts the 8-bit parallel data into an 8-bit parallel data, and outputs the 8-bit parallel data; Extracts and interprets the pointer word in the parallel management unit signal output from the management unit signal input unit to check whether there is an abnormality in the management unit signal and generates a J1 offset clock indicating the start position of the higher virtual box signal VC-3 Management unit signal analysis unit; A higher virtual box signal analyzer for sorting and outputting the higher virtual box signal VC-3 using the J1 offset clock and processing the path overhead of the higher virtual box signal VC-3; And a scrambling unit group signal output unit for demultiplexing and outputting the scrambling unit group signal TUG-2 multiplexed in the higher virtual box signal VC-3 output from the higher virtual box signal analyzing unit .

At this time, the gradation unit group signal input unit receives a predetermined number of gradation unit group signals TUG-2 in series, selects seven gradation unit group signals TUG-2 according to an external predetermined selection signal, A gradation unit group signal selector for outputting the gradation unit group signal through seven data lines; And a multiplexing and serial / parallel converting unit for multiplexing the seven leveling unit group signals (TUG-2) received from the leveling unit group signal selecting unit 7: 1 into a parallel signal and outputting it as predetermined parallel data Can be more preferably carried out.

Also, the higher virtual box signal forming unit may include a path overhead processing unit for receiving predetermined upper path overhead data, multiplexing and outputting the upper path overhead data; The high level virtual box signal VC-3 is constructed by inserting the high level path overhead outputted from the path overhead processing unit into the parallel data outputted from the hierarchy level group signal input unit, And a higher virtual box path overhead multiplexer for outputting the corresponding J1 offset clock; And a bit training parity generator for generating a B3 byte for the higher virtual box signal (VC-3) output immediately before the higher virtual box path overhead multiplexer and outputting the B3 byte to the path overhead processor Can be more preferably carried out.

The high-level virtual box signal analyzing unit includes a high-level virtual box sorting unit for aligning the high-level virtual box signals VC-3 included in the parallel data output from the management unit signal analyzing unit; A higher virtual box path overhead demultiplexer for demultiplexing and outputting the higher virtual box path overhead in the higher virtual box signal (VC-3) sorted and outputted from the higher virtual box arrangement; A J1 demultiplexer for receiving J1 data from the higher virtual box path overhead demultiplexer and extracting the J1 data from the associated time slot every predetermined period to form a J1 format of a predetermined number of bytes; A C2-MIS detecting unit for detecting C2 bytes received from the high virtual box path overhead demultiplexing unit according to a predetermined rule and detecting or releasing a C2-MIS (Mismatch path trace ID / signal label); A far-end reception failure detector for detecting or releasing a Far End Receive Failure (FERF) by inspecting a G1 byte received from the higher virtual box path overhead demultiplexer according to a predetermined rule; And a function of detecting and accumulating bit error parities (BIP-8) errors according to a predetermined rule on the high-order virtual box signal (VC-3) input from the high-order virtual box arrangement unit and encoding the error number by 4 bits And a bit trained parity error detecting unit for performing a bit trained parity checking operation.

1 is a basic network configuration diagram of an optical network terminal,

FIG. 2 is a diagram showing a mapping structure of the DS1 signal to the STM-1 signal,

Figure 3 is a block diagram of the present invention,

4 is a detailed block diagram of the gradation unit group signal input unit,

5 is a detailed block diagram of a high-order virtual box signal forming unit,

6 is a detailed block diagram of a senior virtual box signal analyzer;

DESCRIPTION OF THE REFERENCE NUMERALS

310: Transmitting section 311: Scaling unit group signal input section

312: Senior virtual box signal forming section

313: management unit signal formation and pointer generation unit

314: management unit signal output unit 320:

324: management unit signal input unit 323: management unit signal analysis unit

322: Senior virtual box signal analyzing unit 321: Scaling unit group signal output unit

410: scaling unit group signal selection unit 420: multiplexing and serial /

510: Senior virtual box path overhead multiplexer

520: path overhead processing unit 530: bit teaching parity generating unit

610: Senior virtual box path overhead demultiplexer

620: J1 demultiplexer 630: C2-MIS detector

640: far-end reception failure detection unit 650: bit non-

660: Senior virtual box alignment section

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a block diagram of a multiplexing and demultiplexing apparatus 300 according to the present invention, and includes a transmitting unit 310 and a receiving unit 320.

At this time, the transmitting unit 310 includes a gradation unit group signal input unit 311, a higher virtual box signal forming unit 312, a management unit signal forming and pointer generating unit 313, and a management unit signal output unit 314 The management unit signal analyzing unit 322, the senior virtual box signal analyzing unit 323 and the gradation unit group signal output unit 324 are connected to the receiving unit 320.

The transmitting unit 310 configured as described above receives a predetermined number of leveling unit group signals TUG-2, selects seven leveling unit group signals TUG-2 among them, (AU-3: 170) by adding a management unit signal pointer (AU-3 pointer: 171) to the high level virtual box signal (VC-3: 160) do.

The receiving unit 320 receives the predetermined management unit signal AU-3 170 and analyzes the corresponding management unit signal pointer AU-3 pointer 171 to generate a high-level virtual box signal VC-3 160. [ And performs processing to output 7 gradation unit group signals TUG-2.

First, each component of the transmission unit 310 will be described in detail.

FIG. 4 is a detailed block diagram of the scouting unit group signal input unit 311, which includes a scouting unit group signal selector 410 and a multiplexing and serial / parallel converting unit 420.

The gradation unit group signal selection unit 410 receives a predetermined number (for example, nine) gradation unit group signals TUG-2: 6.912 Mbits / sec in series, and outputs seven gradation unit group signals TUG- And sends the selected data to multiplexing and serial / parallel converter 420 through seven data lines, respectively. At this time, a selection signal for selecting seven gradation unit group signals TUG-2 from a predetermined number of gradation unit group signals TUG-2: 150 is received from a predetermined main control unit (MCU) .

The multiplexing and serial / parallel conversion unit 420 multiplexes seven leveling unit group signals TUG-2 received from the leveling unit group signal selection unit 410 in a 7: 1 manner, and then converts the seven leveling unit group signals TUG- Line. At this time, seven 6.912 Mbits / sec serial signals are multiplexed and then converted into 8 bit parallel signals, so that the data rate of each data line is 6.048 Mb / s.

FIG. 5 is a detailed block diagram of the higher virtual box signal forming unit 312, which includes a higher virtual box path overhead multiplexing unit 510, a path overhead processing unit 520, and a bit teaching parity generating unit 530.

The higher virtual box path overhead multiplexing unit 510 is connected to the parallel data TUG-2P output from the hierarchy unit group signal input unit 311 and is multiplexed from the path overhead processing unit 520, (VC-3D) through the 8-bit data line after constructing the high-order virtual box signal VC-3 by inserting the upper path overhead 161 (MOHD) to be transmitted, and outputs the J1 offset clock J1 Offset- .

The path overhead processor 520 receives the upper path overhead data J1, C2, G1, H4, F2, Z3, Z4 and Z5 from a predetermined main control unit MCU, 530, and transmits the multiplexed B3 bytes to the high-level virtual path overhead multiplexing unit 510. [

Bit training parity generation unit 530 generates B3 bytes for the higher virtual box signal VC-3 (VC-3D) output from the higher virtual box path overhead multiplexing unit 510 immediately before the signal to be processed And outputs it to the next path overhead processing unit 520.

The role of the path overheads (J1, C2, G1, H4, F2, Z3, Z4, Z5, and B3) transmitted from the path overhead processing unit 520 to the higher virtual box path overhead multiplexing unit 510 is Respectively.

The J1 byte is an overhead used for path tracing and is a channel for continuously tracking the connection state of the communication path. That is, by repeatedly transmitting a certain pattern, it is possible to confirm that the receiving apparatus is connected to the correct transmitting apparatus. A 64-byte free format or a 16-byte E.164 format is used.

The B3 byte is an overhead for path error monitoring and performs an even check on the previous high virtual box signal (VC-3), inserted into the B3 byte and transmitted. (8 bits) for all the bytes in the high-level virtual box signal (VC-3) at the time of reception, compares it with the corresponding B3 byte, sets a bit in which an error has occurred, ). In addition, the number of errors is transmitted as far-end block error (FEBE) data of the G1 byte of the transmission side.

The C2 byte is an overhead for the display of the path signal, indicating the use of the high virtual box (VC-3) path and the special signal combination structure of the high virtual box payload.

Fabric Block Error (FEBE) is data overhead occupying the upper 4 bits of the G1 byte, which is the overhead used for far-field error checking. That is, the number of errors is counted from 0 to 8 after confirming the bit interleaved parity-8 (BIP-8) byte of the received B3 byte. The number of errors as a result of the inspection is sent to a predetermined maintenance circuit section to analyze the performance of the transmission path. When a value of 9 to 15 is received, it is interpreted as '0'.

Far End Receive Failure (FERF) is data that occupies the lower 4 bits of G1 byte, and is an overhead for indicating the far-end reception failure state. At this time, when it is impossible to receive, it is set to '1', and the Loss of Pointer (LOP), the Alarm Indication Signal (AIS), and the Mismatch path trace ID / Signal label state, the FERF bit is activated.

The F2 byte is the overhead for the user channel and is used for user communication purposes between path devices.

The H4 byte is an overhead for displaying multiple frames. This value is ignored for the virtual box-3 (C3) signal. In the case of the scrambling unit group signal (TUG-2), hexadecimal 00, 01, 02, or 03 V4 = 11).

The Z3 byte is the overhead associated with the user channel and is allocated for user communication purposes between path devices. Also, Z4 is the spare byte, and Z5 byte is the overhead for the network operator channel and is used for maintaining the tandem connection. At this time, the Z3, Z4, and Z5 bytes are multiplexed and used to provide a connection through an external port or register.

The management unit signal forming and pointer generating unit 313 generates a management unit signal AU-3 170 based on the J1 clock (J1 Offset-T) generated from the higher virtual box signal forming unit 312, 3: VC-3D) after generating a pointer word (PW: Pointer Word) by representing the start position at which the box signal VC-3 (160) is to be positioned as a pointer value (PTR Value) To form a management unit signal (AU-3: 170).

The pointer word is inserted at the position of the H1 byte and the H2 byte, and consists of a new data indicator (NDF: New Data Flag) of 4 bits, a SS bit of 2 bits, and a Pointer Value (PV) of 10 bits.

At this time, the value of the new data indicator (NDF) is '0110' in case of normal operation. When the previous pointer value (PV) is the maximum value, the pointer value (PV) after execution is set to '0' at the time of the positive positioning, and when the previous pointer value (PV) The value (PV) is set to the maximum value. The value of the new data indicator (NDF) is changed to '1001' when the other pointer value (PV) is changed, so that it is displayed only in the first frame including the new value.

The management unit signal output unit 314 receives the parallel management unit signal (AU-3: 170) output from the management unit signal forming and pointer generating unit 313 and converts it into a serial signal of 51.84 Mbits / do.

Now, each component of the receiving unit 320 will be described in detail.

The management unit signal input unit 321 receives a predetermined 51.84 Mb / s management unit signal (AU-3: 170), converts it into 8-bit parallel data, and outputs the parallel data.

The management unit signal analyzing unit 322 detects the position of the pointer 171 in the management unit signal AU-3 170 and extracts the pointer word, analyzes the pointer value, Check for anomalies and store the results. The pointer value is used to generate a J1 clock indicating the start position of the higher virtual box signal VC-3 (160), and a clock for processing the higher virtual box signal (VC-3) according to pointer adjustment And supplies it to the high-level virtual box signal analyzing unit 323.

Specifically, the function of extracting a pointer word, the state of the pointer, the state of the alarm indication signal (AIS), the state of the pointer loss (LOP), the state of the normal (NORMAL), and the function of detecting the pointer value (PV) A frame offset extraction function of a virtual box signal, and a clock timing generation function of a high-order virtual box signal.

In this case, the rules for interpreting pointers are as follows.

1. During normal operation, the pointer points to the starting point of the higher virtual box signal (VC-3) in the management unit signal (AU-3).

2. The current pointer value (PV) change is ignored unless the new pointer value (PV) is received consecutively three times, or if it is not one of the following 3, 4, or 5 conventions.

3. If the I bit is inverted, interpret the pointer as positive and increment the pointer value (PV) by 1.

4. If the D bit is inverted, the pointer value (PV) is decremented by 1 by interpolating to the negative alignment.

5. If the new data indicator (NDF) is "1001" and the receiving side is not in pointer lost (LOP) state, replace the current value with a new pointer value (PV).

On the other hand, the alarm indication signal (AU-3 AIS) for the management unit signal is detected when the state in which the H1 byte and H2 byte are both '1' for the third consecutive times is received and the pointer loss (LOP) AIS) is detected or C2-MIS occurs 250 μs (Downward). When the new data indicator (NDF) of the received H1 byte and H2 byte is " 1001 " or a valid pointer value having a normal new data indicator (NDF) is detected three times consecutively, the alarm indication signal μs .

The pointer loss (AU-3 LOP) to the management unit signal can be detected when the pointer value outside the range of 0 to 782 is received more than 8 times in succession or when the new data indicator (NDF) is "1001" And detects it when it is received. Also, the release of the pointer loss (AU-3 LOP) to the management unit signal may result from receiving a normal pointer value for three consecutive frames or by detecting the value (0110) of a new data indicator (NDF) .

The higher virtual box signal analyzing unit 323 analyzes the higher virtual box signal VC-3 (J-1) using the parallel data received from the management unit signal analyzing unit 322 through the predetermined pointer buffer and the J1 offset clock : 160), and then processes the upper path overhead 161 and transmits the upper path overhead 161 to the hierarchy unit group signal output unit 324.

6 is a detailed block diagram of the high-level virtual box signal analyzing unit 323 and includes a high-level virtual box arranging unit 660, a high-level virtual box path overhead demultiplexing unit 610, a J1 demultiplexing unit 620, An MIS detection unit 630, a far-end reception failure detection unit 640, and a bit-based parity error detection unit 650.

The higher virtual box sorting unit 660 arranges the higher virtual box signal VC-3 using the parallel data received from the management unit signal analyzing unit 322 via the predetermined pointer buffer and the J1 offset clock J1 Offset- 160).

The high virtual box path overhead demultiplexing unit 610 multiplexes the path overhead data 161 of the high virtual box signal in the high virtual box signal (VC-3: 160) arranged and outputted from the high virtual box arranging unit 660 ).

The J1 demultiplexing unit 620 extracts J1 data received from the higher virtual box path overhead demultiplexing unit 610 in the associated time slot every predetermined period (8 KHz), and uses the 64-byte address designation signal to extract 64 bytes J1 And is formed in a format.

The C2-MIS detecting unit 630 detects C2 bytes that are not the hexadecimal number '02' three times consecutively, and when C2 bytes of the hexadecimal number '02' are received consecutively three times, 250 μs .

The far-end reception failure detecting unit 640 detects bit 5 of the G1 byte of the 10th consecutive times when it is received with a value of '1', and when detecting a pointer loss (LOP), an alarm indication signal (AIS) μs . When bit 5 of G1 byte of 10 consecutive times is '0', it receives 250 μs .

The bit trained parity error detection unit 650 detects a result of calculating the bit trained parity (BIP-8) value for the input upper virtual box signal VC-3 and the result of receiving (B3) bytes to detect and accumulate bit error parity errors, and to convert the error numbers into 4-bit codes (far-end block error: FEBE).

In one embodiment, the result of calculating the bit interleaved parity (BIP-8) value for the currently inputted higher virtual box signal VC-3 is '77' in hexadecimal and the higher virtual box path overhead demultiplexer 610) is a hexadecimal number 'B3'. In this case, if the hexadecimal number '77' and the hexadecimal number 'B3' are compared bit by bit, it can be known that an error has occurred in the 3-bit position, and if it is displayed as the number of errors, the hexadecimal number '03' can be displayed.

Overhead data such as J1, C2-MIS, far-end block error FEBE, FERF, F2, Z3, Z4, Z5 and B3 detected by the high- And sent to the main control unit (MCU) for analysis / processing.

The aligned upper virtual box signal VC-3 output from the higher virtual box sorting unit 660 is input to the higher virtual box path overhead demultiplexing unit 610 of the higher virtual box signal analyzing unit 323 And sent to the gradation unit group signal output unit 324. [

The scrambling unit group signal output unit 324 demultiplexes and outputs the seven scrambling unit group signals TUG-2 multiplexed to the higher virtual box signal VC-3.

The present invention can be used to multiplex seven metric unit group signals TUG-2 to form and transmit a management unit signal AU-3 or receive the management unit signal AU-3 to generate seven Demultiplexing unit group signal (TUG-2), and thus can be usefully used in a multiplexing / demultiplexing apparatus in an optical network unit.

Claims (4)

3 converts the control unit signal AU-3 into a control unit signal TUG-2 and a control unit signal AU-3 in a predetermined optical network unit using the synchronous transmission method, -2), comprising: A gradation unit group signal input unit for receiving a predetermined number of gradation unit group signals TUG-2 in series, selecting a predetermined number of gradation unit group signals TUG-2, multiplexing them and outputting them as parallel data of a predetermined number of bits, ; The high level virtual box signal VC-3 is formed by inserting a predetermined high path overhead into the parallel data outputted from the hierarchy unit group signal input unit, and then outputs the high level virtual box signal VC-3 and the J1 offset clock A high virtual box signal forming unit; A pointer word of a higher virtual box VC-3 is generated based on the J1 offset clock, inserted into the higher virtual box signal VC-3 output from the higher virtual box signal forming unit, A management unit signal forming and pointer generating unit for forming the unit signal AU-3; And a management unit signal output unit for receiving the parallel management unit signal AU-3 output from the management unit signal forming and pointer generating unit, converting the parallel management unit signal into a serial management unit signal AU-3, and outputting the serial management unit signal AU-3; And A management unit signal input unit for receiving a predetermined management unit signal (AU-3), converting it into 8-bit parallel data, and outputting the converted 8-bit parallel data; Extracts and interprets the pointer word in the parallel management unit signal output from the management unit signal input unit to check whether there is an abnormality in the management unit signal and generates a J1 offset clock indicating the start position of the higher virtual box signal VC-3 Management unit signal analysis unit; A higher virtual box signal analyzer for sorting and outputting the higher virtual box signal VC-3 using the J1 offset clock and processing the path overhead of the higher virtual box signal VC-3; And And a demodulation unit group signal output unit for demultiplexing and outputting the demodulation unit group signal TUG-2 multiplexed on the higher virtual box signal VC-3 output from the higher virtual box signal analyzing unit. Multiplexing and demultiplexing unit between the scrambling unit group signal and the management unit signal in the optical network terminal. The apparatus according to claim 1, wherein the gradation unit group signal input unit receives a predetermined number of gradation unit group signals (TUG-2) in series and outputs seven gradation unit group signals (TUG-2) A gradation unit group signal selection unit for outputting the gradation unit group signal through seven data lines, respectively; And And a multiplexing and serial / parallel converting unit for multiplexing the seven scrambling unit group signals (TUG-2) received from the scrambling unit group signal selecting unit 7: 1 into a parallel signal and outputting the signal as predetermined parallel data Wherein the demultiplexing unit demultiplexes the demultiplexed signal into demultiplexed signals. The apparatus of claim 1, wherein the higher virtual box signal forming unit comprises: a path overhead processing unit for receiving predetermined upper path overhead data, multiplexing and outputting the upper path overhead data; The high level virtual box signal VC-3 is constructed by inserting the high level path overhead outputted from the path overhead processing unit into the parallel data outputted from the hierarchy level group signal input unit, And a higher virtual box path overhead multiplexer for outputting the corresponding J1 offset clock; And And a bit orthogonal parity generator for generating a B3 byte for the higher virtual box signal VC-3 output immediately before the higher virtual box path overhead multiplexer and outputting the B3 byte to the path overhead processor. Multiplexing and demultiplexing unit between the scrambling unit group signal and the management unit signal in the optical network unit. The apparatus of claim 1, wherein the higher virtual box signal analyzing unit comprises: a higher virtual box sorting unit for aligning the higher virtual box signals (VC-3) included in the parallel data output from the management unit signal analyzing unit; A higher virtual box path overhead demultiplexer for demultiplexing and outputting a higher virtual box path overhead in the higher virtual box signal (VC-3) output from the higher virtual box arranging unit; A J1 demultiplexer for receiving J1 data from the higher virtual box path overhead demultiplexer and extracting the J1 data from the associated time slot every predetermined period to form a J1 format of a predetermined number of bytes; A C2-MIS detecting unit for detecting C2 bytes received from the high virtual box path overhead demultiplexing unit according to a predetermined rule and detecting or releasing a C2-MIS (Mismatch path trace ID / signal label); A far-end reception failure detector for detecting or releasing a Far End Receive Failure (FERF) by inspecting a G1 byte received from the higher virtual box path overhead demultiplexer according to a predetermined rule; And Detects and accumulates bit error parity (BIP-8) error according to a predetermined rule on the high-order virtual box signal (VC-3) input from the high-order virtual box arrangement unit, and performs a function of 4-bit error number coding And a bit parity error detection unit for detecting a bit error rate in the optical transmission system.