KR100278606B1 - Thin film transistor - Google Patents

Abstract

The present invention relates to a thin film transistor, and in the present invention, the length of the contact reinforcement layer in electrical contact with the source / drain electrodes extends to the channel region as well as the highly doped region of the polysilicon layer. In another embodiment, the length of the contact reinforcement layer is extended to, for example, a lightly doped region.

In each of these cases, the electrons flowing from the source electrode to the drain electrode can be provided with a widely distributed movement path by the extended contact reinforcement layer, so that the hot carriers do not intensively damage any part of the thin film transistor. I can't. As a result, the thin film transistor adopting the present invention can attain various effects inherent in polysilicon, while minimizing damage caused by hot carriers.

Description

Thin film transistor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor used in an electronic device such as a liquid crystal display device. More particularly, the length of a contact buffer layer may be, for example, a channel region or a low concentration doping region of a polycrystalline silicon layer. The present invention relates to a thin film transistor which extends and extends the structure to thereby secure a wide movement path of the electrons, thereby preventing a problem in which hot carriers are concentrated in a specific portion.

Recently, with the development of new advanced imaging devices such as high definition TVs, the demand for flat panel displays is rapidly expanding.

The liquid crystal display is one of the representative devices of the flat panel display, and does not cause problems such as low power and high speed, which are not solved by electroluminescence display (ELD), vacuum fluorescence display (VFD), and plasma display panel (PDP). In recent years, the use area has spread significantly.

The liquid crystal display is divided into two types, a passive type and an active type. Among the active liquid crystal display devices, each pixel is controlled by an active element such as a thin film transistor, and in terms of speed, viewing angle, and contrast, Since it is much superior to the passive liquid crystal display device, it has been widely spotlighted as a flat panel display suitable for high-definition TV or the like requiring a resolution of 1 million pixels or more.

Recently, as the importance of a thin film transistor used as an active element of a liquid crystal display device has been greatly highlighted, research and development has been further intensified, and in particular, studies to employ polysilicon in a thin film transistor have been conducted in various ways. The reason for this is that polysilicon exhibits about 100 times better characteristics in terms of mobility than conventional amorphous silicon.

Due to such excellent mobility characteristics of polysilicon, the thin film transistor employing polysilicon may not only play a role as a switching element but also have a built-in driving circuit such as an inverter.

The general structure of such a thin film transistor employing polysilicon is described, for example, in U.S. Patent No. 5780326, "Fully planarized thin film transistor and process to fabricate same", U.S. Patent Publication 5705424 "Process of fabricating active matrix pixel electrode", U.S. Patent No. 5583366 "Active matrix pannel", U.S. Patent No. 5499124 "Insulating layer in contact with liquid crystal material. Polysilicon transistors formed on an insulation layer which is adjacent to a liquid crystal material US Patent No. 5393682 "Method for making tapered poly profile for TFT device manufacturing ", and the like.

However, there are some serious problems with the conventional thin film transistor employing polysilicon.

Generally, polysilicon has superior mobility compared to amorphous silicon, but its performance is relatively inferior to that of single crystal silicon.

For example, since there is a grain boundary trap in polysilicon which does not exist in single crystal silicon, it is very difficult to ensure smooth movement of the electron, for example, and a high driving voltage must be applied to secure it. There is this.

As such, when the electrons accelerated by the electric field in the channel direction are tunneled through the pinch off region in the state where a high driving voltage is applied, each of the electrons is formed in the gate insulating layer / polysilicon layer. Strong collisions with the cross section of the interface or source / drain electrodes result in what is called an "Impact ionization appearance", which in turn creates unnecessary hot carriers.

At this time, the generated hot carriers form a so-called "Dangling bond" in the channel, which acts as a cause of reducing the mobility of the electrons moving from the source electrode to the drain electrode.

In addition, the hot carriers form a trap region at the interface of the gate insulating layer / polysilicon layer and forcibly trapping moving electrons, thereby causing an extreme deterioration in the switching function of the thin film transistor.

Accordingly, an object of the present invention is to reduce the damage of the thin film transistor by the hot carrier while maintaining the advantages of polysilicon.

It is another object of the present invention to inhibit the formation of hot carriers so as to block "dening bond bond", "formation of trap region", and the like in advance.

Still another object of the present invention is to improve the overall thin film transistor's function, for example, switching function, by reducing the influence of hot carriers.

Still other objects of the present invention will become more apparent from the following detailed description and the accompanying drawings.

1 is an exemplary view showing the shape of a thin film transistor according to a first embodiment of the present invention.

2 is a cross-sectional view of main parts of FIG. 1.

Figure 3 is an illustration showing the shape of a thin film transistor according to a second embodiment of the present invention.

4 is a sectional view of the main parts of FIG. 3;

5 is an exemplary view showing the shape of a thin film transistor according to a third embodiment of the present invention.

In order to achieve the above object, in the present invention, the length of the contact reinforcement layer in electrical contact with the source / drain electrodes is extended to the channel region as well as the highly doped region of the polysilicon layer. In another embodiment, the length of the contact reinforcement layer may be extended to, for example, a lightly doped region.

In each of these cases, the electrons flowing from the source electrode to the drain electrode can be provided with a widely distributed movement path by the extended contact reinforcement layer, so that the hot carriers do not intensively damage any part of the thin film transistor. I can't. As a result, the thin film transistor employing the present invention can obtain various effects inherent in polysilicon and can be kept to a minimum due to hot carrier damage. At this time, the formation thickness of the contact reinforcement layer is preferably maintained at 500 kPa to 3000 kPa, for example.

In still another embodiment of the present invention, an offset structure is formed at the ends of the contact reinforcement layers. In this case, the electric field of the channel region is greatly weakened by the formation of the offset structure, whereby the acceleration force of the electron is reduced to a certain level, and eventually, the generation of hot carriers is significantly suppressed. Through this structure, when the generation of hot carriers is suppressed, "formation of the dangling bond", "formation of the trap region", and the like are blocked in advance, and the function of the thin film transistor employing the present invention can be significantly improved.

Hereinafter, a thin film transistor according to the present invention will be described in detail with reference to the accompanying drawings.

As shown in Figure 1 and 2, in the thin film transistor 100 according to an embodiment of the present invention, for example, the conductive material is formed on the upper portion of the substrate 1 made of a transparent glass at regular intervals, for example, a conductive material Contact reinforcement layers 35 and 36 are formed. These contact reinforcement layers 35 and 36 are in electrical contact with source / drain electrodes 3 and 4 described later.

In this case, the polysilicon layer 30 is formed on the substrate 1 to cover the above-described contact reinforcement layers 35 and 36. The polysilicon layers 35 and 36 are, for example, a pair separated from each other. And the channel region 6 interposed between the heavily doped regions 31 and 32 and the heavily doped regions 31 and 42.

Here, a pair of low concentration doping regions 33 and 34 may be further formed adjacent to the high concentration doping regions 31 and 32 in contact with the high concentration doping regions 31 and 32. In this case, the thin film transistor 100 of the present invention has a so-called "lightly doped drain" structure, and thus may have a side effect of preventing the generation of hot carriers to some extent.

Of course, the formation of such low concentration doped regions 33 and 34 is not an essential component of an embodiment of the present invention. The present invention can obtain a unique 'effect of avoiding damage by hot carriers' without forming such low concentration doped regions 33 and 34.

On the other hand, for example, a gate electrode 2 is formed on the channel region 6 of the polysilicon layer 30, and the gate electrode 2 is electrically connected to an external circuit block through a gate line (not shown). As a result, the external gate signal can be quickly input.

In this case, a gate insulating layer 5 is formed between the polysilicon layer 30 and the gate electrode 2, and the polysilicon layer 30 and the gate electrode 2 are not energized with each other. It serves to prevent. Here, an interlayer insulating layer 7 is formed on the gate electrode 2 to cover the gate electrode 2.

On the other hand, the source electrode 3 is formed on the upper portion of the interlayer insulating layer 7, and the source electrode 3 is formed of the interlayer insulating layer 7, the gate insulating layer 5, and the polysilicon layer 30. Is in electrical contact with any one of the contact reinforcement layers 35, 36, for example, the left contact reinforcement layer 35 in a continuous penetrating state. The source electrode 3 is electrically connected to an external circuit block through a data line (not shown), so that an external data signal can be promptly input.

At this time, the source electrode 3 transmits an external data signal to the drain electrode 4 to be described later through the channel region 6 of the polysilicon layer 30. For this purpose, the source electrode 3 is basically a poly It must be in electrical contact with the silicon layer 30.

Here, the left contact reinforcement layer 35 of the conductive material is in electrical contact with the polysilicon layer 30 and also with the source electrode 3, so that the data signal flowing through the source electrode 3 is transferred to the polysilicon layer 30. It can be quickly delivered to the drain electrode 4 via the channel region (6) of. The left contact reinforcement layer 35 transmits a data signal flowing through the source electrode 3 to the polysilicon layer 30 while maintaining a stable contact state with the source electrode 3, thereby providing electric power to the source electrode 3. It serves to reinforce the robust contact stability.

On the other hand, the drain electrode 4 is exposed and formed on the other upper portion of the interlayer insulating layer 7, and the drain electrode 4 has a shape similar to that of the source electrode 3 described above, and the interlayer insulating layer 7 and the gate. The other one of the contact reinforcement layers 35 and 36, for example, the right contact reinforcement layer 36, is in electrical contact with the insulating layer 5 and the polysilicon layer 30 continuously.

In this case, when the source electrode 3 transmits an external data signal through the channel region 6 of the polysilicon layer 30, the drain electrode 4 transfers the data signal to the pixel electrode 9 which will be described later. For this purpose, the drain electrode 4 should basically be in electrical contact with the polysilicon layer 30.

Here, the right contact reinforcement layer 36 of the conductive material is in electrical contact with the polysilicon layer 30 and also in contact with the drain electrode 4. In this case, when the data signal flowing through the source electrode 3 is transmitted through the channel region 6 of the polysilicon layer 30, the right contact reinforcement layer 30 may be rapidly delivered to the drain electrode 4. . At this time, the right contact reinforcement layer 36 rapidly transfers a data signal flowing through the polysilicon layer 30 to the drain electrode 4 while maintaining a stable contact state with the drain electrode 4, thereby preventing the drain electrode 4. It serves to strengthen the electrical contact stability more firmly.

An interlayer insulating layer 8 is formed on the interlayer insulating layer 7 including the source electrode 3 and the drain electrode 4, and a part of the interlayer insulating layer 8, for example, the drain electrode 4. The upper layer of is opened by the formation of a via hall. The pixel electrode 9 is coated on the via hole to form a structure in electrical contact with the drain electrode 4.

At this time, when the gate electrode 2 depletes the channel region 6 of the polysilicon layer 30 through the gate signal, the data signal input through the source electrode 3 is left contact reinforcement layer 35. After passing through the depleted channel region 6 via the via, it is successively transferred to the right contact reinforcement layer 36 and the drain electrode 4, and finally reaches the pixel electrode 9. Of course, the transmission of this data signal is performed by the electrons inside the polysilicon layer 30, which are accelerated by an electric field applied to the channel region 6 of the polysilicon layer 30, and the drain electrode 4. By moving quickly in the direction, the data signal transmitted from the source electrode 3 can be transmitted to the drain electrode 4 quickly.

In the present invention having such a structure, at least one of each of the contact reinforcement layers 35 and 36 is formed under the heavily doped regions 31 and 32 and the lightly doped regions 33 and 34 of the polysilicon layer 30. It extends through the surface to the lower surface of the channel region 6. Of course, both of the contact reinforcement layers 35 and 36 pass through the bottom surface of the heavily doped regions 31 and 32 and the lightly doped regions 33 and 24 of the polysilicon layer 30. It may extend to the lower surface of the. 1 and 2 illustrate a case in which both of the contact reinforcement layers 35 and 36 are extended.

This is a part which constitutes the gist of the present invention, and, of course, its part is very different from the conventional one.

When the present invention achieves this configuration, for example, the electrons moved from the source electrode 3 to the drain electrode 4 through the channel region 6 of the polysilicon layer 30 are extended and extended contact reinforcement layers 35. 36, it is possible to receive a more widely secured movement route. Accordingly, the accelerated electrons may extend not only the interface of the gate insulating layer 5 / polysilicon layer 30 or the cross section of the source / drain electrodes 3 and 4, but also the extended and enlarged contact reinforcement layers 35 and 36. It can be secured by the movement path of, and, consequently, does not cause a problem of intensively colliding only at an interface of a specific part, for example, the gate insulating layer 5 / polysilicon layer 30.

As a result, the thin film transistor 100 employing the present invention can secure a wide movement path of the electrons as described above, whereby the accelerated electrons generate unnecessary hot carriers by the impact ionization phenomenon. Even if the damage caused by it can be minimized.

As a result, the thin film transistor 100 employing the present invention can obtain various effects inherent in polysilicon and minimize damage caused by hot carriers.

At this time, preferably, the thickness of the contact reinforcement layers is maintained at 500 ~ 3000Å.

Meanwhile, end portions of the contact reinforcement layers 35 and 36 in contact with the channel region 6 form an offset structure.

For example, as presented in the Korean Semiconductor Society Conference (February 1998. P28) "Development of Stagger Structure Thin Film Transistor for Simplifying Process of Low Temperature Poly-Si TFT", the conventional offset structure is designed to reduce the electric field applied to the channel region of the polysilicon layer. The present invention employs this principle to form an offset structure inclined at, for example, about 20 ° at the ends of the contact reinforcement layers 35 and 36 in contact with the channel region 6, so that the polysilicon layer ( The weakening of the electric field across the channel region 6 in 30 is induced.

When the weakening of the electric field applied to the channel region 6 of the polysilicon layer 30 is thus achieved, the acceleration force of the electrons flowing through the channel region 6 is greatly reduced, resulting in the generation of hot carriers by impact ionization of the electrons. Is significantly suppressed.

With this invention, when the production of hot carriers is suppressed, the formation of the above-mentioned "dening ring" can also be suppressed, for example, the mobility of the electrons moving from the source electrode 3 to the drain electrode 4 is normal. Can be maintained.

In addition, through the present invention, when the generation of hot carriers is suppressed, for example, formation of a trap area formed at the interface of the gate insulating layer 5 / polysilicon layer 30 can also be suppressed, and eventually, the force of the electrons is suppressed. The trapping phenomenon can be prevented in advance.

Through this achievement of the present invention, for example, the switching function of the thin film transistor can be significantly improved.

3 and 4, according to another embodiment of the present invention, at least one of the contact reinforcement layers 45 and 46 passes through a lower surface of the high concentration doped regions 41 and 42. It extends to the lower surface of the doped regions 43 and 44. In this case, the channel region 6 of the polysilicon layer 40 is excluded on the extension line of the contact reinforcement layers 45 and 46. Of course, both contact reinforcement layers 45 and 46 may extend to the lower surfaces of the lightly doped regions 43 and 44 via the lower surfaces of the heavily doped regions 41 and 42. 3 and 4 illustrate a case in which both of the contact reinforcement layers 45 and 46 are extended and enlarged.

Even when the present invention achieves such a configuration, for example, the electrons moved from the source electrode 3 to the drain electrode 4 through the channel region 6 of the polysilicon layer 30 are extended and extended contact reinforcement layers ( 45, 46) can be provided a more widely secured movement path.

Accordingly, the accelerated electrons can extend, for example, the interface of the gate insulating layer 5 / polysilicon layer 40 or the cross section of the source / drain electrodes 3, 4, as well as the extended and enlarged contact reinforcement layers 45, 46. Even it can be secured by its own movement path, and thus, it does not cause a problem of intensively colliding only at an interface of a specific part, for example, the gate insulating layer 5 / polysilicon layer 40.

As a result, the thin film transistor 200 employing another embodiment of the present invention can secure a wide movement path of the electrons as described above, so that the accelerated electrons generate unnecessary hot carriers by the impact ionization phenomenon. Even if the damage caused by it can be minimized.

As a result, the thin film transistor 200 employing another embodiment of the present invention can attain various effects inherent in polysilicon and keep the damage caused by the hot carrier to a minimum.

On the other hand, as in the case described above, in the other embodiment of the present invention, the end portions of the contact reinforcement layers 45 and 46 in contact with the lightly doped regions 43 and 44 form an offset structure to the polysilicon layer 40. Induces weakening of the electric field.

When the weakening of the electric field applied to the polysilicon layer 40 is thus achieved, as described above, the acceleration force of the electrons flowing through the channel region 6 is greatly reduced, and eventually, the generation of hot carriers by impact ionization of the electrons Significantly suppressed.

Through this alternative embodiment of the present invention, if the production of hot carriers is suppressed, the formation of the "dangling bonds" described above can also be suppressed, and eventually, of the electrons moving from the source electrode 3 to the drain electrode 4. Mobility can remain normal.

In addition, through the embodiment of the present invention, if the generation of hot carriers is suppressed, for example, the formation of the trap area formed at the interface of the gate insulating layer 5 / polysilicon layer 40 can also be suppressed, and eventually Forced trapping of the electrons can be prevented in advance.

Meanwhile, as shown in FIG. 5, in another embodiment of the present invention, unlike the other embodiments described above, both of the contact reinforcement layers 55 and 56 do not extend and the drain electrode 4 among them is extended. ) Only the right contact reinforcement layer 56 extends through the bottom surface of the heavily doped region 52 to the bottom surface of the lightly doped region 54. In this case, no structural change is applied to the left contact reinforcement layer 55 in contact with the source electrode 3.

As described above, the electrons are accelerated by an electric field applied to the channel region 6 of the polysilicon layer 50 to move quickly from the source electrode 3 to the drain electrode 4, resulting in the impact of the electrons. Hot carriers generated by ionization mainly have a lot of adverse effects on the drain electrode 4 side.

In another embodiment of the present invention, in consideration of this point in advance, as described above, the left contact reinforcing layer 55 in contact with the source electrode 3 does not have any structural change, but instead contacts the drain electrode 4. The right contact reinforcing layer 56 is subjected to a certain structural change so that the right contact reinforcing layer 56 extends through the lower surface of the highly doped region 52 to the lower surface of the lightly doped region 54.

According to the present invention, the electrons moved from the source electrode 3 to the drain electrode 4 through the channel region 6 of the polysilicon layer 50 are extended to the right of the drain electrode 4. The contact reinforcement layer 56 may be provided with a more widely secured movement path.

Accordingly, the accelerated electrons move not only at the interface of the gate insulating layer 5 / polysilicon layer 50 or at the cross section of the source / drain electrodes 3 and 4, but also to the extended and enlarged right contact reinforcement layer 56. It can be secured by a path, and thus does not cause a problem of intensively colliding only at an interface of a specific portion, for example, the gate insulating layer 5 / polysilicon layer 50.

As a result, the thin film transistor 300 employing another embodiment of the present invention can secure a wide movement path of the electrons, as in each of the above-described embodiments, so that the accelerated electrons are unnecessarily hot due to the impact ionization phenomenon. Even generating carriers can minimize the damage caused by it.

As a result, the thin film transistor 300 employing another embodiment of the present invention can obtain various effects inherent in polysilicon and minimize damage caused by hot carriers.

On the other hand, as in each of the embodiments described above, in another embodiment of the present invention, the end portion of the right contact reinforcing layer 56 in contact with the low concentration doped region 54 forms an offset structure, which is applied to the polysilicon layer 50. Induces weakening of the electric field.

When the weakening of the electric field applied to the polysilicon layer 50 is achieved, as described above, the acceleration force of the electrons flowing through the channel region 6 is greatly reduced, and as a result, the generation of hot carriers by impact ionization of the electrons Significantly suppressed.

As described above, in the present invention, the length of the contact reinforcement layer is extended to, for example, the channel region or the lightly doped region of the polysilicon layer, thereby securing a wide movement path of the electrons, thereby generating hot carriers. Problems that are concentrated on the part can be prevented in advance.

The present invention has an overall useful effect in various types of thin film transistors manufactured in production lines.

And while certain embodiments of the invention have been described and illustrated, it will be apparent that the invention may be embodied in various modifications by those skilled in the art.

Such modified embodiments should not be understood individually from the technical spirit or point of view of the present invention and such modified embodiments should fall within the scope of the appended claims of the present invention.

As described in detail above, in the thin film transistor according to the present invention, the length of the contact reinforcement layer in electrical contact with the source / drain electrodes extends to the channel region as well as the highly doped region of the polysilicon layer. In another embodiment, the length of the contact reinforcement layer is extended to, for example, a lightly doped region.

In each of these cases, the electrons flowing from the source electrode to the drain electrode can be provided with a widely distributed movement path by the extended contact reinforcement layer, so that the hot carriers do not intensively damage any part of the thin film transistor. I can't. As a result, the thin film transistor adopting the present invention can attain various effects inherent in polysilicon, while minimizing damage caused by hot carriers.

Claims (7)

A substrate; A pair of contact reinforcement layers divided on said substrate; A polysilicon layer formed on the substrate to cover the contact reinforcement layers, the pair of high concentration doped regions separated from each other, and a channel region interposed between the high concentration doped regions; A gate insulating layer formed on the polysilicon layer; A gate electrode formed on the gate insulating layer; An interlayer insulating layer formed on the gate insulating layer to cover the gate electrode; A source electrode exposed over the interlayer insulating layer, the source electrode being in electrical contact with any one of the contact reinforcing layers in a state of continuously passing through the interlayer insulating layer, the gate insulating layer, and the polysilicon layer; A drain electrode exposed to the other upper portion of the interlayer insulating layer, the drain electrode being in electrical contact with any other of the contact reinforcement layers in a continuous passage through the interlayer insulating layer, the gate insulating layer, and the polysilicon layer; At least one of the contact reinforcement layers extends through the bottom surface of the heavily doped region to the bottom surface of the channel region. 2. The thin film transistor of claim 1, wherein low concentration doped regions are further formed between the high concentration doped regions and the channel region. The thin film transistor of claim 1, wherein an end of the contact reinforcement layers in contact with the channel region forms an offset structure. The thin film transistor according to claim 1, wherein the contact reinforcement layers have a thickness of 500 mV to 3000 mV. Substrate: A pair of contact reinforcement layers divided on said substrate; A pair of high concentration doping regions formed on the substrate to cover the contact reinforcement layers and separated from each other, a pair of low concentration doping regions separated from each other in contact with the high concentration doping regions, and the low concentration doping regions A polysilicon layer comprising a channel region interposed therebetween; A gate insulating layer formed on the polysilicon layer; A gate electrode formed on the gate insulating layer; An interlayer insulating layer formed on the gate insulating layer to cover the gate electrode; A source electrode exposed over the interlayer insulating layer, the source electrode being in electrical contact with any one of the contact reinforcing layers in a state of continuously passing through the interlayer insulating layer, the gate insulating layer, and the polysilicon layer; A gate electrode exposed to the other upper portion of the interlayer insulating layer, the gate electrode being in electrical contact with any other of the contact reinforcement layers while continuously passing through the interlayer insulating layer, the gate insulating layer, and the polysilicon layer, At least one of the contact reinforcement layers extends through a lower surface of the heavily doped region to a lower surface of the low concentration doped region. 6. The thin film transistor of claim 5, wherein ends of the contact reinforcement layers in contact with the lightly doped region form an offset structure. 6. The thin film transistor of claim 5, wherein the contact reinforcement layer extending through the bottom surface of the heavily doped region to the bottom surface of the low concentration doped region is a contact reinforcement layer in contact with the drain electrode.