KR100277499B1 - Power supply voltage sensing circuit - Google Patents

Abstract

The present invention relates to a power supply voltage sensing circuit, and when a power supply voltage of a first level or more is applied, a start_up circuit is driven to drive a band gap circuit, and accordingly, a reference voltage is set. The voltage interrupting circuit outputs the first signal. When the power supply voltage falls below the second level lower than the first level, the voltage applied by the zener diode is limited, and the voltage below the control voltage controlling the output of the voltage interruption circuit is lower than the second voltage interruption circuit. Output the signal. However, if the power supply voltage is lower than the first level and higher than the second level, the voltage applied by the zener diode is limited, but is higher than the control voltage, so that the below voltage interrupter circuit continuously outputs the first signal. Therefore, in the present invention, in detecting a level of a power supply voltage supplied to a circuit and outputting a signal limiting the operation of the system, the operation of the system is higher than the level of the power supply voltage at the time of outputting a signal for maintaining the operation of the system. By having a hysteresis TM characteristic that the level of the power supply voltage at the time of outputting a signal for stopping the power supply is low, the circuit can be stably operated, thereby preventing malfunction of the system.

Description

Power supply voltage sensing circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply voltage sensing circuit, and more particularly, to a power supply voltage sensing circuit that enables the system to operate stably even with a temporary change in the supply voltage supplied to the system.

In general, the driving is stopped by the reference voltage generated according to the level of the power supply voltage to be driven by receiving the power supply voltage, or stops as the generation of the reference voltage is stopped.

The power supply voltage supplied to the system is a direct current power supply voltage transformed from an AC external power supply (primary power supply to a home). Therefore, the system uses a transformer to make the external supply voltage the supply voltage supplied to the system, and a capacitor is mounted on the primary side of the transformer.

At this time, a voltage (voltage supplied to the system) transmitted from the primary side to the secondary side of the transformer may not be constantly supplied to the system.

Thus, a power supply voltage sensing circuit is used to prevent the system from being damaged as the power supply voltage supplied to the system is not constant.

Thus, the power supply voltage sensing circuit detects the level of the power supply voltage supplied to the system and outputs a signal to stop or continue driving the system according to the detected voltage level.

However, the conventional power supply voltage sensing circuit exhibits an operating voltage (UVLO: Under Voltage Lock) waveform according to the level of the power supply voltage Vcc as shown in FIG. 1, thereby causing an unstable operation of the system.

1 is a waveform diagram of a signal according to level detection of a power supply voltage output from a conventional power supply voltage sensing circuit.

As shown in Fig. 1, (1) is a waveform diagram when the power supply voltage Vcc is gradually increased to be equal to or greater than the first level, and (2) the power supply voltage Vcc supplied to the circuit is temporarily decreased due to external factors. It is a figure which shows the waveform diagram when power supply voltage Vcc is below 1st voltage level.

As shown in FIG. 1, the conventional power supply voltage sensing circuit determines whether the system operates with one reference voltage.

In other words, the conventional power supply voltage sensing circuit detects whether the power supply voltage supplied to the circuit is one level, that is, the first voltage level as the reference voltage, is greater than or equal to the first voltage and then operates normally when it is greater than or equal to the first voltage. Is maintained, and outputs an output (UVLO) signal for stopping the system operation when the voltage is below the first voltage.

Therefore, conventionally, by controlling the operation of the system based on the first voltage, it is sensitively responded when the power supply voltage is varied in the positive or negative direction based on the first voltage.

That is, the conventional power supply voltage sensing circuit generates a problem that the system may malfunction by turning on or off the system in response to a change in the vicinity of the first level at which the reference voltage is set.

Therefore, the present invention allows the system to operate stably by continuously maintaining the operation of the system even if the power supply voltage changes below the system operation maintenance voltage point by changing the system operation stop voltage point and the system operation maintenance voltage point.

1 is a waveform diagram illustrating a change in a reference voltage according to a change in a power supply voltage in a conventional power supply voltage sensing circuit.

2 is a circuit diagram of a power supply voltage sensing circuit according to an embodiment of the present invention.

3 is a waveform diagram illustrating an output that changes according to a level of a power supply voltage in a power supply voltage sensing circuit according to an embodiment of the present invention.

4 is a waveform diagram simulating the change of the reference voltage according to the change of the power supply voltage in the power supply voltage sensing circuit according to the embodiment of the present invention.

The power supply voltage detection circuit of the present invention for solving the above technical problem,

And a start-up section, a bandgap reference voltage section, a system operating voltage detector, a system stop voltage detector and a temperature compensator.

The start-up part outputs a signal for driving the circuit as the input power is applied.

The bandgap reference voltage unit is driven according to the output signal of the start-up unit to generate a bandgap reference voltage.

The system operating voltage detector includes a first zener diode, the cathode of which is connected to an input power source to conduct only when the input power is above a first level, and a first resistor connected to the first zener diode to limit the input voltage.

The temperature compensator may include a first transistor having a lower potential between the base of the first transistor and an emitter as the temperature increases, and a voltage applied to the base as the temperature rises when the temperature of the first transistor is connected to the base of the first transistor to increase the temperature; It consists of a second and a third resistor which serves to increase the potential between the base and the emitter of the first transistor and a resistor located between the emitter and the ground terminal of the first transistor.

Here, it is preferable that each of the second and third resistors is connected to the base of the first transistor.

The system stop voltage detector may include second and third transistors having an emitter connected to an input power source to apply a current to a circuit, fourth and fifth transistors using a current applied from the third transistor as a base input; A second zener diode and a first diode for limiting a voltage applied to the bases of the fourth and fifth transistors, a sixth transistor for performing a switching operation according to a voltage applied from the temperature compensating unit, and a second zener diode applied from the second transistor. A seventh transistor configured to perform a switching operation according to a current so that a current applied from the second transistor is grounded or outputted to the outside, an inverter connected to the second transistor to invert a signal outputted to the outside, and an input terminal of the inverter It consists of a third zener diode for limiting the voltage input to.

Preferably, the second and third transistors are MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and one end of the third resistor and an emitter of the first transistor are connected to a base of the sixth transistor. Do. In the second zener diode, an anode is connected to an anode of the first diode, and a cathode is connected to bases of the fourth and fifth transistors. In addition, it is preferable that the gates of the second and third transistors are connected to each other.

Hereinafter will be described with reference to Figure 2 attached to an embodiment of the present invention.

2 illustrates a power supply voltage sensing circuit according to an embodiment of the present invention.

As shown in FIG. 2, a power supply voltage sensing circuit according to an embodiment of the present invention,

The start-up part 100, the bandgap reference voltage part 200, the system operation voltage detector 300, the temperature compensator 400, and the system stop voltage detector 500 are provided.

The start-up unit 100 receives the power supply voltage Vcc to generate a signal for starting the driving of the circuit, and the PMOS transistor MP1, the NMOS transistors NN1, MN2, and MN3 and the PNP bipolar transistor (Q2, Q3, Q4), NPN bipolar transistor Q5, resistors R1, R2, R3, R4, R5, R6, R20 and zener diodes ZD1, ZD2.

Here, the transistor MN1 performs a switching operation according to the power supply voltage Vcc applied through the resistor R1 to apply a current to the circuit.

The cathodes of the Zener diodes ZD1 and ZD2 connected in series are connected to the gates of the transistors MP1, and the Zener diodes ZD1 and ZD2 are applied to the gates of the transistors MN1 to clamp voltages.

The voltage flowing through the resistor R1 is expressed by Equation 1 below.

here, I _R1 Is the current flowing through the resistor R1, and Vz is the zener voltage of the zener diodes ZD1, ZD2.

The bandgap reference voltage unit 200 includes an MMOS transistor MN4, a PMOS transistor MP2 and MP3, a Zener diodes ZD6 and ZD7, and a PNP bipolar transistor Q6 and Q7 that perform a switching operation according to a power supply voltage. Q8 and NPN bipolar transistors Q9 to Q13, resistors R7 to R13, and capacitor C1.

Here, the transistors Q6 and Q7 and the transistors Q11 and Q12 each form a current mirror, and the transistors Q9 and Q10 form a Darlington circuit. Zener diodes ZD6 and ZD7 connected in series are connected in series to clamp a voltage applied to the gate of transistor MN4.

Assuming that the area ratio of the transistor Q11 and the transistor Q12 forming the widdler current mirror is N: 1, and the emitter current flowing through the transistors Q11 and Q12 is the same, the transistor Q11 is already The current I _R10 flowing through the rotor is shown in Equation 2.

In Equation 2, V _T Is the thermal voltage and N is the area ratio of the transistor Q11 to the transistor Q12.

Therefore, the band gap voltage Vband may be expressed as shown in Equation 3.

V _band = Vbe12 + 2 × R11 × I _R10

Where Vbe12 is the potential between the base of the transistor Q12 and the emitter.

Therefore, the reference voltage Vref is expressed by Equation 4.

If the partial differential of equation (4) with respect to the temperature T, it can be represented by equation (5).

here, Is -2 mV / 。C, Is about 0.085 mV / ° C.

Accordingly, as can be seen from Equation 5, by appropriately adjusting the values of the resistors R10 and R11, a constant bandgap reference voltage can be set in response to the temperature change, and accordingly, the reference voltage Vref can be kept constant.

The system operation voltage detector 300 includes a Zener diode ZD3 having a cathode connected to a power supply voltage Vcc, and a resistor R16 having one end connected to an anode of the Zener diode ZD3.

The temperature compensator 400 includes a transistor Q15, a resistor R17 connected to the base of the transistor Q15, a resistor R18 connected to the base of the resistor R17 and the transistor Q15, and a transistor Q15. It consists of a resistor (R19) connected between the emitter and ground terminal.

The system stop voltage detector 500 includes an emitter connected to the power supply voltage Vcc, a base connected to the drain of the transistor MP4, and a drain connected to the other end of the resistor R16 and one end of the resistor R17. A transistor Q16, a PNP bipolar transistor Q17 and an transistor connected to a power supply voltage Vcc and a base connected to a drain of the transistor MP4 to form a current mirror together with the transistor Q16, and a transistor Q16. Zener diode ZD4 having a cathode connected to the base of Q17, a diode D1 having an anode connected to the anode of the zener diode ZD4, and a collector connected to the cathode of the diode D1, and the other of the resistor R18 is connected. NPN bipolar transistor Q18 having a base connected to one end of the resistor R19 and the emitter grounded, a collector connected to the drain of transistor MP5, a base connected to a collector of transistor Q17, and an emitter end An inverter (INV) having an grounded NPN bipolar transistor (Q19) and a set bandgap reference voltage (Vref) as a driving power source, an input terminal connected to drains and collectors of the transistors MP5 and Q19, and an output terminal connected to the system. And a Zener diode ZD5 having a cathode connected to the input terminal of the inverter INV and an anode grounded.

The operation of the embodiment of the present invention configured as described above will be described with reference to Figs.

When power is applied to the power supply voltage Vcc, the power supply voltage Vcc is applied to the gate of the transistor MN1 through the resistor R1 of the start-up unit 100. Here, the current applied to the gate of the transistor MN1 is expressed by Equation 1 below.

The voltage applied to the gate of the transistor MN1 is clamped by the zener diodes ZD1 and ZD2 so as not to rise above the zener voltage.

When the voltage Vcc-2Vz applied to the gate of the transistor MN1 becomes greater than or equal to the threshold voltage, the transistor MN1 is turned on and a current flows through the resistors R3 and R4.

Among the currents flowing through the resistors R3 and R4, the current flowing through the resistor R4 flows through the transistors Q3 and Q4 and the resistor R20, and the current flowing through the resistor R3 is caused by the off state of the transistor Q5. When the collector potential of the transistor Q2 is raised to exceed the threshold voltage of the transistor MN3, the transistor MN3 is turned on and applied to the bases of the transistors Q11 and Q12.

Transistor Q4 is to prevent the base voltage loss of the current mirror.

When the transistor MN3 is turned on, a current applied through the transistor MP1 flows to the source of the transistor MN3 and is applied to the bases of the transistors Q11 and Q12 of the bandgap reference voltage part 200.

The transistors Q11 and Q12 are then turned on. At this time, the current flowing through the transistor Q11 is expressed by Equation 2.

As transistors Q11 and Q12 are turned on, transistor Q8 is turned on and transistors Q6 and Q7 are also turned off.

When the transistor Q8 is turned on, the transistor Q8 is applied with a current applied from the transistor MN4 to the resistors R10 and R11 via the resistor R7 and the transistor Q6.

When the transistor Q12 is turned on, the current applied from the transistor MN4 is applied to the resistor R11 through the resistor R8 and the transistor Q7.

The transistors Q9 and Q10 are Darlington circuits, which form a feedback loop to adjust the gate potential of the transistor MN4 to adjust the current of the transistor MN4.

Through the above operation, the current flowing through the emitter of the transistor Q11 can be obtained as shown in Equation 2, and thus Equations 3, 4, and 5 can be obtained.

Accordingly, it can be seen from Equations 3 to 5 that the bandgap reference voltage is set.

As the bandgap reference voltage Vref is set, the reference voltage Vref is applied to the system operation voltage detector 300.

The reference voltage Vref is applied with a voltage to the source of the transistor MP3 and a voltage is applied from the base of the transistor Q14 through the resistor R14.

The voltage applied to the base of the transistor Q14 is applied to the resistor R6 of the start-up unit 100 and becomes the base input of the transistor Q5. The transistor Q5 is turned on according to the voltage applied from the transistor Q14 to be applied, and thus the start-up unit 100 finishes the operation.

Meanwhile, the transistor Q1 is turned on by the voltage between the resistor R14 and the collector of the transistor Q14 and grounds the current applied through the transistor MN2 to the ground terminal.

Here, as the reference voltage Vref is set by the bandgap reference voltage unit 200, the inverter INV of the system stop voltage detector 500 starts driving with the reference voltage Vref as the operating power source.

At this time, the output of the inverter INV varies depending on whether or not the current supplied from the transistor MP5 is input.

Here, the inverter INV is determined by the operation of the transistor Q19 whether or not the current is applied, and the operation of the transistor Q19 is determined by the operation of the transistor Q17.

The transistor Q17 is determined according to the operation of the transistor Q18 and the zener diode ZD4 and the diode D1, and the transistor Q18 is applied to the emitter of the transistor Q15 of the system operating voltage detector 300. It depends on the current flowing through it.

The operation of the transistor Q15 is determined according to the level of the power supply voltage Vcc applied to the cathode of the zener diode ZD3.

As a result, the output of the inverter INV is determined by the system operation voltage detector 300 and the system stop voltage detector 500.

Hereinafter, the operation of the temperature compensator 400 together with the system operation voltage detector 300 and the system stop voltage detector 500 will be described.

The system operation voltage detector 300 inputs the circuit only when the power supply voltage Vcc is equal to or greater than the zener voltage using the zener diode ZD3.

When the power supply voltage is equal to or greater than the zener voltage of the zener diode ZD3, the power supply voltage Vcc flows through the zener diode ZD3 to the resistor R16. The voltage passing through the resistor R16 is applied to the temperature compensator 400.

The resistors R18 and R19 of the temperature compensator 400 turn on the transistor Q15 by dividing an applied voltage and applying the voltage to the base of the transistor Q15, thereby applying the voltage from the system operating voltage detector 300. The voltage flows to the emitter of transistor Q15. Here, the resistors R17 and R18 are used to prevent abnormal operation because the potential between the collector and the emitter of the transistor Q15 is lowered when the temperature in the circuit rises, and the resistance value increases as the temperature increases. The base voltage of Q15) is increased so that the voltage flowing to the emitter of transistor Q15 is not affected by temperature.

Meanwhile, the current applied to the emitter of the transistor Q15 is grounded through the resistor R19, and the contact voltage of the emitter of the transistor Q15 and the resistor R19 is the transistor Q18 of the system stop voltage detector 500. Is applied to the base.

At this time, when the power supply voltage Vcc is equal to or greater than the voltage Vcc (H) shown in Equation 6, the transistor Q18 is turned on, and this voltage Vcc (H) becomes a first reference voltage for intermittent system.

Vcc (H) = Vzd3 + I × R16 + Vd + Vbe18

Here, Vzd3 is the zener voltage of the zener diode ZD3, Vbe18 is the voltage between the base of the transistor Q18 and the emitter, and Vd is the voltage of the contact between the resistors R17 and R18.

On the other hand, the transistor Q18 is turned on by the applied voltage to draw current applied to the base of the transistors Q16 and Q17 through the transistor MP4 to the ground terminal. Accordingly, transistors Q16 and Q17 are turned on, and transistor Q19 is turned on.

Here, the threshold voltages of the zener diodes ZD4 and D1 are set to a lower voltage than the first reference voltage Vcc (H), and thus, the power supply voltage Vcc and the first reference voltage are larger than the threshold voltages of the first reference voltage Vcc (H). Therefore, the zener diode ZD4 and the diode D1 are conducted.

As the transistor Q19 is turned on, the current supplied from the drain of the transistor MP5 flows to the ground terminal instead of being applied to the inverter INV.

As a result, the inverter INV outputs a high level signal as shown in (1) of FIG. 3 when the power supply voltage Vcc becomes equal to or greater than the first reference voltage Vcc (H). In other words, the inverter INV of the system stop voltage detector 500 outputs a high level signal.

3 is a waveform diagram illustrating an output that changes according to a level of a power supply voltage in a power supply voltage sensing circuit according to an embodiment of the present invention.

In FIG. 3, the horizontal axis represents the level of the power supply voltage Vcc supplied to the present invention, and the vertical axis represents the output level UVLO to the inverter INV of the system stop voltage detector 500.

(1) shows the value of UVLO when the level of the power supply voltage Vcc increases, and (2) shows the value of UVLO when the power supply voltage Vcc decreases.

As such, the output of the high level signal by the system stop voltage detector 500 means that the operation of the system is maintained.

However, when the power supply voltage Vcc, which is greater than or equal to the first reference voltage Vcc (H), is gradually dropped by an unstable power supply operation of the system, the present invention operates as follows.

Zener diode ZD3 prevents the power supply voltage Vcc from being applied to the circuit as the power supply voltage Vcc applied is lower than the first reference voltage Vcc (H). As a result, no current flows through the resistor R16.

However, transistor Q15 continues to be turned on by the current applied from the collector of transistor Q16, and thus transistor Q18 is also turned on.

Thus, the transistors Q16 and Q17 also continue to be turned on, and eventually the output of the inverter INV is still high.

However, when the power supply voltage Vcc gradually falls further to a predetermined voltage, that is, a voltage that turns off the transistors Q16 and Q17, the inverter INV inverts the output signal.

Here, the voltage for turning off the transistors Q16 and Q17 is the second reference voltage Vcc (L) as shown in Equation 7 below.

Vcc (L) = Vce18 (sat) + Vzd4 + Vd1

Here, Vce18 (sat) is a voltage between the collector and the emitter when operating in the saturation state of the transistor Q18, Vzd4 is the Zener voltage of the zener diode zd4, and Vd1 is the voltage of the diode d1.

The second reference voltage Vcc (L) has a voltage level lower than the first reference voltage Vcc (H) as shown in FIGS. 3 and 4.

As such, in order for the second reference voltage Vcc (L) to be lower than the first reference voltage Vcc (H), the zener voltage of the zener diode ZD4 must be lower than the zener diode ZD3.

4 is a waveform diagram simulating the change of the reference voltage according to the change of the power supply voltage in the power supply voltage sensing circuit according to the embodiment of the present invention.

In Fig. 4, the horizontal axis represents the power supply voltage, and the vertical axis represents the voltage level.

In FIG. 4, when the power supply voltage Vcc is greater than the first reference voltage Vcc (H), the output voltage becomes Vref, and as the power supply voltage Vcc decreases, the output voltage value becomes smaller, thereby reducing the power supply voltage. When it is smaller than 2 reference voltages Vcc (H), it is judged as "0".

Here, it can be seen that the circuit designer can adjust the width between the first reference voltage and the second reference voltage by varying the equations (6) and (7).

As a result, the transistor Q19 is turned off according to the second sub-voltage detection operation of the system stop voltage detector 500, that is, the transistors Q16 and Q17 are turned off, and the inverter INV outputs a high signal to the input terminal. It receives the input and inverts as shown in (2) of Figure 3 to output a low signal.

Here, the output of the low signal by the inverter INV means that the operation of the system is stopped.

Therefore, the present invention does not operate until the power supply voltage Vcc rises to become Vcc (H), but operates when it exceeds Vcc (H) to detect the level of the power supply voltage Vcc supplied in the circuit. Operation is maintained, and the system operation is maintained continuously even when the power supply voltage (Vcc) decreases temporarily to a level below Vcc (H), and only when the power supply voltage (Vcc) becomes a level below Vcc (L). Allow the system to stop working.

That is, the present invention has hysteresis characteristics and limits the operation of the system according to the level of the power supply voltage Vcc.

According to the present invention, in detecting a level of a power supply voltage supplied to a circuit and outputting a signal for limiting the operation of the system, the operation of the system is stopped rather than the level of the power supply voltage at the time of outputting a signal for maintaining the operation of the system. It has a hysteresis TM characteristic that the level of the power supply voltage is low at the time of outputting a signal to make the circuit to be stable, so that the circuit can operate stably, thereby preventing the system from malfunctioning.

Claims (6)

A start-up unit 100 which outputs a signal for driving a circuit when an input power is applied; The bandgap reference voltage unit 200 which is driven according to the output signal of the start-up unit 100 and generates a constant bandgap reference voltage even when a temperature is changed; First and second transistors MP4 and MP5 of a first type connected to a power supply voltage and having a common base, first and second transistors Q16 and Q17 of a second type connected to a power supply voltage, and a second type. Limiting means connected to the bases of the first and second transistors Q16 and Q17 of the circuit to limit turn-off voltages of the first and second transistors Q16 and Q17 of the second type; The second type of third transistor Q19 and the collector connected to the drain of the second transistor MP5 and varying in operation depending on the power supplied from the second transistor Q17 of the second type, and the second type of An input terminal is connected to the collector of the third transistor Q19 and includes an inverter INV for receiving a reference voltage from the reference voltage generator 200 as a driving voltage. A system stop voltage detector 500 for limiting the output of INV; The first zener diode ZD3, the anode of the first zener diode ZD3, and the second type of first transistor Q16 are connected to the input power so that the cathode is only conducted when the input power is greater than or equal to the first reference voltage. A system operation voltage detector 300 configured to limit the output of the system stop voltage detector 500 when the power supply voltage Vcc is increased by a first resistor R16 connected between the collectors of the first and second resistors R16; A power supply voltage sensing circuit comprising a temperature compensator (400) for receiving power from the system operating voltage detector (300) and the system stop voltage detector (300) and outputting power regardless of a temperature change. The method of claim 1, wherein the limiting means, A second zener diode ZD4 having a cathode connected to bases of the first and second transistors Q16 and Q17 of the second type, and a diode D1 having an anode connected to an anode of the second zener diode ZD4; And a sixth transistor Q18 which is a P-channel transistor having a collector connected to the diode D1, a base connected to one end of the emitter of the fifth transistor Q15, and one end of the second resistor R18, and the emitter being grounded. Supply voltage sensing circuit consisting of. The method of claim 2, wherein the second zener diode (ZD4), And a Zener voltage lower than that of the first Zener diode (ZD3). In claim 1, A power supply voltage sensing circuit of a first type of transistor is a MOSFET and a second type of transistor is a bipolar transistor. According to claim 1, The start-up unit 100, A first PMOS transistor MP1 having a power source voltage Vcc as a source input and having a base connected to the voltage interrupter 300, a third resistor R1 having one end connected to the power source voltage Vcc, A first MNOS transistor MN1 having a gate connected to the other end of the third resistor R1, a drain connected to a power supply voltage Vcc, and a source connected to a base of the first PMOS transistor MP1, and the first PMOS transistor A drain is connected to the drain of MP1 and a collector is connected to a source of the second MNOS transistor MN2 and a second MNOS transistor MN2 connected to a reference voltage Vref and a driving voltage input terminal of the inverter INV. And a first NPN bipolar transistor Q1 having a base connected to the bandgap reference voltage part 200, and a fourth resistor R2 having one end connected to an emitter of the first NPN bipolar transistor Q1 in series. Connected to the gate of the first MNOS transistor MN1. Third and fourth zener diodes ZD1 and ZD2 having a cathode connected and an anode grounded, fifth and sixth resistors R3 and R4 having one end connected to a source of the first MNOS transistor MN1, and First and second PNP bipolar transistors Q2 and Q3 having emitters connected to the other ends of the fifth and sixth resistors R3 and R4, respectively, and having a common base, and the first and second PNP bipolar transistors Q2. And a third PNP bipolar transistor Q4 having an emitter connected to the base of Q3 and having a base connected to the collector of the second PNP bipolar transistor Q3, and a gate of the collector of the first PNP bipolar transistor Q2. A third MNOS transistor MN3 connected to a drain of the second MNOS transistor MN2 and a source connected to the bandgap reference voltage unit 200, and a collector at a gate of the second MNOS transistor MN2. Connected second NPN bipolar transistor Q5 and the second NPN bi A seventh resistor R5 and an eighth resistor R6 having one end connected to an emitter and a base of the transistor Q5, the base of the third PNP bipolar transistor Q4, and the second PNP bipolar transistor Q3. A power supply voltage sensing circuit comprising a ninth resistor (R20) having one end connected to the collector. The bandgap reference voltage unit 200 of claim 1, A second PMOS transistor MP2 having a source connected to the power supply voltage Vcc and a gate connected to the gates of the first PMOS and MNOS transistors MP1 and MN1 and a source thereof, and a gate of the drain of the second PMOS transistor MP2. And a fourth NMOS transistor MN4 having a drain connected to a power supply voltage Vcc, tenth and eleventh resistors R10 and R11 connected to a source of the fourth NMOS transistor MN4, and the tenth and Fourth and fifth PNP bipolar transistors Q6 and Q7 having emitters connected to respective ends of the eleventh resistors R10 and R11 to form a current mirror, and a collector and a base of the fourth PNP bipolar transistor Q6. The Darlington circuit receives a base input from a sixth PNP bipolar transistor Q8 having an emitter connected thereto and a base connected to a collector of the fifth PNP bipolar transistor Q7, and a collector of the sixth PNP bipolar transistor Q8. Constituent third and fourth NPN bipolars A capacitor C1 connected between the transistors Q9 and Q10, the collector of the third NPN bipolar transistor Q9, the drain of the second PMOS transistor MP2, and the base of the third NPN bipolar transistor Q9. A fifth NPN bipolar transistor Q13 connected to an emitter of the fourth NPN bipolar transistor Q10 and a diode connected to the twelfth resistor R9 to form a diode, and the third NMOS A sixth and seventh NPN bipolar transistors Q11 and Q12 connected to a source of the transistor MN3 to receive a collector of the sixth PNP bipolar transistor Q8 and a current applied from the base to the collector; And a thirteenth and fourteenth resistors R10 and R13 connected to respective emitters of the seventh NPN bipolar transistors Q11 and Q12 and one end of the thirteenth and fourteenth resistors R10 and R13 and a ground terminal. 15 resistor (R11) and the seventh NPN bipolar transistor A sixteenth resistor R12 connected between the base of the master Q12 and the source of the fourth NMOS transistor MN4 and a seventeenth end connected to the seventh NPN bipolar transistor Q12 and the sixteenth resistor R12 A resistor R13, a third PMOS transistor MP3 having a source connected to a source and a reference voltage of the fourth NMOS transistor MN4, and an eighteenth resistor connected to a drain and a gate of the third PMOS transistor MP3 ( And an eighth NPN in which a collector is connected to R14, the eighteenth resistor R14, the eighteenth resistor R14, and the first and second NPN bipolar transistors Q1 and Q5 having a base connected to an emitter. A power supply voltage sensing circuit comprising a bipolar transistor (Q14) and a nineteenth resistor (R15) having one end connected to an emitter of the eighth NPN bipolar transistor (Q14).