KR100272159B1 - Symmetrical ion implantation method - Google Patents

Abstract

PURPOSE: A symmetrical ion implantation method is provided to improve yield and characteristic, by preventing reliability from being degraded by errors generated in a reorientation process of a semiconductor structure. CONSTITUTION: An orientation angle of a semiconductor structure where an ion implantation process is performed is determined to be the first angle by an orientor of an ion implanter. After the semiconductor structure is mounted on a disc, a tilt angle is controlled to have the second angle. The quantity of dopant ions which is a half of the dopant ions to implant, is implanted into a predetermined region or layer of the semiconductor structure. The tilt angle is controlled at the third angle symmetrical to the second angle and with reference to an axis vertical to the surface of the semiconductor structure. The quantity of dopant ions which is the rest of the dopant ions to implant, is implanted into a predetermined region or layer of the semiconductor structure.

Description

Symmetric ion implantation method

1 (a) and 1 (b) are views for explaining a symmetrical ion implantation method according to the prior art.

2 (a) and 2 (b) are views for explaining a symmetrical ion implantation method according to the present invention.

TECHNICAL FIELD This invention relates to the manufacturing method of a semiconductor device. Specifically, It is related with the ion implantation method.

The ion implantation process is a process of implanting ions through a physical method to impart conductivity of an already formed layer or region, and is generally performed to form source and drain regions of a MOS transistor.

Briefly referring to the process of forming the MOS transistor, first, a field oxide film is selectively formed on the semiconductor substrate through an oxide film formation method such as the IOCOS method. The field oxide film defines the areas where circuit numbers are to be formed. Here, a gate oxide film is formed on the active region. On the gate oxide film, a gate electrode layer usually made of polysilicon is formed. Here, the gate electrode worm may be formed in a multi-layered structure in which a polysilicon layer and a high melting point metal layer are sequentially stacked. When the formation of the gate electrode layer is completed, dopant ions are implanted into regions where the source and drain are to be formed, and the gate electrode layer serves as an ion implantation prevention mask. Here, to minimize the ion channel effect, dopant ions are typically implanted in the form of an ion beam that is scanned at an angle slightly off the vertical direction, rather than in a direction perpendicular to the surface of the semiconductor structure.

However, in such a method, as the size of the semiconductor device becomes smaller and smaller, the depth of the junction becomes shallower, and the temperature at which the heat treatment is performed is lowered. As a result, an asymmetric ion blocking region is formed on both sides of the gate electrode. The ion blocking region is a region where dopant ions are not implanted among regions where the source and drain are to be formed, and affects the electrical characteristics of the MOS transistor. For example, it is undesirable to change the electrical characteristics of the MOS transistors such as forming a high resistance region toward the source region and lowering the drain current.

As a method for improving the above problems, a technique of ion implantation while rotating a semiconductor structure to be ion implanted with respect to a predetermined axis has been proposed, which is generally referred to as a symmetrical ion implantation method. In the symmetric ion implantation method, ion implantation is performed while changing the orientation angle of the semiconductor structure. For example, the orientation angle β of the semiconductor structure is changed from 45 ° to 225 °. When the orientation angle (β °) of the semiconductor structure is to be changed, the semiconductor structure mounted on the disk is taken out to the orientation part of the ion implantation equipment and then the orientation angle of the semiconductor structure is changed. Then, the process time is increased because the semiconductor structure has to be reloaded onto the disk, and there is a problem that the productivity is lowered. Here, the angle formed by the direction perpendicular to the semiconductor substrate and the ion beam is referred to as the tilt angle β °, and as can be seen from the first (a) and the first (b) degrees, the tilt angle (β °). ) Is kept constant, unlike the deflection angle (β °), which is changed by 180 °.

In more detail, it is as follows.

1) Adjust the orientation angle [β °, for example β ° = 45 °] of the semiconductor structure in the orientation part in the ion implantation equipment.

2) Loading the semiconductor structure onto the disk in the ion implantation equipment

3) 1/2 dopant ion amount ion implantation

4) Unloading the semiconductor structure from the disk to the directional section

5) In the directional section, readjust the directional angle [(β + 180) °, for example, (β + 180) ° = 225 °] of the semiconductor structure.

6) Reload the semiconductor structure into the disk in the ion implantation equipment

7) Implantation of the remaining 1/2 dopant ion amount

8) Removal of semiconductor structure

As can be seen from the above, the conventional symmetric ion implantation process requires reorientation of the semiconductor structure at the orientation part. To do this, the semiconductor structure must be taken out of the disk and then reloaded. In order to adjust the orientation angle of the semiconductor structure on the orientation portion, an additional mechanism of rotation is required, thereby lowering the productivity of the ion implantation equipment. In addition, adjusting the orientation angle of the semiconductor structure on the disk is a difficult operation, which takes a lot of time, and if it is not accurately adjusted, the reliability of the semiconductor device is lowered and the production yield is reduced.

Accordingly, it is an object of the present invention to provide a symmetrical ion implantation method that can be performed more efficiently.

In order to achieve the above object, the symmetrical ion implantation method according to the present invention adjusts the orientation angle of the semiconductor structure to be ion implanted in the orientation of the ion implantation equipment to the first angle and the tilt angle on the disk Adjusting to a second angle: implanting an amount of dopant ions that is essentially one half of the amount of dopant ions to be implanted into a predetermined region or layer of the semiconductor structure: the axis about an axis perpendicular to the surface of the semiconductor structure Adjusting the tilt angle at a third angle that is symmetric to a second angle: and implanting a dopant ion amount that is essentially the remaining half of the amount of dopant ion to be implanted into a predetermined region or layer of the semiconductor structure It includes a step.

According to a specific embodiment of the symmetrical ion implantation method according to the present invention, the second angle is 7 ° with respect to the axis perpendicular to the surface of the semiconductor structure and the third angle is -7 °. In addition, the semiconductor structure has a structure in which a gate electrode is formed on a predetermined gate oxide layer, and the ion implantation processes inject dopant ions into a portion where source and drain regions are to be formed. Inject ions in the form.

In short, instead of rotating the semiconductor structure, if the tilt angle of the obtuse body is changed while the semiconductor structure is mounted on the disk (for example, + 7 ° → -7 °), the semiconductor structure is oriented. Since the same effect as changing the angle is obtained, the process time can be reduced without deteriorating the characteristics of the semiconductor device, thereby increasing productivity.

Hereinafter, with reference to the accompanying drawings will be described in more detail with respect to the present invention.

2 (a) and 2 (b) are views for explaining an example of a symmetrical ion implantation method according to the present invention.

First, a semiconductor structure to implant ions is prepared. The semiconductor structure shown in FIG. 2 (a) is a structure obtained in an intermediate step of the MOS transistor formation process, in which a gate oxide film 102 is formed on a semiconductor substrate, and a gate electrode layer 101 is formed thereon. It is. When the formation of the gate electrode layer 101 is completed, an ion implantation process should be performed to form the source / drain regions 103 and 104. The present invention relates to such an ion implantation process.

In the ion implantation process, as mentioned above, in order to minimize the ion channel effect, the ion beam should be scanned in a slightly deviated direction instead of being scanned in a direction perpendicular to the surface of the semiconductor structure. In addition, ions must be symmetrically implanted to prevent the formation of an asymmetric ion blocking region that degrades the electrical properties of the device.

The symmetrical ion implantation method of the present invention that satisfies such conditions is as follows.

First, the semiconductor structure to be ion implanted is adjusted to a predetermined first angle at the direction of the direction in the ion implantation equipment, the semiconductor structure is mounted on the disk, and then the tilt angle (α °) is adjusted. It adjusts to predetermined 2nd angle (for example, 7 degrees). When the direction angle (β °) and the tilt angle (α °) are adjusted in this manner, an amount that is essentially half of the amount of ion dose to be implanted is transferred to a predetermined region or layer of the semiconductor structure in the form of an ion beam. Optional injection.

Next, the tilt angle α ° is adjusted to a third angle (for example, −7 °) that is symmetrical with the second angle. Here, the second angle and the third angle are angles which are mutually symmetric about an axis perpendicular to the surface of the semiconductor structure, as also mentioned above.

Subsequently, an amount corresponding to essentially half of the amount of ion dose to be implanted is selectively implanted in the form of an ion beam into a predetermined region or layer of the semiconductor structure.

This is summarized as follows.

1) Adjust the angle (β °) at the orientation of the semiconductor structure (eg β ° = 45 °)

2) Adjust the tilt angle (α °) after mounting the semiconductor structure on the disc (eg α ° = 70 °)

3) 1/2 dose ion implantation process

4) Tilt angle (α °) adjustment ... -7 ° (Direction angle (β °) is constant)

5) Implement the remaining 1/2 dose ion implantation process

6) Desorption of semiconductor structure

The effects of the symmetric ion implantation method described above will be described in comparison with the symmetric ion implantation method according to the prior art.

* Time required for re-orientation in the symmetrical ion implantation process according to the prior art ... 4 minutes 30 seconds

* Time required to adjust the tilt angle in the symmetrical ion implantation process according to the present invention ... 1 minute 55 seconds

Therefore, the symmetric ion implantation process according to the present invention has the advantage of reducing the time of 2 minutes 35 seconds per unit operation compared to the symmetric ion implantation process according to the prior art.

According to the experimental results conducted to compare the time required per unit operation, the time required per unit operation of the symmetric ion implantation process according to the prior art is 2264.71 seconds, the time required per unit operation of the symmetric ion implantation process according to the present invention Is 2109.71 seconds, roughly 6.84% of work time.

In addition, according to the experimental results, the yield was 82.3% when the symmetric ion implantation process according to the prior art, the yield was 83.6% when the symmetric ion implantation process according to the present invention.

Comparing the DC characteristics of the device is shown in the following table.

As can be seen above, the symmetrical ion implantation process according to the present invention has the advantage of reducing the down time of the ion implantation equipment to use it more effectively, thereby reducing the manufacturing cost of the unit semiconductor device. In other words, the productivity of the production equipment is improved. In addition, there is an advantage in that the production yield and characteristics of the device are improved by preventing the deterioration of the reliability of the device due to an error generated in the semiconductor structure re-orientation process.

While the present invention has been described with reference to specific embodiments, the present invention is not limited to the above embodiments, and modifications and improvements are possible within the scope of ordinary knowledge of those skilled in the art. In particular, it is apparent that the ion implantation process is not limited to forming source / drain regions but may be performed on any semiconductor structure requiring such symmetrical ion implantation in the process of manufacturing a semiconductor device.

Claims (1)

Adjusting the orientation angle to the first angle of the semiconductor structure to be ion implanted in the orientation portion of the ion implantation equipment, mounting the semiconductor structure on the disk and adjusting the tilt angle second roll: Injecting an amount of dopant ions, which is essentially half of the amount of dopant ions to be formed, into a predetermined region or layer of the semiconductor structure: a third that is symmetrical with the second angle with respect to an axis perpendicular to the surface of the semiconductor structure Adjusting the tilt angle at an angle; And implanting an amount of dopant ions that is essentially the remaining half of the amount of dopant ions to be implanted into a predetermined region or layer of the semiconductor structure.