KR100270696B1 - Apparatus for sector decoding and atapi controling in optic disk drive having within buffer memory - Google Patents

Abstract

PURPOSE: An apparatus for controlling a sector decoding and an ATAPI(AT Attachment Packet Interface) of an ODD(Optical Disk Drive) embedding a buffer memory is provided to connect the buffer memory with a sector decoder to make the sector decoder speedily access to the buffer memory, and to buffer data stored in the buffer memory. Therefore, power consumption is minimized and the data are transmitted to a host at a high speed. CONSTITUTION: A sector decoder(22) converts frame-decoded serial data capable of being inputted at various speeds from an optical disk into parallel data of a predetermined bit unit. The sector decoder(22) records the converted data in a buffer memory(24) as a sector unit. An ATAPI(AT Attachment Packet Interface) controller(26) builds a data FIFO(First-In, First-Out)(230) therein. If a host requests data, the ATAPI controller(26) reads sector data from the buffer memory(24) and stores the sector data in the data FIFO(230). The ATAPI controller(26) reads the stored sector data and transmits the data to the host according to a predetermined transmission speed.

Description

Sector Decoding and Atapi Control in Optical Disk Drives with Buffer Memory {APPARATUS FOR SECTOR DECODING AND ATAPI CONTROLING IN OPTIC DISK DRIVE HAVING WITHIN BUFFER MEMORY}

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an optical disk drive, and more particularly, to sector decoding and AT attachment packet interface of a compact disk read only memory (DRAM) drive having a dynamic random access memory (DRAM). ATAPI) control device.

Personal computers and workstations have optical disk drives, such as CD ROMs or DVD ROMs, that can store large amounts of data. In general, a CD ROM drive stores data in a CD ROM divided into a plurality of sectors, and has a structure for transferring data read from the CD ROM to a host.

Such a conventional CD ROM drive includes a pickup unit for reading data from a CD ROM rotated by a motor, and a data processing unit for converting the read data into data suitable for the form of the CD ROM and transferring the data to a host. When information (lead data) is input from the outside (CD data processing unit), the data processing unit analyzes this information to detect a synchronization signal, and may occur when recording, reproducing, storing, or transmitting the remaining information except the synchronization signal. After the error is compensated for, it is stored separately for each sector in DRAM, which is an externally provided buffer memory. When the host requests data, the data processor checks whether data requested by the host exists in the DRAM. If present, the data is transmitted to the host at a constant speed according to the ATAPI protocol. If the data does not exist, the CD data processing unit requests the data and performs the above-described procedures such as synchronization detection, error compensation, and DRAM storage.

As described above, the data processor repeats an intermediate process of storing the data decoded from the CD ROM into the DRAM, and then storing the data in the DRAM, and then storing the data in the DRAM again.

In order to increase the speed of the CD ROM drive (higher speed), the processing speed of the internal components as well as the processing speed of the DRAM should be increased. Since the DRAM is provided externally, it takes a long time to read / write data. Therefore, in order to do this, the DRAM was replaced with the EDO DRAM and the configuration of the controller for this also had to be replaced. Therefore, difficulties in configuration and realization occurred, and there was a problem in that the cost for the configuration also increased. In addition, to increase the speed of the CD-ROM drive, a configuration was required to increase the operating frequency (operation clock) of each component.

Accordingly, an object of the present invention, which was devised to solve the problems of the prior art operating as described above, is to place a buffer memory of an optical disc drive therein and provide a control device suitable for the same.

Another object of the present invention is to provide a sector decoding and ATAPI control apparatus for a CD ROM drive incorporating DRAM.

An embodiment of the sector decoding and ATAPI control apparatus of an optical disk drive having a DRAM according to the present invention, which was devised to achieve the above object, hosts a frame decoded data read from the optical disk through a built-in buffer memory. In the sector decoding and ATAPI control of the optical disk drive to transmit to the

A sector decoder for converting the frame decoded serial data, which can be input at various speeds, from the optical disk into parallel data of a predetermined bit unit, and then writing the converted data in the buffer memory sector by sector; And

ATAPI that has a built-in data FIFO and reads the sector data from the buffer memory and stores the data in the data FIFO when the host requests data, and transmits the data stored in the data FIFO to the host according to a predetermined transmission rate. It includes a control unit.

1 is a block diagram of a compact disc ROM drive according to a preferred embodiment of the present invention;

FIG. 2 is a detailed block diagram of a sector decode and ATAPI controller incorporating the memory of FIG. 1; FIG.

3 is a memory map of the DRAM of FIG. 2;

4 is an operational waveform diagram of the data buffer of FIG. 2;

Hereinafter, with reference to the accompanying drawings will be described in detail the operating principle of the preferred embodiment of the present invention. In the following description of the present invention, detailed descriptions of well-known functions or configurations will be omitted if it is determined that the detailed description of the present invention may unnecessarily obscure the subject matter of the present invention.

1 shows a block diagram of a CD ROM drive according to a preferred embodiment of the present invention, in which a spindle and a sled motor 12 are controlled by a servo 18 under the control of a servo 18. The ROM 10 is rotated and the pickup 14 is moved. The pickup 14 reads the signal recorded on the rotating CD ROM 10. The amplifier 16 amplifies the output of the pickup 14, removes noise and distortion, and then waveform-shapes it and outputs it as reproduction data. The frame decoder 20 frames and outputs the playback data. The output data of the frame decoder 20 is input to the sector decoder 22. The sector decoder 22, the buffer memory 24, and the ATAPI controller 26 receive the frame data, detect and correct the error, and transmit the error to the host according to the ATAPI protocol. The microcomputer 28 generally controls the operation of the CD ROM drive.

Referring to FIG. 2, which shows the detailed configuration of the sector decoder 22, the buffer memory 24, and the ATAPI controller 26, the sector decoding and attaphy control operation according to the present invention will be described in detail as follows.

The sector decoder 22 receives the output data of the frame decoder 20 in series and performs de-scrambling according to whether or not scrambling, and then outputs them in parallel. A sync detection unit 110 for detecting sync from the output data of the frame decoder interface 100 and a sector data buffer having a first in first out (FIFO) structure for receiving and buffering data in sector units whenever the sync is detected. And a subcode buffer 130 for receiving and buffering the subcode from the microcomputer 28, and performing error correction and error detection and correction (ECC) and error detection and correction (ECC) processing on the data stored in the buffer memory. ECC and EDC processing unit 140, address generator 150 for controlling memory addresses for plane separation, and buffers for controlling data read / write of buffer memory 24 The microcomputer interface 170 that interfaces with the memory controller 180, the microcomputer 28, and the microcomputer buffer memory 190 that reads / writes data of the buffer memory 24 in response to a request of the microcomputer 28. And a clock generator 160 for generating various clocks for determining the access priority of the buffer memory 24.

The buffer memory 24 has a 128 [K] x 16 [Bit] structure (= 2 Mbit) connected to the sector decoder 22 by a 16 [Bit] bus for high speed access. Referring to FIG. 3, which shows a memory map of the buffer memory 24, the buffer memory 24 is used by the microcomputer 28 and a data storage area of 80 [KWord] for storing user data among sector data. A data storage area of 8 [KWord], and an additional area of 40 [KWord] for storing subcodes and error flags according to the mode of sector data. At this time, the bandwidth of the buffer memory 24 according to the present invention is determined as the maximum access period as the CD ROM drive is speeded up.

Also, referring to FIG. 2, the ATAPI controller 26 may include a TR flag block 200 for managing a data transmission state and an auto flag block for auto mode control, which is an automatic data transmission mode. (Auto Flag Block) 210, Transfer Count 220, Data FIFO 230 for continuous transfer of data, Direct Memory Access (DMA) control unit for direct transfer of data to host 260, a command FIFO 280 for command processing with the host, a host address 240, a task 250, and an interface flag block 270 for task command processing and related address control. do.

Hereinafter, the sector decoding and the ATAPI control operation will be described in detail with reference to the above configuration.

When frame data, which is a variable input stream, is input from the frame decoder 20 at a maximum speed, the synchronization detector 110 detects synchronization from the data and outputs a synchronization signal corresponding to an internally generated synchronization signal. The sector data, which is the remaining data except for the synchronization signal, is descrambled by the descrambler included in the frame decoder interface 100 according to the scrambling, and then converted into bytes in parallel and stored in the sector data buffer 120. Sector data stored in the sector data buffer 120 is stored in the buffer memory 24 and divided into even / odd units in sector units under the control of the buffer memory controller 180.

Here, the sector data is composed of user data and additional data, and the additional data includes synchronous, header, blank, ECC, and EDC, so that the buffer memory 24 is a user. Data and additional data are separated and stored in each storage area.

The ECC and EDC processing unit 140 receives the sector data stored in the buffer memory 24, divides even / odds, processes ECC and EDC in byte units, and stores the ECC and EDC again in the buffer memory 24. EDC processing is determined by the information of the input data. Such treatment of ECC and EDC is as disclosed in Korean Patent Application No. 97-13200 filed by the applicant with the Korean Patent Office. However, such error detection and correction processing may be omitted depending on the operating conditions of the CD ROM drive.

Until the data request from the host is made, the above data storage and error correction processing is continuously repeated, and the final data is accumulated in the buffer data 24.

When the data transmission request from the microcomputer and the host, the desired data exists in the buffer memory 24, the ECC and EDC processed sector data stored in the buffer memory 24 is transferred to the ATAPI controller 26 through the data FIFO 230. ) Is sent to the host at ATAPI protocol speed.

Here, the processing of the sector data transmitted from the buffer memory 24 to the host is based on the period of the sector data synchronization signal. That is, 2352 bytes of sector data are input during one period (1 clock) of the sector data synchronization signal, and during this time, ECC, EDC, C2PO data storage, subcode data storage, and host data transfer must all be performed. The period in which the buffer memory 24 can be accessed during one period of the sector data synchronization signal is 18,816 in total, of which 6,686 is allocated to transmit data to the host, and 12,130 is allocated for other functions. It is a section. Data stored in the buffer memory 24 during the 6,686 period is transmitted to the data FIFO 230. The data FIFO 230 receives data from the buffer memory 24 and simultaneously transmits data to the host.

In the present invention, since the buffer memory 24 is built in the CD-ROM drive, the data FIFO 230 continuously performs read / write operations unless there is an abnormal state such as full or empty. Enable to support the transmission speed.

Referring to FIG. 4, which shows an operating state waveform of the data FIFO 230, in the high section of the waveform of FIG. 4, the data FIFO 23 receives data from the buffer memory 24 and simultaneously receives the data. Send to host. In the row section, the data FIFO 230 transmits data to the host without receiving data from the buffer memory 24. The 16HR during the high period indicates that 16 [WORD] is transmitted from the buffer memory 24 to the data FIFO 230, and 5HT indicates that 5 [WORD] is transmitted to the host. In addition, 18 sections indicates that the access section of the buffer memory 24 is 18 sections.

If the write and the host transfer to the data FIFO 230 occurs simultaneously for 18 sections, the amount of data remaining in the data FIFO 230 after 18 sections is 11 [WORD]. In addition, the remaining 7 [WORD] is transmitted to the host during the 28 periods of the row section. Therefore, since the amount of data remaining after 7 [WORD] transmissions in the 28 sections from the previous 11 [WORD] is 4 [WORD], the previous operation is repeated with the data read request to the buffer memory 24 again. When such an operation is performed continuously, the transmission rate of PIO mode 4 or DMA mode 2 of the ATAPI protocol can be maintained.

Therefore, due to the management of the data FIFO 230 and the built-in buffer memory 24, it is possible to easily obtain the form of the desired information string, minimizing power consumption by the above-described operation. Further, operations such as data serial / parallel conversion, error correction (ECC, EDC processing), and host transfer of data are synchronized to one clock determined by the buffer memory 24. Therefore, data strings input at various transmission speeds such as 1 ×, 2 ×, 8 ×, 16 ×, 20 ×, and 24 × may be applied, and the data transfer rate to the host may be at most 16.6 by the operation of the data FIFO 230. Up to MByte / sec can be supported.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. For example, the configuration of the present invention can be applied not only to a CD ROM drive but also to a CD ROM decoder and an atapi controller applied to a DVD ROM drive, a DVD RAM drive, a CD-R and a CD-R / W drive. In the case of DVD ROM and DVD RAM, the sector decoder 22 of FIG. 2 should be replaced with an ATAPI control unit including only the frame decoder interface 100 block. In particular, in the case of DVD RAM, the frame decoder interface block may transmit bidirectional data. It should support parallel / serial conversion as well as serial / parallel conversion.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the scope of the following claims, but also by those equivalent to the scope of the claims.

As described above, the present invention locates DRAM, which is a medium speed buffer memory, inside the CD ROM decoder IC and connects the DRAM and the sector decoder to an internal bus so that the sector decoder can access the DRAM quickly and minimize power loss. 16-bit conversion processing can be performed easily and quickly. In addition, the high speed transfer of the CD-ROM drive is possible by enabling high-speed transfer to the host while buffering data stored in the DRAM.

In addition, by embedding the buffer memory DRAM in the optical disk drive, all the functions of the disk drive are implemented in the same size IC, so it can be easily applied to products that require narrow internal space, compactness and minimize power consumption, such as notebook computers. Make sure

Claims (8)

In the sector decoding and ATAPI controller of the optical disk drive for transmitting the frame-decoded data read from the optical disk to the host through the built-in buffer memory, A sector decoder for converting the frame decoded serial data, which can be input at various speeds, from the optical disk into parallel data of a predetermined bit unit, and then writing the converted data in the buffer memory sector by sector; And ATAPI that has a built-in data FIFO and reads the sector data from the buffer memory and stores the data in the data FIFO when the host requests data, and transmits the data stored in the data FIFO to the host according to a predetermined transmission rate. A sector decoding and ATAPI control apparatus for an optical disk drive having a buffer memory, comprising a control unit. The method of claim 1, wherein the sector decoder, A synchronization detector for detecting a synchronization signal from the frame decoded data which is a variable input stream; A frame decoder interface for converting and outputting sector data after the synchronization signal into parallel data in units of predetermined bits each time a synchronization signal is detected by the synchronization detection unit; And A sector of an optical disc drive in which a buffer memory is stored, comprising a sector data buffer storing parallel data in a predetermined bit unit and separating even / ord into sectors and recording the data in an upper / lower region of the buffer memory. Decoding and ATAPI Controls. The data transmission method of claim 2, wherein the sector decoder reads sector data recorded in the buffer memory, performs error detection and correction in the predetermined bit unit, and writes the data back to the buffer memory. And an error detection and correction unit repeatedly performing a request until a request is made. The sector decoding and ATAPI control apparatus of an optical disk drive incorporating a buffer memory. The apparatus of claim 1, wherein the ATAPI control unit processes data transfer from the buffer memory to the host during one period of the sector data synchronizing signal. 5. The optical memory of claim 4, wherein the data FIFO continuously performs read / write operations unless the data FIFO is in a full or empty state in order to adapt to the speed of the buffer memory. Sector decoding and ATAPI controls on disk drives. The optical disk according to any one of claims 1 to 5, wherein the buffer memory is connected to the sector decoder and the ATAPI control unit by using an internal bus corresponding to the bandwidth size of the buffer memory. Sector decoding and ATAPI control of the drive. 6. The sector decoding and ATAPI control apparatus according to any one of claims 1 to 5, wherein the buffer memory is a DRAM (Dynamic RAM) having a bandwidth equal to a maximum access period. A sector of an optical disc drive incorporating a buffer memory as claimed in any one of claims 1 to 5, wherein the optical disc drive is one of a compact disc ROM (CD-ROM), a DVD-ROM, and a DVD-RAM. Decoding and ATAPI Controls.

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