KR100268487B1 - Wideband peak level detector - Google Patents

Abstract

PURPOSE: A wide-band peak level detector is provided to exactly detect the peak level of a signal having a wide-band frequency range by rapidly responding to variations in the frequency. CONSTITUTION: A wide-band peak level detector detects a peak level of an input signal(Si) having a wide-band frequency range. Upper and lower peak detectors(100,102) trace/detect variations in the level of the input signal(Si) so that the peak level of the input signal can correspond to the RC time constant. Variable time constant units(112,114) variably set the RC time constant. A variable controller(116) detects the frequency band of the input signal(Si) and varies the RC time constant of the variable time constant units(112,114) in response to the detected frequency band. The variable time constant units(112,114) are each connected to the upper and lower peak detectors(100,102) to variably set the RC time constants of the upper and lower peak detectors(100,102), respectively.

Description

Wideband Peak Level Detector {WIDEBAND PEAK LEVEL DETECTOR}

The present invention relates to an apparatus for detecting a level of an analog signal, and more particularly, to a peak level detector for detecting a peak level of an input signal.

Peak level detectors are typically used to detect the peak level of a signal whose level changes. For example, a peak detector is essentially used in an AGC (Automatic Gain Control) circuit widely used in a receiver of a communication system or a device for reproducing a signal recorded on a recording medium. Such peak level detectors are disclosed in detail on pages 156 to 160 of "OP Amplifier Practice," published by, for example, September 27, 1988, in Korea. Referring to the above-described "OP amplifier practical technique", the peak value detection circuit is shown in Figs. 5-37 and 5-38 on page 157, and the peak and peak value detection circuit is shown in Fig. 5-39. This is described in detail.

FIG. 1 is a circuit diagram of a conventional peak level detector, and illustrates an example of a peak level detector employed in an optical disc reproducing apparatus for reproducing information recorded on an optical disc such as a CD (Compact Disc) or a DVD (Digital Video Disc). It is seen. The peak level detector shown in Fig. 1 is basically the same as the peak and peak value detection circuit shown in Fig. 5-39 of the above-described "OP amplifier practical technique". That is, the upper peak detector 100 and the first time constant part 104 of FIG. 1 correspond to the positive peak value detection circuit of Fig. 5-39 of "OP Amplifier Practice", and the lower peak detector 102 and the first The time constant 106 corresponds to the negative peak value detection circuit, and the differential amplifier 108 corresponds to the differential amplifier. In FIG. 1, for convenience of explanation, the first and second time constant parts 104 and 106 are separately shown for convenience of description. Such peak level detectors are employed for AGC for RF (Radio Frequency) signals picked up from optical discs. In this case, the input signal Si in FIG. 1 becomes an RF signal reproduced from the optical disk. The input signal Si is applied to the upper and lower peak detectors 100 and 102. The upper peak detector 100 detects an upper peak level of the input signal Si, and the lower peak detector 102 detects a lower peak level of the input signal Si. At this time, the upper and lower peak detectors 100 and 102 detect the time constants due to resistance and capacitance while tracking the level change of the input signal Si corresponding to the RC time constants. The second time constants 104 and 106 are set. The first time constant part 104 is composed of a resistor element R1 and a capacitor C1 connected in parallel to each other between the correcting means of the upper peak detector 100 and the ground, and the second time constant part 106 has a lower peak detector. It consists of a resistor element R2 and a capacitor C2 connected in parallel to each other between the correcting means of ground and ground. The upper and lower peak level signals detected by the upper and lower peak detectors 100 and 102 are applied to the differential amplifier 108 composed of the operational amplifier 110 and the resistor elements R3 to R6 to differentially amplify the upper and lower peak levels. A signal Vp having a difference level between peak levels is obtained.

In the above peak level detector, the peak level detection sensitivity of the input signal Si is determined by the RC time constant. That is, the upper peak level detection sensitivity is determined by the RC time constants of the resistance element R1 and the capacitor C1 of the first time constant part 104, and the lower peak level detection sensitivity is the resistance of the second time constant part 106. It is determined by the RC time constants of the element R2 and the capacitor C2. Therefore, in order to accurately detect the peak level of the input signal Si, the RC time constant must be appropriately set according to the frequency and level change of the input signal Si.

In general, in the optical disc reproducing apparatus, the RF signal reproduced from the optical disc decreases as the frequency increases. Therefore, in order to accurately detect the peak level of the input signal, the higher the frequency of the input signal, the smaller the RC time constant is to follow the frequency change sensitively, and the lower the frequency of the input signal, the larger the RC time constant, the larger the frequency change. Make sure you follow them insensitively.

As described above, the RC time constant that determines the peak level detection sensitivity in the peak level detector was set to a fixed value as shown in FIG. Accordingly, it could not respond quickly when the input signal had a wide frequency range. This will be described with reference to the example of FIG. 2. 2 illustrates a relationship between frequency variation and detection sensitivity when the input signal of the peak level detector is a sine wave, as an operation timing diagram. If the RC time constant is set to a low frequency, as the frequency increases as shown in FIG. 2 (a), since the sensitivity is slow, it takes a long time to detect the exact peak level. On the contrary, when the RC time constant is set to a high frequency, as shown in FIG. 2 (b), when the frequency is lowered, it is too sensitive to detect an accurate peak level.

As described above, the peak level detector, which has been used in the related art, has a disadvantage in that it cannot quickly detect or accurately detect a frequency change with respect to a signal having a wide frequency range.

Accordingly, an object of the present invention is to provide a wideband peak level detector capable of accurately detecting a peak level of a signal having a wide frequency range in a rapid response to a frequency change.

1 is a circuit diagram of a conventional peak level detector,

2 is an operation timing diagram of FIG. 1;

3 is a circuit diagram of a broadband peak level detector according to an embodiment of the present invention;

4 is a detailed circuit diagram of the first and second variable time constants of FIG. 3;

5 is a detailed circuit diagram of the variable control unit of FIG. 3;

6 is an operation timing diagram of FIG. 5.

The present invention for achieving the above object is a peak detector for detecting the peak level of the input signal while following the change in the level of the input signal corresponding to the RC time constant, and a variable time constant unit for variably setting the RC time constant of the peak detector And a variable control unit for detecting a frequency band of the input signal and varying the RC time constant of the variable time constant unit corresponding to the detected frequency band.

Meanwhile, when the present invention is applied to simultaneously detect the upper and lower peak levels as in the example of FIG. 1, the upper and lower peaks have one variable time constant for variably setting the RC time constants of the upper and lower peak detectors. Is connected to the detector. The RC time constant of the variable time constant is varied by the variable control unit as described above.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the annexed drawings, numerous specific details are set forth in order to provide a more thorough understanding of the present invention, such as specific circuit configurations, components, or timing of operation. It will be apparent to those skilled in the art that the present invention may be practiced without these specific details. And a detailed description of known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

3 shows a circuit diagram of a broadband peak level detector according to an embodiment of the present invention. FIG. 3 illustrates an example in which the present invention is applied to the peak level detector of FIG. 1. The upper and lower peak detectors 100 and 102 and the differential amplifier 108 are the same as those of FIG. Given. As shown in FIG. 1, the variable control unit 116 uses the first and second variable time constants 112 and 114 instead of the first and second time constants 104 and 106 to set the fixed RC time constant to one value. Configure it by adding

The first and second variable time constant units 112 and 114 are connected to the upper and lower peak detectors 100 and 102 one by one, respectively, and variably set the RC time constants of the upper and lower peak detectors 100 and 102, respectively. In the following description, the RC time constant set by the first variable time constant unit 112 for the upper peak detector 100 is referred to as a first RC time constant, and the second variable time constant unit 114 for the lower peak detector 102 is described below. The RC time constant set by is called the second RC time constant. The variable control unit 116 connected to the first and second variable time constant units 114 detects the frequency band of the input signal Si and corresponds to the detected frequency bands so as to correspond to the detected frequency bands. The second RC time constant is varied. The variable control unit 116 selects the first and second RC time constants to be inversely proportional to the high and low changes in the frequency band of the input signal Si. That is, the variable control unit 116 selects the first and second RC time constants correspondingly as small as the frequency band of the input signal Si increases, and the first and second RC when the frequency of the input signal Si decreases. Select a time constant with a correspondingly large value.

The first and second variable time constants 112 and 114 may be configured in the same manner, and the configuration example is shown in FIG. 4. Referring to FIG. 4, first, the connection terminal 118 includes a first variable time constant part 112 or a second variable time constant part configured as shown in FIG. 4 in the upper peak level detector 100 or the lower peak detector 102. 114). A plurality of resistance elements R11 to R1n are connected in series between the connection terminal 118 and the ground. The resistance values of these resistor elements R11 to R1n are selected differently, but in the embodiment of the present invention, their sizes are selected such that R11 < R12 < R13 < The capacitor C11 is connected in parallel to a row of resistor elements composed of these resistor elements R11 to R1n. A plurality of switches SW1 to SWn are connected one by one between each of the resistor elements R11 to R1n. The switches SW1 to SWn are selectively switched by the variable control unit 116 to control the conductive paths between both terminals of the corresponding resistance elements, respectively. At this time, the switches SW1 to SWn are switched by the switching control signals CON1 to CONn applied correspondingly one by one from the variable control unit 116.

Since the resistance values of the resistor elements R11 to R1n are different from each other, the resistance value between the connection terminal 118 and the ground changes according to switching of the switches SW1 to SWn, that is, on / off. As a result, the RC time constant changes.

FIG. 5 is a detailed circuit diagram of the variable control unit 116. The variable control unit 116 shown in FIG. 5 performs first and second RC time constants by selectively switching the switches SW1 to SWn as described above. To vary. Referring to FIG. 5, in the waveform converter 120 using the conventional comparator composed of the capacitor C10, the resistor elements R20 and R21, and the operational amplifier 122, the capacitor C10 is connected to the input signal Si side. For DC (Direct Current) coupling (coupling) connected between the inverting input terminal (-) of the comparator 122. The capacitor C10 blocks the DC component of the input signal Si and only an AC (Alternating Current) component is applied to the inverting input terminal (-) of the comparator 122. In addition, the DC bias voltage Vbias is applied to the inverting input terminal (-) of the comparator 122 through the resistor element R21, and the DC bias voltage Vbias is applied to the non-inverting input terminal (+) through the resistor element R20. . Then, when the input signal Si is the same as in FIG. 2 described above, the signal output from the comparator 122 becomes a square wave as shown in FIG. In FIG. 6A, pulse widths W1 and W2 correspond to half periods of a sine wave as shown in FIG. 2.

에 접속된다. 그러므로 카운터(128)의 리셋트단자

에는 도 6(c)와 같이 비교기(122)로부터 인가되는 구형파신호가 클럭신호 CLK의 반주기만큼 지연된 상태로 인가된다. 카운터(128)는 8스테이지(stage)의 2진 카운터를 사용하는 예를 든 것으로, 클럭단자에는 클럭신호 CLK가 인가된다. 이에따라 카운터(128)는 리셋트단자

에 인가되는 도 6(c)의 신호가 "하이"인 구간, 즉 도 6(a)의 펄스폭 W1 또는 W2를 카운트하고 도 6(c)의 신호가 "로우"인 구간동안 리셋트된다. 그러므로 카운터(128)의 카운트값은 도 6(d)와 같이 된다. 이러한 카운터(128)의 출력단자들(Q0∼Q7)로부터 출력되는 카운트값은 래치회로(130)에 인가되는데, 래치회로(130)의 클럭단자에는 비교기(122)로부터 출력되는 구형파신호가 인가된다. 그러므로 래치회로(130)는 도 6(a)의 구형파신호의 하강에지(falling edge)마다 카운터(128)의 카운트값을 도 6(e)와 같이 래치한다. 이와 같이 래치회로(130)에 래치되는 카운트값은 입력신호 Si의 반주기의 길이에 해당하는 값이 되므로, 이 값을 이용하면 입력신호 Si의 주파수를 검출할 수 있다. 그리고 이 카운트값이 클수록 주파수가 낮음을 나타내고 작을수록 주파수 높음을 나타낸다.The square wave signal converted as described above is applied to the counting unit 124. In the counting unit 124, the input terminal D of the D-type flip-flop 126 is connected to the output terminal of the comparator 122, and the clock terminal of the flip-flop 126 has the input signal Si as shown in FIG. The clock signal CLK of a frequency higher than the maximum frequency is applied. The output terminal Q of the flip-flop 126 is the reset terminal of the counter 128.

Is connected to. Therefore, the reset terminal of the counter 128

As shown in FIG. 6C, the square wave signal applied from the comparator 122 is applied with a delay of half a period of the clock signal CLK. The counter 128 is an example of using an eight-stage binary counter. The clock signal CLK is applied to the clock terminal. Accordingly, the counter 128 is reset terminal

6 (c) applied to is counted during the period of " high ", that is, the pulse width W1 or W2 of FIG. 6 (a) is counted and reset while the signal of FIG. 6 (c) is " low ". Therefore, the count value of the counter 128 becomes as shown in Fig. 6 (d). The count value output from the output terminals Q0 to Q7 of the counter 128 is applied to the latch circuit 130, and the square wave signal output from the comparator 122 is applied to the clock terminal of the latch circuit 130. . Therefore, the latch circuit 130 latches the count value of the counter 128 as shown in FIG. 6E for each falling edge of the square wave signal of FIG. 6A. As such, the count value latched by the latch circuit 130 becomes a value corresponding to the length of the half period of the input signal Si, so that the frequency of the input signal Si can be detected using this value. The larger the count value, the lower the frequency. The smaller the count value, the higher the frequency.

The output of the latch circuit 130 is applied to the selector 132. The selector 132 includes a plurality of frequency band determiners 134 to 138, and the frequency band determiners 134 to 136 respectively include two comparators COMP1 and COMP2 and an AND gate AND1. . The frequency band determination units 134 to 138 determine the frequency band to which the frequency of the input signal Si belongs by comparing the count value of the count unit 124 with the frequency band range values set in advance. Each of the frequency band determination units 134 to 138 is provided with one upper limit values A1 to Ak of the corresponding frequency band and one lower limit values B1 to Bk. The upper limit values A1 to Ak and lower limit values B1 to Bk are set to correspond to the count value of the counting unit 124 which may have a value according to the frequency range of the input signal Si, and the magnitude thereof is, for example, A1> B1 (= A2). )> B2 (= A3)> ......... Bk-1 (= Ak)> Bk

Then, the detection frequency band of the frequency band determination unit 134 is the lowest among the detection frequency bands of the frequency band determination units 134 to 138, and the detection frequency band of the frequency band determination unit 138 is the highest.

One of the upper limit values corresponding to the upper limit values A1 to Ak is applied to the input terminal A of the first comparator COMP1 in the frequency band determination units 134 to 138, and the latch circuit 130 outputs the latch to the other input terminal B. The count value to be applied is applied. In addition, a count value latched by the latch circuit 130 is applied to the input terminal A of the second comparator COMP2, and one lower limit value corresponding to one of the lower limit values B1 to Bk is applied to the other input terminal B. The output terminals A > B of the comparators COMP1 and COMP are connected to the input terminals of the AND gate AND1. The comparators COMP1 and COMP output the "high" signal to the output terminal A> B only when the value applied to the input terminal A is greater than the value applied to the input terminal B. Accordingly, the " high " signal is outputted only in one frequency band determination section in which the count value applied from the latch circuit 130 among the frequency band determination sections 134 to 138 is included between the frequency range value, that is, the upper limit value and the lower limit value.

The output signals of the frequency band determination units 134 to 138 are applied to the above-described ones as the switching control signals CON1 to CONn in FIG. 4. Therefore, only one switching control signal corresponding to the frequency band of the input signal Si becomes "high" among the switching control signals CON1 to CONn, and the rest becomes "low". Accordingly, when the switches SW1 to SWn of FIG. 4 described above are used as being on when the switching control signal is "high" and off when the switching control signal is "low", the first and second switches correspond to the frequency band of the input signal Si. The first and second RC time constants of the variable time constant units 112 and 114 may be selected.

If the frequency band of the input signal Si changes to a high frequency band, a "high" switching control signal is generated from the frequency band determining section in which the detection frequency band is set relatively high among the frequency band determining sections 134 to 138. As a result, one of the switches SW1 to SWn in FIG. 4 is turned on, which is connected close to the ground side. Then, the series resistance value between the connection terminal 118 and the ground becomes small, and consequently, the RC time constant becomes small. On the contrary, in the case where the frequency band of the input signal Si changes to a low frequency band, a "high" switching control signal is generated from the frequency band determining section in which the detection frequency band is set relatively low among the frequency band determining sections 134 to 138. Is generated, and accordingly, among the switches SW1 to SWn shown in FIG. 4, a switch connected to the ground of the connection terminal 118 is turned on. This increases the series resistance between the connection terminal 118 and ground, resulting in a large RC time constant.

Therefore, the detection sensitivity is changed corresponding to the frequency change of the input signal Si. That is, when the frequency band of the input signal Si is increased, the first and second RC time constants are selected to be correspondingly small, and when the frequency of the input signal Si is decreased, the first and second RC time constants are selected as large. do. Therefore, even if the frequency of the input signal changes over a wide band, the peak level can be detected accurately and quickly.

Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications can be made without departing from the scope of the present invention. In particular, in the embodiment of the present invention has been applied to the detection of the upper and lower peak level at the same time, it is also applied to detect only one of the peak level of the upper or lower. In this case, not only the differential amplifier is used but also one variable time constant is used. In addition, the variable time constant may also vary the value of the resistance elements or the combination of resistance elements and switches as necessary. In addition, although the RC time constant is shown to be varied stepwise to correspond to the change of the input signal frequency band, it may be applied to the input signal frequency change linearly. Therefore, the scope of the invention should not be defined by the described embodiments, but should be defined by the equivalent of claims and claims.

As described above, the present invention has an advantage in that the peak level can be detected accurately and quickly by changing the detection sensitivity when the frequency of the input signal changes over a wide band.

Claims (8)

A peak level detector for detecting a peak level of an input signal having a wide frequency range, A peak detector for detecting the peak level of the input signal while following a change in the level of the input signal corresponding to an RC time constant; A variable time constant unit for variably setting the RC time constant; And a variable controller for detecting a frequency band of the input signal and varying an RC time constant of the variable time constant part corresponding to the detected frequency band. The method of claim 1, wherein the variable control unit, A waveform converter for converting the input signal into a square wave signal; A counting unit for counting the pulse width of the square wave signal by a clock signal having a frequency higher than the maximum frequency of the input signal; And a selector configured to determine a frequency band of the input signal by comparing the count value of the counter with preset frequency band range values and to select an RC time constant of the variable time constant part corresponding to the frequency band. Broadband peak level detector. The wideband peak level detector of claim 1, wherein the variable controller selects the RC time constant to be inversely proportional to a high and low change in a frequency band of the input signal. The method of claim 3, wherein the variable time constant portion, A resistor element column comprising a plurality of resistor elements connected in series between a corresponding peak level detector of the peak level detector and a ground; A capacitor connected in parallel to the row of resistors; And a plurality of switches connected to both ends of each of the resistor elements and selectively switched by the variable controller to control the conductive paths between the terminals of the corresponding resistor elements, respectively. A peak level detector for detecting a peak level of an input signal having a wide frequency range, An upper peak detector for detecting an upper peak level of the input signal while following a level change of the input signal corresponding to a first RC time constant; A lower peak detector for detecting the lower peak level of the input signal while following the level change of the input signal corresponding to a second RC time constant; A differential amplifier for differentially amplifying the output signals of the upper and lower peak detectors and outputting a difference level signal between the upper and lower peak levels; First and second variable time constants for variably setting the first and second RC time constants; And a variable controller configured to detect a frequency band of the input signal and vary the first and second RC time constants of the first and second variable time constant parts to correspond to the detected frequency band. The method of claim 5, wherein the variable control unit, A waveform converter for converting the input signal into a square wave signal; A counting unit for counting the pulse width of the square wave signal by a clock signal having a frequency higher than the maximum frequency of the input signal; The frequency value of the input signal is determined by comparing the count value of the counting unit with preset frequency band range values, and the first and second variable time constants of the first and second variable time constants correspond to the frequency band. And a selection unit for selecting a 2RC time constant. The wideband peak level detector of claim 5, wherein the variable controller selects the first and second RC time constants in inverse proportion to a high and low change in a frequency band of the input signal. The method of claim 7, wherein each of the first and second variable time constant portion, A row of resistor elements comprising a plurality of resistors connected in series between corresponding peak level detectors of the upper and lower peak level detectors and ground; A capacitor connected in parallel to the row of resistors; And a plurality of switches connected to both ends of each of the resistor elements and selectively switched by the variable controller to control the conductive paths between the terminals of the corresponding resistor elements, respectively.

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