KR100265822B1 - Method for manufacturing photoresist pattern - Google Patents
Method for manufacturing photoresist pattern Download PDFInfo
- Publication number
- KR100265822B1 KR100265822B1 KR1019920026886A KR920026886A KR100265822B1 KR 100265822 B1 KR100265822 B1 KR 100265822B1 KR 1019920026886 A KR1019920026886 A KR 1019920026886A KR 920026886 A KR920026886 A KR 920026886A KR 100265822 B1 KR100265822 B1 KR 100265822B1
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- South Korea
- Prior art keywords
- photoresist pattern
- film
- photoresist
- dielectric
- oxide film
- Prior art date
Links
- 229920002120 photoresistant polymer Polymers 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 4
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 4
- 238000005530 etching Methods 0.000 abstract description 4
- 230000004888 barrier function Effects 0.000 abstract description 2
- 230000008033 biological extinction Effects 0.000 description 6
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000008034 disappearance Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
제 1 도는 종래 기술에 따른 금속배선 형성 공정 단면도.1 is a cross-sectional view of a metallization process according to the prior art.
제 2 도는 소멸 간섭을 설명하기 위한 설명도.2 is an explanatory diagram for explaining extinction interference.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 트랜지스터 2 : 절연막1: transistor 2: insulating film
3 : 금속막 4 : 포토레지스트3: metal film 4: photoresist
5 : 탑 노칭이 발생된 부분5: The part where the top notching occurred
본 발명은 고반사율을 갖는 금속막 상에 포토레지스트 패턴 형성시 발생하는 노칭(notching)을 방지할 수 있는 포토레지스트 패턴 형성 방법에 관한 것이다.The present invention relates to a method of forming a photoresist pattern capable of preventing notching generated when the photoresist pattern is formed on a metal film having a high reflectance.
제 1 도는 종래 기술에 따른 금속배선 형성 공정 단면도이다. 도면에서 1은 트랜지스터, 2는 절연막, 3은 금속막, 4는 포토레지스트, 5는 탑 노칭을 각각 나타낸다.1 is a cross-sectional view of a metal wiring forming process according to the prior art. In the figure, 1 represents a transistor, 2 represents an insulating film, 3 represents a metal film, 4 represents a photoresist, and 5 represents a top notching.
제 1 도(a)는 트랜지스터(1)를 포함한 소정의 하부층이 형성된 반도체 기판 상에 절연막(2)을 형성하고, 절연막(2)을 선택적으로 식각하여 소정의 콘택홀을 형성한 후, 금속막(3)을 증착한 것을 도시한 것이다.In FIG. 1A, an insulating film 2 is formed on a semiconductor substrate on which a predetermined lower layer including the transistor 1 is formed, a predetermined contact hole is formed by selectively etching the insulating film 2, and then a metal film is formed. (3) shows the deposition.
제 1 도(b)는 상기 금속막(3)상에 포토레지스트(4)를 도포한 것을 보이는 공정 단면도이다.FIG. 1B is a cross sectional view showing the application of the photoresist 4 onto the metal film 3.
제 1 도(c)는 알루미늄 등의 높은 반사율을 갖는 금속막 상에 도포된 포토레지스트를 노광하는 과정을 도시한 것으로, 노광시 포토레지스트 하부에 형성된 금속막으로 인하여 난반사가 일어나 마스크 상에서 차광영역으로 정의된 영역까지 노광되는 과정을 보이고 있다.FIG. 1 (c) illustrates a process of exposing a photoresist coated on a metal film having a high reflectance such as aluminum, and when the exposure occurs, diffuse reflection occurs due to the metal film formed under the photoresist, and the light shielding area is formed on the mask. The process of exposing to a defined area is shown.
제 1 도(d)는 상기와 같이 노광된 포토레지스트를 현상하여 얻어지는 감광막 패턴을 도시한 것으로, 포토레지스트 패턴에 탑(top) 노칭(5)이 발생한 것을 나타내고 있다.FIG. 1 (d) shows a photoresist pattern obtained by developing the photoresist exposed as described above, and shows that the top notching 5 has occurred in the photoresist pattern.
제 1 도(e)는 탑 노칭이 발생한 포토레지스트 패턴으로 형성된 금속배선을 도시한 것이다. 포토레지스트의 탑 노칭으로 인해 금속식각 후 금속배선에서 역시 탑 노칭이 전이되어 디바이스 특성이 불량해지는 문제점이 있다.FIG. 1E shows the metallization formed with the photoresist pattern in which the top notching occurred. Due to the top notching of the photoresist, there is a problem that the top notching is also transferred in the metal wiring after the metal etching, so that the device characteristics are poor.
상기 문제점을 해결하기 위한 본 발명은, 고반사율을 갖는 금속막에 의한 포토레지스트의 탑 노칭 발생을 방지할 수 있는 포토레지스트 패턴 형성 방법을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide a method of forming a photoresist pattern capable of preventing top notching occurrence of a photoresist by a metal film having a high reflectance.
상기 목적을 달성하기 위한 본 발명은, 기판 상부에 형성된 금속막 상에, (노광하는 빛의 파장)/(4×유전체의 굴절율) 값의 짝수배에 해당하는 두께를 갖는 유전체막을 형성하는 단계; 상기 유전체막 상에 포토레지스트를 도포하는 단계; 및 상기 포토레지스트를 노광하는 단계를 포함하는 포토레지스트 패턴 형성 방법을 제공한다.The present invention for achieving the above object, the step of forming a dielectric film having a thickness corresponding to an even multiple of the (wavelength of light to be exposed) / (refractive index of 4 × dielectric) value on the metal film formed on the substrate; Applying a photoresist on the dielectric film; And it provides a photoresist pattern forming method comprising the step of exposing the photoresist.
본 발명은 특정항 유전체 두께에서 일어나는 빛의 소멸 간섭 현상을 이용하여 포토레지스트 패턴을 형성하는 방법으로, 금속막 증착 후 실리콘 산화막(SiO2)을 형성함으로써 반사에 따른 노칭 현상을 방지한다.The present invention is a method of forming a photoresist pattern by using the disappearance interference phenomenon of light occurring at a certain thickness of the dielectric, by forming a silicon oxide film (SiO 2 ) after the deposition of a metal film to prevent the notching phenomenon due to reflection.
유전체 내에서 소멸간섭 조건은 (λ P/4)·(2n) 이고, 보강간섭 조건은 (λP/4)·(2n-1)이다. 여기서 n은 정수이며, λP = 공기중 입사파의 파장 / 굴절률이다.The extinction interference condition in the dielectric is (λ P / 4) · (2n), and the constructive interference condition is (λP / 4) · (2n-1). Where n is an integer and λ P = wavelength / refractive index of the incident wave in the air.
제 2 도에 도시한 바와 같이 금속층 상에 실리콘 산화막(SiO2)을 형성한 후 포토레지스트를 도포하여 노광공정을 실시하면 포토레지스트와 금속막 사이의 산화막에서 소멸간섭이 일어난다.As shown in FIG. 2, when the silicon oxide film (SiO 2 ) is formed on the metal layer and then the photoresist is applied to the exposure process, the extinction interference occurs in the oxide film between the photoresist and the metal film.
예를 들어, 포토레지스트 노광에 사용되는 빛의 파장이 4360Å 이고, 포토레지스트 하부에 형성된 유전체가 굴절율이 2.0 인 실리콘산화막(SiO2)일 경우 소멸간섭이 일어나는 산화막의 두께는 4360/(2·4)·(2n)=1090 Å, 2180 Å ... 이다. 본 발명은 상기와 같은 소멸간섭이론을 이용하여 고바사율을 갖는 금속막 상에 포토레지스트 패턴을 형성하여 노칭의 발생을 방지하는데 특징이 있다.For example, when the wavelength of light used for photoresist exposure is 4360, and the dielectric formed under the photoresist is a silicon oxide film (SiO 2 ) having a refractive index of 2.0, the thickness of the oxide film that causes extinction interference is 4360 / (2 · 4 ) (2n) = 1090 2, 2180 Å ... The present invention is characterized by forming a photoresist pattern on a metal film having a high Vasar Ratio using the extinction interference theory as described above to prevent the occurrence of notching.
포토레지스트 패턴 형성 후 금속막 식각 과정에서 산화막 두께가 두꺼울 경우 산화막이 장벽역할을 하기 때문에 소멸간섭이 일어나는 두께 중 가장 얇은 조건을 선택하는 것이 바람직하다. 상기 예에서는 1090 Å으로 산화막을 형성하는 것이 바람직하다.Since the oxide film acts as a barrier when the thickness of the oxide film is thick during the metal film etching process after forming the photoresist pattern, it is preferable to select the thinnest condition among the thicknesses where the extinction interference occurs. In the above example, it is preferable to form an oxide film at 1090 kPa.
상기와 같이 이루어지는 본 발명은 고반사율을 갖는 금속막 상에 형성된 포토레지스트 패턴의 노광시 발생하는 노칭을 방지하여 정확한 금속배선을 형성함으로써 디바이스 특성을 향상시킬 수 있는 효과가 있다.The present invention as described above has the effect of improving the device characteristics by preventing the notching generated during exposure of the photoresist pattern formed on the metal film having a high reflectance to form accurate metal wiring.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러가지 치환, 변형 및 변경이 가능함이 본 발명에 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope without departing from the spirit of the present invention. It will be apparent to those who have knowledge.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920026886A KR100265822B1 (en) | 1992-12-30 | 1992-12-30 | Method for manufacturing photoresist pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019920026886A KR100265822B1 (en) | 1992-12-30 | 1992-12-30 | Method for manufacturing photoresist pattern |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR940016566A KR940016566A (en) | 1994-07-23 |
| KR100265822B1 true KR100265822B1 (en) | 2000-09-15 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019920026886A KR100265822B1 (en) | 1992-12-30 | 1992-12-30 | Method for manufacturing photoresist pattern |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR100265822B1 (en) |
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1992
- 1992-12-30 KR KR1019920026886A patent/KR100265822B1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR940016566A (en) | 1994-07-23 |
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