KR100253506B1 - Atm network interfacing apparatus of ds3 trunk - Google Patents

Atm network interfacing apparatus of ds3 trunk Download PDF

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KR100253506B1
KR100253506B1 KR1019970028587A KR19970028587A KR100253506B1 KR 100253506 B1 KR100253506 B1 KR 100253506B1 KR 1019970028587 A KR1019970028587 A KR 1019970028587A KR 19970028587 A KR19970028587 A KR 19970028587A KR 100253506 B1 KR100253506 B1 KR 100253506B1
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atm
trunk
aal
demux
atm cell
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KR1019970028587A
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Korean (ko)
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KR19990004469A (en
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최승수
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김영환
현대전자산업주식회사
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/46—Interconnection of networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5603—Access techniques
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5672—Multiplexing, e.g. coding, scrambling

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

PURPOSE: A device for interfacing ATM(Asynchronous Transfer Mode) network of D3 trunk is provided to enable an ATM network to effectively use by dividing each of T1 channels from DS3 trunk and making the T1 channel to T1 unit or 64Kbps in the T1 unit. CONSTITUTION: A DS3 trunk(1) multiplexes T1 dedicated line or T1 trunk. A DS3 trunk interfacing part(2) interfaces with the DS3 trunk. A MUX/DEMUX(3) checks whether a DS3 frame is wrong, divides the D3 to 28 T1 signals, and multiplexes the inputted 28 T1 signals to the DS3 frame. An AAL 1 SAR(ATM Adaptation Layer 1 Segmentation And Reassembly) processor(4) outputs the T1 signals divided from the MUX/DEMUX(3) in form of ATM cells and restores the inputted ATM cells to the T1 signals. The first SRAM(5) manages the AAL 1 SAR processor(4). The first FIFO(First In First Out)(6) stores ATM cells transformed from the AAL 1 SAR processor(4). The second FIFO(7) stores ATM cells inputted from a back end. An ATM cell MUX/DEMUX(8) inputs the ATM cells stored in the first FIFO(6) to transmit them to the back end, and stores ATM cells inputted from the back end in the second FIFO(7). The second SRAM(9) manages the ATM cell MUX/DEMUX(8). A clock restoring part(12) is inputted Synchronous Residual Time Stamp of ATM cell outputted from the AAL 1 SAR processor(4) and restores T1 clock signal restored in the AAL 1 SAR process(4).

Description

DS3 트렁크의 비동기 전송 모드(ATM)망 정합장치Asynchronous Transfer Mode (ATM) Network Matching Device for DS3 Trunks

본 발명은 T1 전용선 또는 T1 트렁크(Trunk)를 다중화한 DS3(Digital Signal) 트렁크를 비동기 전송 모드(Asynchronous Transfer Mode ; 이하, 'ATM'이라 칭함) 셀화하여 ATM망에 접속할 수 있도록 한 DS3 트렁크의 ATM망 정합장치에 관한 것이다.The present invention provides an ATM of a DS3 trunk in which a DS3 (Digital Signal) trunk multiplexed with a T1 dedicated line or a T1 trunk is converted into an Asynchronous Transfer Mode (hereinafter, referred to as an "ATM") cell to access an ATM network. It relates to a network matching device.

일반적으로 전화, 데이터, 화상, 펙시밀리 등 다양한 전기통신 서비스를 하나의 디지털 통신망으로 종합하여 제공하는 광대역 종합 정보 통신망(B-ISDN)에서, 다양한 광대역 서비스를 통합 수용하기 위한 핵심 기술로써 가장 중요한 기술에는 ATM 기술이 있다.In general, B-ISDN, which provides a variety of telecommunication services such as telephone, data, video, and fax into a single digital communication network, is the most important technology as a core technology for integrating various broadband services. There is ATM technology.

이러한 ATM 기술은 서로 다른 별개의 서비스들을 통합하여 광대역 종합 정보 통신망에 제공하기 위해 필요한 기술로서, 다양한 통신 서비스를 제공하는 각종의 통신망을 통합하고 운용 및 관리함으로써 광대역 종합정보 통신망에 통합 통신서비스를 제공한다.This ATM technology is a technology necessary to integrate different separate services and provide them to a broadband integrated telecommunication network, and provides integrated telecommunication services to the broadband integrated telecommunication network by integrating, operating and managing various communication networks providing various communication services. do.

한편, 최근에는 ATM 기술에 의한 초고속 망으로 진화하는 단계에서 ATM망에 의한 서비스를 제공하기 위해 기존의 T1 전용선 또는 T1 트렁크를 다중화하여 DS3로 전송하는 DS3 전송라인을 ATM망에 접속할 필요가 있게 되었다.On the other hand, in recent years, it has become necessary to connect DS3 transmission lines that transmit multiplexed T1 leased lines or T1 trunks to DS3 in order to provide services by ATM network in the step of evolving into high speed network by ATM technology. .

본 발명은 상기와 같은 점을 감안하여 안출한 것으로서, 그 목적은 DS3 트렁크로부터 각각의 T1 채널을 분리한 후 T1 단위 또는 T1 내의 64Kbps 단위로 ATM 셀화하여 ATM 망과의 접속을 가능하게 함으로써 ATM망을 효율적으로 이용할 수 있도록한 DS3 트렁크의 ATM망 정합장치를 제공하는 데에 있다.The present invention has been made in view of the above, and an object thereof is to isolate each T1 channel from a DS3 trunk, and then to ATM cell by T1 unit or 64 Kbps unit within T1 to enable connection with ATM network. To provide an ATM network matching device for DS3 trunks to efficiently utilize the

이러한 목적을 달성하기 위한 본 발명의 DS3 트렁크의 ATM망 정합장치는, DS3 트렁크로부터 각각의 T1 채널을 분리하여 T1 단위 또는 T1 내의 64Kbps 단위로 ATM 셀화하고, 이어 ATM 셀을 ATM 스위치에서 사용되는 스위칭용 헤드로 변환하여 ATM망에 접속할 수 있도록 함을 특징으로 한다.The ATM network matching device of the DS3 trunk of the present invention for achieving this purpose, separates each T1 channel from the DS3 trunk into ATM cells in units of T1 or 64 Kbps within T1, and then switching the ATM cells used in the ATM switch. It is characterized in that the conversion to the head for access to the ATM network.

제1도는 본 발명에 의한 DS3 트렁크의 비동기 전송 모드(ATM)망 정합장치의 블록 구성도.1 is a block diagram of an asynchronous transmission mode (ATM) network matching device of a DS3 trunk according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

2 : DS3 트렁크 정합부 3 : 먹스/디먹스2: DS3 trunk matching unit 3: mux / demux

4 : AAL 1 SAR 프로세서 5 : 제1 SRAM4: AAL 1 SAR processor 5: 1st SRAM

6 : 제1 FIFO 7 : 제2 FIFO6: first FIFO 7: second FIFO

8 : ATM 셀 먹스/디먹스 9 : 제2 SRAM8: ATM cell mux / demux 9: second SRAM

10 : ATM 라우팅 테이블 11 : 제3 SRAM10: ATM routing table 11: third SRAM

12 : 클럭 복원부 13 : 제어부12 clock recovery unit 13 control unit

이하, 첨부된 도면을 참고하여 본 발명의 DS3 트렁크의 ATM망 정합장치의 구성 및 동작을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described in detail the configuration and operation of the ATM network matching device of the DS3 trunk of the present invention.

제1도는 본 발명에 의한 DS3 트렁크의 ATM망 정합장치의 블록 구성도로서, T1 전용선 또는 T1 트렁크를 다중화하는 DS3 트렁크(1)와의 정합기능을 수행하고 DS3의 이상 유무 및 클럭 추출 기능을 수행하는 DS3 트렁크 정합부(2)와, 상기 DS3 트렁크 정합부(2)를 통해 입력되는 DS3 프레임의 이상 유무를 검사하고 DS3를 28개의 T1 신호로 분리하며, 입력되는 28개의 T1 신호를 DS3 프레임에 다중화하는 먹스/디먹스(MUX/DEMUX)(3)와, 상기 먹스/디먹스(3)에서 분리된 T1 신호를 ATM 셀화하여 출력하고, 입력되는 ATM 셀을 T1 신호로 복원하는 AAL 1 SAR(ATM Adaptation Layer 1 Segmentation And Reassembly) 프로세서(4)와, 상기 AAL 1 SAR 프로세서(4)를 관리하기 위한 제1 SRAM(5)과, 상기 AAL 1 SAR 프로세서(4)에서 변환된 ATM 셀을 저장하기 위한 제1 FIFO(First In First Out)(6)와, 후단에서 입력되는 ATM 셀을 저장하기 위한 제2 FIFO(7)와, 상기 제1 FIFO(6)에 저장된 ATM 셀을 입력하여 후단으로 전송하고 후단에서 입력되는 ATM 셀을 상기 제2 FIFO(7)에 저장하도록 하는 ATM 셀 먹스/디먹스(8)와, 상기 ATM 셀 먹스/디먹스(8)를 관리하기 위한 제2 SRAM(9)과, 상기 ATM 셀 먹스/디먹스(8)로부터 입/출력되는 ATM 셀을 ATM 스위치(14)에서 사용하는 스위칭용 헤드로 변환하는 ATM 라우팅 테이블(Routing Table)(10)과, 상기 ATM 라우팅 테이블(10)의 헤드 변환을 위한 제3 SRAM(11)과, 상기 AAL 1 SAR 프로세서(4)에서 출력되는 ATM 셀의 동기 클럭 정보(Synchronous Residual Time Stamp)를 입력받아 AAL 1 SAR 프로세서(4)에서 복원되는 T1 신호의 클럭을 복원하는 클럭 복원부(12)와, 상기 구성 블록(2~12)의 각 동작을 제어하는 제어부(13)로 구성된다.1 is a block diagram of an ATM network matching device for a DS3 trunk according to the present invention, which performs a matching function with a DS3 trunk 1 for multiplexing a T1 dedicated line or a T1 trunk, and performs an abnormality of the DS3 and a clock extraction function. The DS3 trunk matching unit 2 and the DS3 trunk matching unit 2 check whether there is an abnormality of the DS3 frame input, separate the DS3 into 28 T1 signals, and multiplex the 28 T1 signals input into the DS3 frame. MUX / DEMUX (3) and the T1 signal separated from the MUX / DEMUX (3) are converted into ATM cells and outputted, and the AAL 1 SAR (ATM) which restores the input ATM cell to the T1 signal. Adaptation Layer 1 Segmentation And Reassembly) processor 4, a first SRAM 5 for managing the AAL 1 SAR processor 4, and an ATM cell converted by the AAL 1 SAR processor 4 for storing A first in first out (6 FIFO) 6 and an ATM cell input at a later stage; ATM cell mux / d for inputting a second FIFO 7 and an ATM cell stored in the first FIFO 6 to be transmitted to a later stage and storing the ATM cell input at a later stage in the second FIFO 7. The ATM switch 14 is configured to transfer an MUX 8, a second SRAM 9 for managing the ATM cell MUX / demux 8, and an ATM cell input / output from the ATM cell MUX / demux 8. ATM routing table (10) for converting to a switching head for use in the third), a third SRAM (11) for the head conversion of the ATM routing table 10, and the AAL 1 SAR processor (4) A clock recovery unit 12 for receiving the synchronous clock information (Synchronous Residual Time Stamp) of the ATM cell outputted from the AAL 1 SAR processor 4 and restoring the clock of the T1 signal restored by the AAL 1 SAR processor 4 and the configuration blocks 2 to 12; Control unit 13 for controlling each operation of the "

상기와 같이 구성된 본 발명에 의한 DS3 트렁크의 ATM망 정합장치의 동작을 설명하면, 먼저 T1 전용선 또는 T1 트렁크를 다중화한 DS3는 DS3 트렁크(1)를 통해 DS3 트렁크 정합부(2)에 전송된다.Referring to the operation of the ATM network matching device of the DS3 trunk configured as described above, first, DS3 multiplexed T1 dedicated line or T1 trunk is transmitted to the DS3 trunk matching unit 2 through the DS3 trunk (1).

그러면, 상기 DS3 트렁크 정합부(2)는 상기 전송된 DS3에 이상이 있는지 없는지를 판단하고 클럭을 추출한 후, 먹스/디먹스(3)에 전송한다.Then, the DS3 trunk matching unit 2 determines whether there is an abnormality in the transmitted DS3, extracts a clock, and transmits it to the mux / demux 3.

이어, 상기 DS3를 수신한 먹스/디먹스(3)는 DS3 프레임의 이상 유무를 검사하고, 상기 DS3를 28개의 T1(DS1) 신호로 분리하여 AAL 1 SAR 프로세서(4)에 전송한다.Subsequently, the mux / demux 3 receiving the DS3 checks for an abnormality of the DS3 frame, separates the DS3 into 28 T1 (DS1) signals, and transmits the DS3 to the AAL 1 SAR processor 4.

또한, 상기 먹스/디먹스(3)는 AAL 1 SAR 프로세서(4)로부터 입력되는 T1 신호 28개를 DS3 프레임에 다중화하여 DS3 트렁크 정합부(2)를 통해 DS3 트렁크(1)로 전송한다.Also, the mux / demux 3 multiplexes 28 T1 signals input from the AAL 1 SAR processor 4 into a DS3 frame and transmits the DS signals to the DS3 trunk 1 through the DS3 trunk matching unit 2.

상기와 같이 28개의 T1 신호를 수신한 AAL 1 SAR 프로세서(4)는 한개의 프로세서가 8개의 T1 라인을 각각 T1 단위로 ATM 셀화하거나 T1 내의 64Kbps단위로 ATM 셀화하여 제1 FIFO(6)의 각각 독립된 공간에 할당 저장한다.As described above, in the AAL 1 SAR processor 4 having received 28 T1 signals, one processor converts 8 T1 lines into ATM cells in T1 units or ATM cells in 64 Kbps units in T1, respectively, to each of the first FIFOs 6. Allocate and store in a separate space.

즉, AAL 1 SAR 프로세서(4)는 AAL 1 SAR 프로세서(4)내에 구성된 동기 클럭 발생부를 통해 입력되는 T1 신호의 속도의 ATM망과의 동기를 맞추고, ATM 셀 헤드 발생부를 통해 T1 신호를 ATM 셀화한다.That is, the AAL 1 SAR processor 4 synchronizes with the ATM network of the speed of the T1 signal input through the synchronous clock generator configured in the AAL 1 SAR processor 4, and converts the T1 signal into an ATM cell through the ATM cell head generator. do.

계속해서, ATM 셀 먹스/디먹스(8)는 상기 제1 FIFO(6)를 제어하여 제1 FIFO(6)에 저장된 ATM 셀을 순서적으로 입력하여 ATM 라우팅 테이블(10)에 전송한다.Subsequently, the ATM cell mux / demux 8 controls the first FIFO 6 to sequentially input ATM cells stored in the first FIFO 6 to transmit to the ATM routing table 10.

또한, 상기 ATM 셀 먹스/디먹스(8)는 ATM 라우팅 테이블(10)을 통해 입력되는 ATM 셀을 제2 FIFO(7)에 저장하도록 제어하여 상기 AAL 1 SAR 프로세서(4)가 제2 FIFO(7)에 저장된 ATM 셀을 입력하여 T1 신호로 변환하도록 한다.In addition, the ATM cell mux / demux 8 controls to store the ATM cell input through the ATM routing table 10 in the second FIFO 7 so that the AAL 1 SAR processor 4 controls the second FIFO ( Input the ATM cell stored in 7) to convert into T1 signal.

이어, 마지막으로 ATM 라우팅 테이블(10)은 상기 ATM 셀 먹스/디먹스(8)에서 입력된 ATM 셀을 ATM 스위치(14)에서 사용되는 스위칭용 헤드로 변환하여 ATM 스위치(14)에 전송한다.Finally, the ATM routing table 10 converts the ATM cell input from the ATM cell mux / demux 8 into a switching head used in the ATM switch 14 and transmits it to the ATM switch 14.

이상, 상기 설명에서와 같이 본 발명은 DS3 트렁크로부터 각각의 T1 채널을 분리하여 T1 단위 또는 T1 내의 64Kbps 단위로 ATM 셀화함으로써 ATM망과의 접속을 가능하게 함으로써 ATM망을 효율적으로 이용할 수 있게 되는 효과가 있다.As described above, the present invention can effectively use the ATM network by separating each T1 channel from the DS3 trunk and making an ATM cell by T1 unit or 64 Kbps unit within T1. There is.

Claims (1)

DS3 트렁크(1)와의 정합기능을 수행하고 DS3의 이상 유무 및 클럭 추출 기능을 수행하는 DS3 트렁크 정합부(2)와, 상기 DS3 트렁크 정합부(2)를 통해 입력되는 DS3 프레임의 이상 유무를 검사하고 DS3를 28개의 T1 신호로 분리하며, 입력되는 28개이 T1 신호를 DS3 프레임에 다중화하는 먹스/디먹스(3)와, 상기 먹스/디먹스(3)에서 분리된 T1 신호를 ATM 셀화하여 출력하고, 입력되는 ATM 셀을 T1 신호로 복원하는 AAL 1 SAR 프로세서(4)와, 상기 AAL 1 SAR 프로세서(4)를 관리하기 위한 제1 SRAM(5)과, 상기 AAL 1 SAR 프로세서(4)에서 변환된 ATM 셀을 저장하기 위한 제1 FIFO(6)와, 후단에서 입력되는 ATM 셀을 저장하기 위한 제2 FIFO(7)와, 상기 제1 FIFO(6)에 저장된 ATM셀을 입력하여 후단으로 전송하고 후단에서 입력되는 ATM 셀을 상기 제2 FIFO(7)에 저장하도록 하는 ATM 셀 먹스/디먹스(8)와, 상기 ATM 셀 먹스/디먹스(8)를 관리하기 위한 제2 SRAM(9)과, 상기 ATM 셀 먹스/디먹스(8)로 부터 입/출력되는 ATM 셀을 ATM 스위치(14)에서 사용하는 스위칭용 헤드로 변환하는 ATM 라우팅 테이블(10)과, 상기 ATM 라우팅 테이블(10)의 헤드 변환을 위한 제3 SRAM(11)과, 상기 AAL 1 SAR 프로세서(4)에서 출력되는 ATM 셀의 동기 클럭 정보를 입력받아 AAL 1 SAR 프로세서(4)에서 복원되는 T1 신호의 클럭을 복원하는 클럭 복원부(12)와, 상기 구성 블록(2~12)의 각 동작을 제어하는 제어부(13)로 구성되는 것을 특징으로 하는 DS3 트렁크의 비동기 전송 모드(ATM)망 정합장치.The DS3 trunk matching unit 2 performs a matching function with the DS3 trunk 1 and performs an abnormality and a clock extraction function of the DS3, and checks for an abnormality of the DS3 frame inputted through the DS3 trunk matching unit 2. And separates the DS3 into 28 T1 signals, 28 inputs mux / demux (3) multiplexing the T1 signal into a DS3 frame, and outputs an ATM cell of the T1 signal separated from the mux / demux (3). AAL 1 SAR processor 4 for restoring the input ATM cell to the T1 signal, a first SRAM 5 for managing the AAL 1 SAR processor 4, and the AAL 1 SAR processor 4 A first FIFO 6 for storing the converted ATM cell, a second FIFO 7 for storing an ATM cell input at a later stage, and an ATM cell stored at the first FIFO 6 are inputted to a later stage. An ATM cell mux / demux 8 for transmitting and storing an ATM cell input at a later stage in the second FIFO 7, and A Second SRAM 9 for managing TM cell mux / demux 8 and for switching using ATM cell 14 which input / output from said ATM cell mux / demux 8 in ATM switch 14 ATM routing table 10 for converting to a head, a third SRAM 11 for head conversion of the ATM routing table 10, and synchronous clock information of an ATM cell output from the AAL 1 SAR processor 4; And a clock recovery unit 12 for restoring the clock of the T1 signal restored by the AAL 1 SAR processor 4 and a control unit 13 for controlling each operation of the configuration blocks 2 to 12. Network Asynchronous Transfer Mode (ATM) network matching device for DS3 trunks.
KR1019970028587A 1997-06-28 1997-06-28 Atm network interfacing apparatus of ds3 trunk KR100253506B1 (en)

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Publication number Priority date Publication date Assignee Title
KR100450759B1 (en) * 2002-01-25 2004-10-01 한국전자통신연구원 A method and an apparatus for transmitting/receiving Leased Line Data

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KR100437531B1 (en) * 2001-09-24 2004-06-30 엘지전자 주식회사 Interfacing Apparatus For High Speed Cell In ATM Switching System

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100450759B1 (en) * 2002-01-25 2004-10-01 한국전자통신연구원 A method and an apparatus for transmitting/receiving Leased Line Data

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