KR0153933B1 - Cell assembling/disassembling apparatus for constant rate service - Google Patents

Abstract

The present invention relates to a cell assembly / disassembly device for a fixed speed service interworking in an asynchronous transfer mode (ATM) switching system, the current state of development of ATM cell assembly / disassembly is mainly developed in a terminal device such as a broadband terminal adapter However, since it supports only one or two connections, it is not suitable to be applied to an exchange system that accommodates a large number of subscribers. However, the cell assembly / decomposer of the present invention supports basic 256 connections for the purpose of application in an exchange system. In addition, it is easy to expand the capacity by adding the module unit.

Description

Cell assembly / disassembly device for fixed speed service interworking in asynchronous transfer mode (ATM) exchange system

1 is a configuration diagram of an ATM exchange system belonging to the cell assembly / disassembly of the present invention,

2 is a block diagram of a subhighware in a PSTN matching device to which the present invention belongs;

3 is a cell structure diagram of an ATM switching system to which the present invention belongs;

4 is a functional diagram of the ATM linkage unit belonging to the present invention,

5 is a functional configuration diagram of the cell assembly / disassembler of the present invention,

6 is a timing diagram of a multiplexer of a cell assembly / decomposer of the present invention;

7 is a timing diagram of the demultiplexer of the cell assembly / decomposer of the present invention.

* Explanation of symbols for main parts of the drawings

23: sub highway interface 24: clock selector

25: multiplexer 26: cell assembly unit

27: memory for cell assembly 28: FIFO for cell reception

29: cell decomposition unit 30: cell decomposition memory

31: demultiplexer 32: VME bus interface

33: local loopback control

The present invention relates to a cell assembly / disassembly device for fixed speed service interworking in an asynchronous transfer mode (ATM) exchange system.

The existing Public Switched Telephone Network (PSTN), which was based on voice services, provides integrated voice and data services such as data transmission due to the rapid development of telecommunication technology and various service needs of users. It has evolved into an Integrated Services Digital Network (ISDN), and the service for the narrow-band ISDN (N-ISDN) is in progress. However, N-ISDN is limited to the narrowband communication service of 64Kbps or less for the conventional voice and data. As a result of recent advances in computer, semiconductor, optical communication, etc. It is inadequate to provide data transmission services and lacks adaptability and flexibility to meet the needs of various new types of services in the future, including multimedia. Broadband-ISDN (ATM), which uses Asynchronous Transfer Mode (ATM) as a transport and exchange technique, aims to accommodate all services that can exist in future networks, such as telephones, data terminals, facsimile and teletex. N-ISDN services as well as broadband services such as video telephony and conferencing, high-speed data transmission, CATV and HDTV distribution are provided.

Therefore, B-ISDN can be regarded as a communication network that has been expanded to provide various broadband services based on the existing N-ISDN. In the process of integrating and developing existing public telecommunication networks into B-ISDN, interworking between the existing network and the newly constructed network is inevitably necessary due to economic efficiency and efficiency. The interworking function between the ATM network and the existing network mainly includes a matching function between user data and an interworking function between signaling methods. The matching function of user data is based on the synchronous delivery mode (delivering user information using timeslots in time-division multiplexed frames). It is necessary for connection with ATM network using forwarding, and interworking between signaling methods is necessary for protocol matching between different subscribers or stations.

An object of the present invention relates to a cell assembly / decomposer which is inevitably required in configuring a matching device for accommodating an existing PSTN subscriber in an ATM switching system under development as a network node of a B-ISDN. Provides cell assembly / decomposition device for fixed speed service interworking in asynchronous transfer mode (ATM) exchange system that assembles 64Kbps fixed speed data into ATM cell, and decomposes received ATM cell and converts it into 64Kbps fixed speed data. There is.

In order to achieve the above object, the present invention provides a cell assembly / decomposition apparatus for an ATM switching system, comprising: subhighway interface means for performing line interfaces for eight input / output subhighways; Clock selection means for receiving two pairs of clock and frame synchronization signals from the outside through the sub highway interface means, monitoring clock states to select and output one clock and frame synchronization signal; Multiplexing means connected to said clock selecting means for multiplexing eight serial subhighway data from said subhighway interface means into an 8-bit parallel data stream; Cell assembly means for receiving the parallel timeslot data inputted from the multiplexing means and assembling the channel data for a valid channel to which a current connection is established and transmitting the data to an external ATM switch interface; A cell assembly memory means connected to the cell assembly means for storing control information necessary for cell assembly and channel data being assembled for transmission; A cell reception first-in first-out memory means for temporarily storing an ATM cell received from the ATM switch interface; Local loopback means for causing a control signal and cell data output from the cell assembly means to be input to the cell reception first-in first-out memory means when a local loopback mode is designated; Read the cell stored in the cell first-in first-out memory means to find the subhighway channel corresponding to the VPI (Virtual Path Identifier) / VCI (Virtrual Channel Identifier) for cell identification in the cell header and pay for the cell in the buffer allocated for the channel. Cell decomposition means for storing load data and transmitting the stored data in octet units according to a corresponding channel timing; Cell decomposing memory means connected to said cell decomposing means for storing control information necessary for cell decomposing and channel data being decomposed for transmission; Demultiplexing means for receiving 8-bit parallel data from the cell decomposing means and demultiplexing by subhighways, and then transmitting the demultiplexed serial bit stream to 8 subhighways; And receiving connection setting / release information, switch routing information, and other control information necessary for cell assembly / disassembly from an external interlocking control and transmitting the same to the cell assembly means and cell disassembling means for the cell assembly memory means and cell disassembly. And a VME interface means for storing in the memory means and collecting state information and statistical information of the cell assembling means and the cell disassembling means and transferring the state information and statistical information to the interlocking control unit via the VME bus.

Hereinafter, the present invention with reference to the accompanying drawings in detail as follows.

1 is a system configuration diagram to which the present invention is applied, and the entire system is composed of an ATM subscriber matching device 1, an ATM switch device 2, and a PSTN subscriber matching device 3. As shown in FIG. The ATM subscriber matching device 1 is composed of an ATM subscriber interface unit 4, an ATM local switch 5, and an ATM control unit 6 that is responsible for ATM call processing function and operation maintenance in the matching site.

The ATM switch device 2 is composed of an ATM switch 7 for providing a cell exchange function between subscriber matching devices and a system control unit 8 for operating and maintaining the entire system.

The PSTN subscriber registration device 3 includes a PSTN subscriber unit 9 that provides a PS multi-line connection function, a time switch unit 10 that provides a time slot exchange function, a call signal supply, conference call, and recording guide service to a subscriber line. Signal and service unit 11 for providing functions, PSTN control unit 12 which is in charge of overall control of PSTN subscriber registration device and format conversion between time slot data and ATM cell, PSTN control unit 12 and ATM control unit 6 It consists of an ATM interworking unit 13 for performing an interprocessor message format conversion function.

The ATM interworking unit 13 is connected to the ATM local switch 5 in the ATM subscriber matching device and the IMI (Inter Module Interface) which is a standard interface between modules of the ATM switching system.

Looking at the matching process of the user data on the basis of the above system configuration diagram as follows.

The PSTN subscriber information (voice, data) is a subhighway, which is a channelized interface coded by PCM (Pulse Code Modulation) in the PSTN subscriber unit 9, where the subhighway is a 2.948Mbps serial I / O composed of 32 64 Kbps channels. The bit stream) to the time switch unit 10.

The channel configuration on the subhighway is shown in FIG. Subscriber information exchanged with time slot (channel) through time switch is loaded on the output subhighway, and the ATM interlocking unit collects time slot data inputted one octet per channel every 125us and transmits to ATM switch by configuring ATM cell for each channel. do. The structure of the cell transmitted to the ATM switch is shown in FIG.

In the cell structure of FIG. 3, a routing tag is used for self-routing of a cell in an ATM switch, and an ATM cell header provides information for connection identification (VPI / VCI). Definitions of terms used in the drawings are as follows.

C denotes cell loss priority, GFC denotes flow control once, PT denotes payload type, HEC denotes header error control, VPI denotes virtual connection identifier, and VCI denotes virtual channel identifier.

4 is a functional configuration diagram of an ATM interlocking unit. The ATM interlocking unit is composed of a cell assembly / decomposing unit 14, an ATM switch interface unit 15, an interlocking control unit 16, and a clock generator 17.

The cell assembly / disassembly unit 14 provides a subhighway interface with the time switch unit 10 and provides cell assembly / disassembly function of ATM adaptation layer type 1. The ATM switch interface unit 15 receives and multiplexes the user cell from the cell assembly / decomposition unit 14 and the inter-processor message cell from the interlocking control unit 16 and transmits the multiplexed message to the IMI which is an ATM switch interface. It is responsible for demultiplexing the cell received from 18) and disassembling it to the cell assembly / disassembly unit or interlock controller.

The interlocking control unit 16 is responsible for the communication function with the PSTN control unit 12 through the common bus 20 interface, and controls the cell assembly disassembly unit 14 and the ATM switch interface unit 15 through the VME bus, and the PSTN control unit. A message matching function is provided between the 9 and the ATM control unit 6. The clock generator 17 generates the PSTN system clock 22 required for PSTN matching from the ATM system clock from the ATM subscriber matching device 1 and supplies it to the time switch unit 10.

5 is a functional configuration diagram of the cell assembly / decomposer according to the present invention. The subhighway interface unit 23, the clock selector 24, the multiplexer 25, the cell assembly 26, and the cell assembly memory 27 ), A cell reception FIFO 28, a cell decomposition unit 29, a cell decomposition memory 30, a demultiplexer 31, a VME interface unit 32, and a locale loop back unit 33.

The subhighway interface unit 23 provides a line interface function for eight input / output subhighways. The clock selector 23 receives two pairs of clock and frame synchronization signals from the time switch, monitors the clock state, and selects one clock and frame synchronization signal to the multiplexer 25 and the demultiplexer 31. Supply.

The multiplexer 25 multiplexes 8 serial subhighway data into an 8-bit parallel data stream and transmits the same to the cell assembly unit 26 as shown in FIG. 6. The cell assembly unit 26 receives parallel tielot data input from the multiplexer and collects 47 channel octets of payload number of ATM adaptation layer type 1 for the valid channel to which the current connection is established. The routing tag for routing, the ATM cell header information, and the header of the ATM adaptation layer type 1 are assembled into the cell structure of FIG. 3 and transmitted to the ATM switch interface unit 15. The cell assembly memory 27 stores control information (connection setting information, cell header information, ATM switch routing information, etc.) necessary for cell assembly and channel data being assembled for transmission. The cell reception FIFO 28 temporarily stores the ATM cell received from the ATM switch interface unit 15. When the local loopback mode is specified from the VME bus interface unit 32, the control signal and cell data output from the cell assembly unit 26 are input to the cell reception FIFO 28 by the local loop back unit 33.

The cell decomposition unit 29 reads a cell stored in the cell reception FIFO 28 and finds a subhighway channel corresponding to a VPI (Vitrual Path Identifier) / VCI (Vitrual Channel Identifier) for identifying a connection in the cell header and allocates the corresponding channel for the corresponding channel. The payload data of the cell is stored in the buffer, and the demultiplexer 31 transmits the stored data in octet units according to the channel timing. The demultiplexer 31 receives 8-bit parallel data from the cell decomposition unit 29 and demultiplexes the sub-highways by sub-highway as shown in the demultiplexer timing diagram of FIG. 7, and then demultiplexes the serialized serial bit stream into 8 sub-highways. send. The VME interface unit 32 receives the connection setting / release information, switch routing information, and other control information necessary for cell assembly / disassembly from the interlocking control unit 16 to the cell assembly unit 26 and the cell disassembling unit 29. Transferring is to be stored in the cell assembly memory 27 and the cell decomposition memory (30). In addition, the VME interface unit 32 collects various state information and statistical information of the cell assembly unit 26 and the cell disassembly unit 29 and transmits them to the interworking control unit 16 through the VME bus.

As described above, the present invention is mainly developed in terminal devices such as broadband terminator adapters in view of the development status of ATM cell assembly / decomposer, but it supports only one or two connections, so it can accommodate large subscribers. Although not suitable for application, the cell assembly / decomposer of the present invention supports the basic 256 connections for the purpose of application in the exchange system and has the effect of facilitating the capacity expansion by adding the module unit.

Claims (1)

A cell assembly / decomposition apparatus applied to an ATM switching system, comprising: subhighway interface means (23) for performing line interfaces for eight input / output subhighways; Clock selection means (24) for receiving two pairs of clock and frame synchronization signals from the outside through the sub highway interface means (23), monitoring a clock state, and selecting and outputting one clock and frame synchronization signal; Multiplexing means (25) connected to said clock selecting means (24) for multiplexing eight serial subhighway data from said sub highway interface means (23) into an 8-bit parallel data stream; Cell assembly means (26) for receiving the parallel timeslot data input from the multiplexing means (25) and assembling the corresponding channel data for a valid channel to which a current connection is established and transmitting it to an external switch interface; A cell assembly memory means 27 connected to the cell assembly means 26 for storing control information necessary for cell assembly and channel data being assembled for transmission; A cell reception first-in first-out memory means (28) for temporarily storing an ATM cell received from the ATM switch interface; A locale loopback means 33 for causing a control signal and cell data outputted from the cell assembly means 26 to be inputted into the cell reception first-in first-out memory means 28 when a locale loopback mode is designated; Read a cell stored in the cell reception first-in first-out memory means 28 to find a subhighway channel corresponding to a connection path identification virtual path identifier (VPI) / VCI (Vitrual Channel Indetifier) in a cell header, and to a buffer allocated for the channel. Cell decomposition means 29 for storing the payload data of the cell and transmitting the stored data in octet units according to a corresponding channel timing; A cell decomposition memory means (30) connected to said cell decomposition means (29) for storing control information necessary for cell decomposition and channel data in decomposition for transmission; Demultiplexing means (31) for receiving 8-bit parallel data from the cell decomposing means (29), demultiplexing by subhighways, and then transmitting the demultiplexed serial bit stream to 8 subhighways; And receiving connection setting / release information, switch routing information, and other control information necessary for cell assembly / disassembly from an external interlocking control unit, and transmitting the same to the cell assembling means 26 and the cell disassembling means 29 for the cell assembly. And the state information and statistical information of the cell assembly means 26 and the cell disassembling means 29 to be stored in the memory means 27 and the cell disassembly memory means 30 to the interlocking control unit through the VME bus. Cell assembly / disassembly device for fixed speed service interworking in the asynchronous transfer mode (ATM) switching system, characterized in that it comprises a VME interface means for transmitting.