KR100248652B1 - A circuit for transforming of phase signal in ofdm receiving system - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an OFDM system. In particular, an OFDM signal is transmitted by IFFT transforming only an information signal without inserting a synchronization signal and transmitting an OFDM transmission signal. The present invention relates to a phase signal conversion circuit of a system, comprising: a linearizer (80) for converting a phase value having a nonlinear distribution obtained from a phase extractor into a phase value having a linear distribution; It consists of an inversion processing unit 85 that inverts the sign of the linearized phase value for every clock, and performs non-linear signal through the phase extraction unit in order to obtain phase synchronization by OFDM processing only information data without inserting a synchronization signal. By linearizing, the number of bits can be reduced in hardware configuration, and the linearized signal can be inverted every clock to be conveniently used as an input of an early late gate or another circuit to synchronize.

Description

Phase Signal Conversion Circuit in OFDM Receiver System

The present invention relates to an orthogonal frequency division multiplexing (OFDM). In particular, the present invention relates to OFDM by inverse fast fourier transform (IFFT) without inserting a synchronization signal separately. The present invention relates to a phase signal conversion circuit of an ODFM receiving system that transmits a transmission signal and performs fast Fourier transform (hereinafter referred to as FFT) in a receiving system, and then detects phase synchronization.

In general, a transmission signal of a high definition television (HDTV) of a terrestrial simultaneous broadcasting method uses radio waves in a VHF / UHF band having strong straightness. Therefore, multipath transmission occurs in which not only the direct wave from the transmitting side reaches the receiving side but also the delayed reflected wave by the surrounding buildings or the like. In particular, as the delay time of the reflected wave is larger than the transmission period of the symbol, interference between adjacent symbols occurs more severely. Such interference between symbols is known to greatly increase the detection error rate during decoding. Thus, various studies have been made to prevent the interference between symbols. The contents are divided into the following two types. The first method is to increase the symbol period in the time domain to deviate from the interference, and the second method is a method for appropriate channel compensation in the transmitter or receiver. In the former case, the hardware configuration is simple, but the symbol rate is reduced. In the case of digital HDTV broadcasting requiring a high rate, such a method is difficult to apply. On the other hand, in the latter case, the system configuration can be performed without reducing the transmission rate, but there is a disadvantage in that a complicated channel equalizer must be used at the receiving side.

By taking advantage of this method, it is proposed that the orthogonal frequency division multiplexing (OFDM) is proposed as a modulation technique that does not reduce the transmission rate and is less affected by multipath transmission. The OFDM method converts a serially input symbol string into a parallel form of N blocks, modulates each element symbol into a carrier having mutual orthogonality, and then adds and transmits each element symbol. Therefore, several symbols are transmitted at the same time, thereby increasing the symbol period. The signal period of OFDM may be increased by the subchannel through which symbols are transmitted, thereby reducing interference between symbols in multipath transmission with delayed signals. However, since the OFDM method uses a plurality of subcarriers to increase the symbol period, the demodulation of the OFDM signal is performed for each subchannel. Therefore, as the number of subchannels increases, the structure of the receiver becomes more complicated than the conventional single carrier method, and a technique for simplifying the OFDM receiver structure is very important.

On the other hand, in view of the advantages of the OFDM scheme, the use of multi-carrier can increase the symbol transmission time, which is relatively insensitive to the interference signal by the multi-path, there is little performance degradation for long time echo signal (echo signal) . In addition, the existing signal has a strong property, so there is little influence on co-channel interference, and due to this characteristic it is possible to form a single frequency network (SFN). Here, the SFN means that one broadcast broadcasts the whole country on one frequency, and in this case, co-channel interference becomes severe. Therefore, since OFDM is strong in the environment on the same channel, if the SFN network is configured, limited frequency resources can be efficiently used. In addition, OFDM can increase the bandwidth efficiency by making the spectrum of a signal closer to a square compared to conventional digital modulation techniques. This is because the transmission rate of the modulated data is relatively low, so that the spectrum of the signal modulated by each carrier has a very narrow transition bandwidth, and the OFDM signal added thereto can also maintain a narrow transition bandwidth.

As described above, since the OFDM scheme modulates each parallel channel and then transmits the sum signal, independent subcarriers are needed as many as parallel channels, and the subcarriers maintain mutual orthogonality in the frequency domain. Mutual motivation must be achieved. Thus, in the implementation of an OFDM transceiver, an increase in the number of parallel subchannels causes an increase in the hardware complexity of the OFDM transceiver.

However, if the system is digitized, such a decoding process can be implemented in one fast Fourier transform (FFT) structure, so hardware can be easily implemented. Recently, the digital modulation OFDM method has been adopted for European digital audio broadcasting and terrestrial. It was adopted as a transmission method of broadcasting high definition television.

Here, the OFDM scheme is as follows. 1 is a conceptual diagram illustrating the OFDM modulation principle, wherein a transmitting end is composed of a serial-to-parallel converter 1, a fast Fourier inverse transform chip (IFFT) 2, and a parallel-to-parallel converter 3. N represents the number of carriers. When the transmission data is serially input, the serial-to-parallel converter 1 converts the data into parallel data. The parallel data is input to the IFFT 2 to perform inverse Fourier transform, and the IFFT signal is serially transmitted through the parallel-to-serial converter. Is converted and transmitted. Here, a guard interval is inserted between successive symbols to remove intersymbol interference by multiple paths.

FIG. 2 is a block diagram of an OFDM modulator. The basic theory of OFDM modulation is to add a narrowband signal orthogonal to each other and to look like one signal in the time domain. To give a complex QAM signal to each single carrier, serial data of Ts length is divided into N signals in the time domain. Each signal forms one complex signal and is modulated by each carrier. That is, during QAM modulation, each complex symbol ai inputted in series is parallelized to N stages, multiplied by signals perpendicular to each other, and is represented by Equation 1 below.

[Equation 1]

Here, T _A is a sampling period of a complex carrier. If the carrier signals are orthogonal to each other, Equation 2 is satisfied.

[Equation 2]

Therefore, in consideration of this, the sum signal is expressed by Equation 3 below.

[Equation 3]

The sum of the symbol length T _S and the sampling period T _A are selected to satisfy the condition of the following Equation 4.

[Equation 4]

Therefore, finally, the sum signal of the following equation (5) is obtained.

[Equation 5]

Looking at Equation 5, it can be seen that the equation, such as N point IFFT. Thus, OFDM modulation can be simply implemented by IFFT.

FIG. 3 is a diagram illustrating a time-domain change of an OFDM-applied signal. When the OFDM signal is examined in the time-domain, a transmission time of each symbol is transmitted as a subcarrier because N symbol signals sent by a single carrier are loaded on N carriers. ) Will increase by the total number (N). This increase in symbol time is strong in the multipath, but it is difficult to implement the hardware of the receiver because N carriers must be used. However, as noted earlier, the signal modulated by the IFFT can be simply demodulated using the FFT.

FIG. 4 is a diagram illustrating a frequency domain change of an OFDM signal, and when the OFDM signal is viewed in the frequency domain, respective carrier components are summed to show smooth frequency characteristics, and very sharp in the sideband.

On the other hand, even in an OFDM system, since the original information is restored by IFFT transforming N symbols in one block unit and transmitted in block units and FFT transforming the same block at the receiving side, the synchronization of a block must be accurately detected. Therefore, in the conventional synchronization detection method, since a synchronization signal is inserted in each block and transmitted together with the information signal, there is a problem of causing a waste of resources required for channel and system implementation due to a significant subchannel occupied by the synchronization signal. In order to solve this problem, the present inventors have proposed a phase extraction apparatus capable of detecting synchronization using characteristics of an OFDM signal by modulating only valid data without inserting a synchronization signal. The proposed phase extraction apparatus takes advantage of the fact that if the synchronization is correct, the FFT transformed signal has only ± 1 ± j. In other words, the FFT-converted N complex symbols are input in parallel every clock to obtain the absolute value of each symbol to obtain the difference between the symbols of the previous block and the current block, and output the sum of all the difference values. If the sum is '0', the synchronization is correct, otherwise the synchronization is out of order. However, the output signal of such a phase extraction apparatus is somewhat inconvenient to acquire synchronization, and there is a problem that the synchronization acquisition circuit is not simple.

Accordingly, the present invention has been made to solve the above problems, and the present invention converts a phase extraction distribution of an OFDM modulated signal using only valid data without inserting a synchronization signal, thereby converting the signal into a convenient signal for synchronization. It is an object of the present invention to provide a phase signal conversion apparatus of an OFDM receiving system.

In order to achieve the above object, the present invention provides a non-linear distribution obtained from a phase extraction unit in converting a signal obtained from a phase extraction apparatus after FFT processing a modulated OFDM received signal without inserting a block unit synchronization signal. A linearizer for converting a phase value having a phase value into a phase value having a linear distribution; And an inversion processing unit for inverting the sign of each linearized phase value.

1 is a conceptual diagram illustrating a modulation principle of an orthogonal frequency division multiplexing (OFDM) system;

2 is a block diagram of an OFDM modulator,

3 is a view illustrating a time domain change of a signal to which OFDM is applied;

4 is a view showing a frequency domain change of a signal to which OFDM is applied;

5 is a block diagram of an OFDM receiver,

6 is a graph showing a phase signal distribution output from a conventional phase extraction unit;

7 is a block diagram of an OFDM receiver including a phase signal conversion circuit according to the present invention;

FIG. 8 is a diagram of the phase signal conversion circuit of FIG. 7.

Explanation of symbols on the main parts of the drawings

80: linearization unit 80-1, 80-4: adder

80-2: Square Root Processor 80-3: Multiplier

85: inversion processing unit 85-1: multiplexer

85-2: Multiplier 85-3: Exclusive logic gate

85-4: D flip flop

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

First, to help understand the present invention, a method of decoding an OFDM signal will be described. If the complex symbol a _{i, j} is a symbol transmitted from the i th block to the j th subchannel, the OFDM transmission signal Si (t) of the i th block may be expressed as in Equation 6 below.

[Equation 6]

Here, N is the number of subchannels in OFDM, and Tsym represents a period of one block. When the transmission signal is demodulated, the symbols a _{i, j} are detected from Equation 1 from Equation 1 using the orthogonality of each subcarrier.

[Equation 7]

As shown in Equation 7, it is complicated because the OFDM receiver generates a subcarrier for each subchannel and then decodes the result by performing multiplication and integration operation. However, when the OFDM reception signal is sampled and the decoding process of Equation 7 is performed by the digital technique, the integral operation can be eliminated and the number of multiplication operations can be reduced. Here, the detection of the symbol a _{i, j} with the sampling period Tsym / N is shown in Equation 8 below.

[Equation 8]

As can be seen from Equation (8), if the OFDM received signal is sampled and then DFT transformed, the transmission symbol can be decoded. Therefore, the implementation of the receiver using the FFT chip can reduce the multiplication operation in the reception process, and also maintain the orthogonality of each subcarrier.

FIG. 5 is a block diagram of a general orthogonal frequency division multiplexing receiving system, and the OFDM receiving system is composed of a serial to parallel converter 5, an FFT chip 6, and a parallel to serial converter 7.

The serial-to-parallel converter 5 receives the OFDM reception signal input as a bit stream and outputs 2N bits in parallel. The FFT chip 6 converts the first input bit into a real component and the second input bit. N complex symbols composed of imaginary components and composed of one complex symbol are Fourier-transformed and output, and the parallel-to-serial converter 7 receives N complex symbols inversely Fourier-transformed in parallel and outputs them in series. do.

Next, the principle of synchronous detection of an OFDM signal, which is the core of the present invention, will be described. An information signal whose signal size is +1 or -1 at the transmitting side forms N complex symbols and IFFTs the transmitted block. You get an information signal. However, when the receiving side performs FFT processing by considering a block other than the first symbol of the time slot, a signal having a size other than the original information signal size +1 or -1 is obtained. As described above, if the magnitude of the correctly restored information signal is +1 or -1, the absolute value of two symbols is obtained for each block interval, and if the difference is "0", the currently restored signal can be regarded as correct. It can be expressed as 9.

[Equation 9]

In Equation 9, Re _{i, j} is a real component of the j-th symbol of the i-th block, Im _{i, j} is an imaginary component of the j-th symbol of the i-th block, Re _{i-1, j} is i-1 The real component of the j-th symbol of the block, and Im _{i-1, j} is the imaginary component of the j-th symbol of the i-1th block.

If the noise component mixed with the received symbol has a Gaussian distribution, the average of the Gaussian distribution becomes "0", so that it can be expressed as a discrete sum as shown in Equation (9). If the value is restored from the correct synchronization and has a value of +1 or -1, PS is extracted from the jth symbol of the i block and the jth symbol of the i-1 block to obtain the absolute value of each symbol, and then add the difference. The value will be "0", and it is clear that the PS value is not "0" if out of sync. Therefore, by inserting the phase detection circuit to which the equation (9) is applied to the rear end of the FFT and tracking the sum value PS, the degree of synchronization can be known and can be corrected.

Here, looking at the distribution of the sum value of the phase extraction circuit, as shown in Figure 6, when the block is composed of N symbols, when the synchronization is set to the same block as the block on the transmitting side, the sum value Is '0'. However, due to synchronization mismatch, the receiver has an A value when the N / 4 symbol leaves the symbol, has a B value that is the highest when the N / 2 symbol escapes, and a C value when the NN symbol leaves the 3N / 4 symbol. In other words, it keeps increasing until it leaves the N / 2 symbol of the block and then gets the highest value when it is out of the N / 2 symbol, and decreases again when it is out of the block, and it is easy to catch because it always has a positive value. Did.

The block diagram of the OFDM receiver to which the phase signal conversion circuit which solved this is shown in FIG. As shown in FIG. 7, a series-parallel converter 70, an FFT chip 72, a phase extractor 74, and a signal converter 76 are included. A phase signal PS having a distribution equal to 6 is outputted. The signal converter 76 receiving the phase signal has a function of converting the signal into a convenient signal for obtaining synchronization by shifting the phase by 180 ° every clock and inverting and outputting the signal.

8 is a circuit diagram of the phase signal conversion device of the present invention, wherein the phase signal conversion device includes a linearization unit 80 and an inversion processing unit 85. The linearizer 80 converts the nonlinear distribution, which is the phase value shown in FIG. 7, into a phase value having a linear distribution, and the inversion processor 85 inverts the sign of the linearized phase value for each block. Role.

Here, the linearization process will be described using an elliptic formula.

As the above-mentioned semi-elliptical curve cycle to the block length N phase signal (PS) distribution in Figure 6, the center is (2 / N, 0) which indicates the non-linear distributions, where the x ₁ axis 2 / N value, If a 'and the y _1- axis value of the semi-elliptic curve PS when x ₁ = a are b, the following equation (10) can be obtained.

[Equation 10]

이고, x₁=a 부터 x₁=N 까지의 직선 방정식은

이다. 여기서, 상기 수학식 10의 (ii)식에 두 직선의 방정식을 대입해 주면, 반 타원 곡선을 직선으로 선형화 할 수 있으며, 그때의 직선 방정식은 하기 수학식 11과 같다.And the linear equation from x ₁ = 0 to x ₁ = a is

Where the linear equation from x ₁ = a to x ₁ = N

to be. Here, by substituting the equation of two straight lines into the equation (ii) of Equation 10, the semi-elliptic curve can be linearized into a straight line, and the straight line equation at that time is as shown in Equation 11 below.

[Equation 11]

값이 바로 비선형 위상값이며, 이 값은 상기 위상 추출부로부터 제공된 위상값(PS)에 해당한다. 비선형 위상값

을 상기 수학식 11을 통해 얻은

값이 바로 선형화된 위상값이다.In Equation 11

The value is a nonlinear phase value, and this value corresponds to the phase value PS provided from the phase extraction section. Nonlinear Phase Value

Obtained through Equation 11

The value is the linearized phase value.

As shown in FIG. 8, the linearizer 80 applies two adders 80-1, a square root processor 80-2, and a multiplier to convert the nonlinear phase values into linear phase values by applying Equation 11 above. 80-3). In addition, the values provided as operands of each hardware are constant values obtained as a result of the simulation. The signal value output from the last stage adder 80-4 of the linearization unit 80 is a linearized phase value. The distribution forms a triangular wave with a block length, and always has a positive value. Therefore, the inversion processing unit 85 is connected to invert the signal value at every cycle so as to convert the phase to facilitate synchronization.

Now, the inversion processor 85 receives the multiplexer 85-1 alternately outputting '1' or '-1' every clock, and the linearized phase value of the linearizer 80, and receives the multiplexer. And a multiplier 85-2 that receives the output value of (85-1), multiplies, and inverts the phase by 180 degrees for each clock.

And an exclusive logic gate 85-3 and a delay register 85-4 for providing a control signal of the multiplexer 85-1. The exclusive logic gate 85-3 exclusively combines the clock signal and the output of the previous delay register 85-4 and outputs the exclusive logic gate to the delay register 85-4. The delay register 85-4 is configured as a D flip-flop, and delays the input signal by one clock to feed back to the exclusive logic gate 85-3. In this way, the delay register 85-4 alternately outputs '1' and '0' for each clock, and the multiplexer 85-1 receiving the '1' and '0' as a control signal receives the output signal. According to the control signal, '1' and '-1' are alternately outputted every clock.

Therefore, the linearized signal having only the positive value input to the multiplier 85-2 is multiplied by the output value of the multiplexer to convert the positive value and the negative value alternately every clock.

Although the invention has been described herein only in connection with specific embodiments, those skilled in the art will be able to make various modifications without departing from the spirit and scope of the invention as defined in the following claims.

As described above, in order to obtain phase synchronization by OFDM processing only the information data without inserting the synchronization signal, the nonlinear signal passed through the phase extraction unit can be linearized to reduce the number of bits in hardware configuration, There is an effect that it can be conveniently used as an input to an early late gate or another circuit to be synchronized by inverting each clock.

Claims (3)

Orthogonal frequency division multiplexing (OFFT) for transmitting only the information signal by performing fast Fourier inverse transform (IFFT) and detecting the synchronization using the fast Fourier transform (FFT) signal in the receiving system. In the system, A linearizer 80 for converting a phase value having a non-linear distribution obtained from the phase extractor into a phase value having a linear distribution; And An inversion processor 85 for inverting the sign of each linearized phase value; The linearization unit 80 is an equation

It is characterized by consisting of two adders (80-1), a square root processor (80-2) and a multiplier (80-3) for converting the non-linear phase value (y ₁ ) to a linear phase value (y) by applying A phase signal conversion circuit of an OFDM receiving system. 2. The apparatus of claim 1, wherein the inversion processor (85) comprises: a multiplexer (85-1) for alternately outputting '1' or '-1' every clock; And a multiplier 85-2 that receives the linearized phase value of the linearization unit 80, multiplies the output value of the multiplexer 85-1, and inverts the phase by 180 ° for each clock. And a phase signal conversion circuit of an OFDM receiving system. 3. The logic circuit of claim 2, wherein the inversion processor (85) comprises: an exclusive logic gate (85-3) for exclusively adding a clock signal and a previous output; And a delay register (85-4) for receiving a signal output from the OR gate (85-3) and delaying the feedback signal back to the exclusive logic gate (85-3). Phase signal conversion circuit of an OFDM receiving system.

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