KR100229373B1 - Method and device for evaluating the throughput of virtual circuits employing a time division multiplexed transmission channel - Google Patents

Abstract

The present invention relates to the use of a memory (MCT) assigned a storage location to each virtual circuit for transferring cells, the storage location comprising a context (CT) defining an evaluation condition for measuring the throughput of the virtual circuit. In order to evaluate the throughput of the virtual circuit, upon receipt of each cell, a context related to the virtual circuit belonging to the cell is provided. The present invention also provides a clock signal BC used to provide a current time associated with the virtual circuit.

An indication of the start time is written into the context CT for any virtual circuit, upon receipt of the next cell of the virtual circuit, the context is read from the current time supplied by the clock signal, and the read context The start time supplied by is subtracted and the time difference thus set is used to evaluate the instantaneous throughput of the virtual circuit.

Description

Method and apparatus for evaluating throughput of virtual circuits using time division multiple transport channels

1 is a block diagram of an embodiment of the invention.

2 is a block diagram of a processing block BT of the system of FIG.

3 illustrates an embodiment of the clock selection module MSH of FIG.

4 is a diagram of a first embodiment of the throughput measurement module (MMD) of FIG.

5 is a diagram of a second embodiment of the throughput measurement module (MMD) of FIG.

6 is a diagram of a third embodiment of the throughput measurement module (MMD) of FIG.

7 is a diagram of a first embodiment of the resulting quantization module (MQR) of FIG.

8 is a diagram of a second embodiment of the result quantization module (MQR) of FIG.

9 illustrates an embodiment of a module MMR for reducing the number of results MRR of FIG.

10 shows a first embodiment of the coefficient management module (MGC) of FIG.

FIG. 11 shows a second embodiment of the coefficient management module (MGC) of FIG.

FIG. 12 shows an embodiment of the determination module MSC of FIG.

13 illustrates a functional assembly of a block (BT) module for processing a particular virtual circuit that constitutes one case to which the present invention is applied.

14 shows an example of a context suitable for use when applied according to FIG. 13;

* Explanation of symbols for the main parts of the drawings

ENC: Input BREC: Cell Receive / Transmit Block

ET: header of the cell BACT: access block

CT: Processing Context MCT: Processing Context Memory

BC: Counter Block CTX: Updated Context

CV: Address OSC: Signal

CMP: Link MSH: Clock Selection Module

MMD: Throughput Measurement Module MQR: Result Quantization Module

MRR: result count reduction module MGC: coefficient management module

MSC: Judgment Module CBC: Counter

The present invention relates to a method and apparatus for evaluating the throughput of a virtual circuit using an asynchronous time-division multiplexed transmission channel.

An asynchronous time division multiple transport channel is a transport channel for carrying data messages of digital data structures called cells. Each cell contains, for example, a header of four characters of eight bits, and a message body of, for example, 32 characters. These cells are sent out to the transmission channel continuously without interruption. When there is no message to be transmitted, the transport channel transmits an "empty" cell, ie a cell having the same format as the message cell and containing easily recognized protocol information. A configuration is adopted that maintains a sufficient proportion of empty cells in the message cell stream. In other words, these empty cells have a purpose in particular for synchronizing the receive end to the cell format.

The header of each message cell contains, for example, an information item used at the receiving end to determine the retransmission direction of the message body, coded in two characters.

The other two characters of the header contain service information, in particular the code check and error detection information related to the preceding two characters relating to the cell's destination. Headers of cells having the same destination spaced at random contain the same information. Therefore, this information is regarded as a kind of virtual circuit which occupies a part of the transmission capacity of the transmission channel.

More generally, this virtual circuit occupies a part of the transmission channel, and for example, the measurement with the number of cells per unit time introduces the throughput of the virtual circuit, so this throughput is accompanied by fluctuation. It is an object of the present invention to precisely evaluate this throughput.

The transmission channel always supports a plurality of virtual circuits, and the cells of the virtual circuit are interfitted in a so-called asynchronous time division multiple transmission channel irregularly. Throughput is different, and the throughput of different virtual circuits is a different value. The sum of these throughputs is limited by the maximum throughput of the transport channel and this also varies. For this reason, space for transmitting empty cells is maintained.

The number of virtual circuits that can be individually identified also depends on the number of bits assigned to the information in the cell header. The maximum number of virtual circuits is determined by the number of virtual circuits obtained by dividing the maximum throughput of the transmission channel by the minimum throughput of the data source that can use the virtual circuit. This value is quite large, for example, up to 64K.

However, asynchronous time division multiplexing is intended for a wide range of applications, and the bit rate of the source for virtual circuits also spans a very wide range of rates (eg, several kilobits to hundreds of megabits per second). Therefore, in general, the number of virtual circuits in an active state is less than the maximum number.

Asynchronous time division multiple transport channels are designed to transmit data supplied from sources with varying bit rates. In addition, switching devices and transmission devices arranged along the path to the destination direct the messages contained in the cell to the destination. Thus, it is necessary to check at the level of the transmission channel to prevent congestion on the transmission line whether or not the source has generated throughput above the overall throughput allocated to the circuit due to malfunction and improper use. If such a source exists, the modification operation currently used prevents the transmission channel from transmitting, or at least marks it as an excess cell, a cell determined to have exceeded the total throughput allocated to the virtual circuit, resulting in congestion of the transmission line. When removed, remove it from the transmission line. The present invention relates to a system for performing such verification to evaluate the throughput of a virtual circuit representing excess cells.

Systems of this kind are already known. For example, patent specification FR-A-2 616 024 discloses the use of a clock and a counter with one threshold value per virtual circuit. The counter advances for every cell in Hanan and reverses for every one clock pulse. If the cell rate is above the clock pulse rate, the counter reaches a threshold and provides a signal output.

Such a system is not applicable when the number of virtual circuits is very large and the duration of the cell is extremely short (for example 500 ns), because the time required to increment all the counters after a clock pulse is one. This is because it exceeds the cell's duration.

It is an object of the present invention to provide a method and apparatus for evaluating the throughput of a virtual circuit conforming to these requirements. In addition, the present invention provides more flexibility in use and provides properties that can be applied to a wide variety of use conditions.

The present invention provides a context, which defines the conditions of evaluation of the throughput of a virtual circuit in order to evaluate the throughput, ie, the bit rate, of the virtual circuit transmitting the cell using an asynchronous time division multiplex transmission channel. a storage location containing a set of data called contexts uses memory allocated for each virtual circuit; For evaluating the throughput of the virtual circuit, upon reception of each cell, reading out the context of the virtual circuit to which the cell belongs; A method for evaluating a throughput of a virtual circuit, further comprising the use of a clock signal adapted to supply a current time associated with the virtual circuit, expressed in a predetermined unit,

Upon receiving one cell of the virtual circuit, an indication of the start time is written in the context CT for this virtual circuit, and upon receiving the next cell of the virtual circuit, The context is read from the storage place allocated to the virtual circuit, and from the current time supplied by the clock signal, the start time read out of the context is subtracted to measure the time difference, and the time difference, i.e., the start time is written. The measured value of the throughput of the virtual circuit is obtained from the number of time intervals between cells counted between cells and the time of the next cell.

A feature of the invention is also that, upon receipt of one cell of the virtual circuit, an indication of the start time is written into the context CT of this virtual circuit, and upon receipt of the next cell of the virtual circuit, the context is set to the above description. From a current time allocated to a virtual circuit, a time difference is set by subtracting the start time read from the context from the current time supplied by the clock signal, wherein the time difference is defined as an elapsed interval between two cells. A measured value of the instantaneous throughput of the virtual circuit expressed in units of is constituted, and the measured value of the instantaneous throughput is supplied to the evaluation means to determine the need for correction operation, and the current time is written into the context as the start time.

According to the above-described features, it is possible to evaluate the throughput of the virtual circuit from the measured value at the time of reception of the cell only by accessing the context each time each cell is received, thereby processing a large number of virtual circuits. . In addition, when a threshold value is exceeded at the reception of each cell, a correction value can be set by setting a measurement value of the throughput. In other words, even if the throughput suddenly exceeds, the operation can be performed substantially immediately.

According to a feature of the invention, the context comprises coefficients of a receiving cell, the coefficients being incremented upon receipt of each cell of the virtual circuit, after which the incremental coefficients are compared with a specific coefficient value N and the received cell coefficients Only when the value reaches the specific count value, the time difference defined as the time interval elapsed between two discontinuous cells is supplied as a measured value of the instantaneous throughput Dm3 of the virtual circuit, and the received cell count is reinitialized. .

According to this feature, it is possible to set an evaluation value for an average time interval between the number of cells defined by the specific coefficient value. This particular coefficient value may also be included in the context and may be a parametric value.

According to a feature of the invention, the context comprises a specific duration of the measurement interval and the number of cells already received, and upon receipt of each cell, the time difference is compared with the measurement interval duration, and the time difference is If the duration is less than the duration of the measurement interval, the number of received cells is incremented, and the increment number of the received cells is defined as the number of cells received within a predetermined time interval only when the time difference is greater than or equal to the duration of the measurement interval. It is supplied as a measured value of the average throughput of the virtual circuit, and at the same time, the number of cells received and the start time of the measurement interval are reinitialized.

According to this aspect, it is possible to supply the hand throughput measurement value including the time interval between continuous or discontinuous cells from the measurement on the number of cells received within a predetermined time interval. Such measurements can be made economically by selecting an appropriate duration of time, such as the number of cells to be received in this time interval during normal traffic, to achieve the desired accuracy.

According to the present invention, a plurality of throughput setting values sequentially set in a predetermined virtual circuit are accumulated, and the accumulated value is displayed as a measurement value of the accumulation throughput RRm.

According to another feature of the invention, the context comprises at least one data item constituting a throughput counter and adds a difference between a predetermined value corresponding to the allowed throughput expressed in said predetermined unit and one of said measured values of said throughput. This corrects the contents, and then compares the arrival positions of the throughput counters with respect to the specific final positions, and generates a signal indicating the necessity of a correction operation when reaching or exceeding these final positions.

According to another feature of the invention, the context comprises at least one throughput threshold, comparing the threshold with one of the throughput measures to determine in which interval between the thresholds the threshold is determined and the determined interval The count value is corrected accordingly, and it is determined that the count value has reached the final position in the first direction to supply a signal indicating the need for a correction operation.

According to another feature of the invention, a plurality of throughput thresholds and a count of received cells are provided, and the one of the throughput measurements is compared with the threshold value so that the measured value is between the threshold values. It is determined whether it exists in the interval, corrects the count value according to the determined interval, and determines that the count value has reached the final position in the first direction to supply a signal indicative of the need for correction operation.

According to another feature of the invention, the context includes an indication of the maximum throughput allowed, and for each cell reception, compare the indication of the measured throughput with the indication of the maximum throughput, and when the measured throughput is a value above the permitted maximum throughput. Supplies a signal indicating the need for a correction operation.

According to another feature of the invention, when the throughput counter or the count value reaches a final position, a threshold throughput value is used within the context that depends on a corresponding throughput threshold that performs the same function as the maximum allowed throughput indication. .

The present invention also relates to a memory in which a storage place including a data set called a context defining a condition for evaluating a throughput of a virtual circuit is allocated to each virtual circuit, and that each cell is received for each cell in order to evaluate the throughput of the virtual circuit. Means for reading a context of a virtual circuit belonging to the apparatus and a clock signal source designed to supply a current time associated with the virtual circuit expressed in a predetermined unit.

A feature of the device of the invention is a means for writing an indication of the start time in the context of this virtual circuit upon reception of one cell of the virtual circuit, and a storage location assigned to the virtual circuit upon reception of the next cell of the same virtual circuit. Means for reading the context from the cell, and means for subtracting the start time provided by the context read from the current time supplied by the clock signal, the time difference set by the subtraction, and the cell in which the start time is written; The measured value of the virtual circuit throughput is obtained from the number of time intervals between the cells counted between the time of the next cell.

Furthermore, the time difference constitutes a measured value of the instantaneous throughput of the virtual circuit defined as the time interval elapsed between the two cells, and means for supplying the measured value of the instantaneous throughput to the evaluation means in order to determine the need for correction operation; And means for determining to write the current time into the context as a start time.

According to another feature of the invention, the context comprises coefficients of a receiving cell, means for incrementing a coefficient for each cell reception of the virtual circuit, means for comparing the incremental coefficient with a particular coefficient value supplied by the context, And operate only when a receiving cell coefficient reaches the specific coefficient value to supply the time difference defined by the time interval elapsed between two discontinuous cells as a measurement of the instantaneous throughput of the virtual circuit, Means for reinitialization.

According to another feature of the invention, the context also includes a specific duration of the measurement interval and the number of cells already received, the means for comparing the time difference and the specific time of the measurement interval at each cell reception, wherein the time difference is A virtual circuit defined as the number of cells which received the increment number of the received cells within a predetermined time interval only when the number of received cells is incremented when shorter than the measurement interval duration, and when the time difference is longer than the measurement interval duration. Means for supplying as a measured value of an average throughput of and simultaneously reinitializing the cell number.

According to another feature of the present invention, a means includes accumulating the measured values of the plurality of throughputs sequentially set in a predetermined virtual circuit, and indicating the whole as measured values of the no-acid throughput.

According to another feature of the invention, the context comprises at least one throughput counter, and means for correcting the contents of the counter by adding a difference between a predetermined value corresponding to an allowed throughput and one of the measured values of the throughput; And means for comparing the arrival position of the throughput counter with a specific final position, and generating a signal indicative of the need for a correction operation when the former becomes higher than the latter.

According to another feature of the invention, the context comprises at least one threshold of throughput, the means for comparing one of the measured values of throughput to the threshold, and above the threshold a throughput counter. Means for starting in the other direction and below the threshold, and for supplying a signal indicative of the necessity of a correcting operation by determining that the counter of the throughput has reached the final position in the first direction as described above. It includes.

According to another feature of the invention, the context has a plurality of thresholds of a throughput and at least one count value, and one of the measurements of the throughput to determine in which interval between the thresholds the measurement of throughput is present. Means for comparing with the threshold value, and correcting the count value by an amount as a function of the determined interval, and determining that the count value has reached the final position in the first direction to generate a signal indicating the need for a correction operation. Means;

According to another feature of the invention, the context includes a maximum throughput indication allowed, and for each cell reception, the measured throughput is compared with the maximum throughput indication, and a correction operation is required if the measured throughput is more than the maximum allowed throughput. Means for supplying a signal indicative of.

According to another aspect of the invention, whenever the throughput counter or the count value reaches the final position, the threshold throughput value is dependent on an associated throughput threshold that performs the same function as the allowed maximum throughput indication. Means for writing in.

According to another aspect of the invention, the clock signal source supplies a current time associated with the virtual circuit through a clock selection module controlled by commanding a clock signal selection indication supplied by the context of the virtual circuit and as a result the master clock. Is selected, and the least significant bit output represents a predetermined unit used in the measurement of the duration for the measurement of the throughput, which predetermined unit is selected such that the desired accuracy is obtained for these measurements.

As a result, the time display relating to the virtual circuit can be adapted to the throughput of the virtual circuit itself, and the desired accuracy can be obtained without increasing their display length, i.e., the number of bits.

Various objects and features of the present invention are described in detail with reference to the accompanying drawings.

First, an embodiment of the present invention will be described with reference to FIG. 1 which shows a block diagram. In FIG. 1, a throughput evaluation system is inserted between the cell input ENC and the cell output STC. The system is inserted into an asynchronous time division multiple transport channel. Specifically, the bit rate of the transmission channel received at the input ENC is, for example, 600 megabits / second. This data stream passes through a cell receive / transmit block (BREC), shown as a shift register. If the throughput of the virtual circuit supported by the link, i.e. the bit rate, can be received, then all the cells received at the input ENC have a delay of about 0.5 μs, for example equal to the transmission time of one cell. It is retransmitted as it is to the output unit STC.

According to the example mentioned in the preamble of this specification, one cell shows a four-character header, of which two characters 16 bits indicate a virtual circuit number. The cell also includes a message body consisting of 32 characters.

As soon as a header of one cell is obtained in the block BREC, this header ET is supplied to the processing context access block BACT. In this block BACT, the virtual circuit number CV is used as an address for reading from the processing context memory MCT the processing context CT of the virtual circuit to which the received cell belongs. This processing context CT is a set of digital information, some of which is fixed semi-permanent information about the duration of the cell transmitted through the virtual circuit, and some of which are changed upon receipt of each cell of the virtual circuit. Variable information. Therefore, this processing context CT contains information that defines the "past history" of the virtual circuit.

The access block BACT supplies the processing block BT with a read processing context called CTL, which receives information on the input order from the counter block BC.

The processing block BT creates an updated processing context CTX based on the two items of information and returns it to the access block BACT to be rewritten at the same address CV, and if the received cell is unacceptable Generate signal OSC.

The updated context CTX contains light information, which is a function of the fact that the cell has been received by the processing program of the block BT, in particular the function of the cell reception time indicated by the counter block BC. Subject to change.

According to the invention, the signal OSC is transmitted in a block BREC, which replaces the received cell in the block BREC with a blank cell. Further, according to the present invention, the signal OSC displays a flag provided in the cell header, by means of which the switching means is switched to that cell when the cells are continuously input to the switching means in the case of overload throughput. Do not send. It is possible to use the signal OSC for other purposes by using the output SOSC of the signal OSC.

In order to carry out the operation, the length of time required by the blocks BACT and BT is preferably equal to the transmission square of one cell, so that these blocks can resume a new operation cycle immediately after the reception of the next cell. However, as is known in the art, read-processing of context about a receiving cell such that each of the access block BACT and processing block BT has a total duration of one cell for all processing operations on one cell. The operation of the two blocks may be managed such that the operation of rewriting coincides with the operation on the cell immediately following.

The context data CT is also written into the memory MCT by a command processor, not shown, in communication with the access block BACT by a link CMP. For each write operation, the processor supplies the items of the address CV and the context information CT of the virtual circuit. The block BACT may, for example, be provided with identification means of empty cells, and may be configured to perform writing processing of a new context within the reception time of each empty cell.

Finally, the block BACT includes an operation monitoring device, and the processor reads the operation report by the link CMP.

Although the blocks BREC, BACT, BT and BC are shown in the part surrounded by a dotted line, the reason is that these blocks can be collectively configured in the form of a specific application integrated circuit (ASIC) as described below. to be.

The transceiver block BREC is not described in detail below, but this block is essentially a shift register. Also, the counter block BC will not be described in detail, but this block is a simple binary counter that is incremented by one step every cycle of the internal clock to cycle through the positions. The number of stages of this counter will be described later. Although the access block BACT is not described in detail, the function of the block is clearly defined, and the structure of the block and the combination technique of the block and the memory MCT are clear to those skilled in the art. Only the processing block BT is described in detail below.

This processing block BT is schematically shown in FIG. The block includes six types of processing modules. That is, at least one clock selection module (MSH), at least one throughput measurement module (MMD), at least one result quantization module (MQR), at least one result number reduction module (MRR), and at least one It includes a coefficient management module (MGC) and at least one determination module (MSC).

The clock selection module MSH is shown in FIG. Figure 3 also shows a counter CBS of a block BC consisting of a series of binary stages controlled by a clock HG supplying a pulse h. The outputs of counter CBC [S0, Sd to S (d + e), S (d + m) to S (d + m + e)] are coupled to the clock select module. At this time, as can be seen from Fig. 3, S0 represents the first output of the counter, and Sd to S (d + e) are connected to the multiplexer MU1, e + 1 outputs of the counter. S (d + m) to S (d + m + e) represent the e + 1 outputs of the counter, connected to the multiplexer MUm. Each multiplexer has e + 1 outputs connected from the counter, but for the sake of simplicity the drawings show two double outputs for each multiplexer, the first output (eg Sd, S (d + m)) and the last. Only outputs (eg S (d + e), S (d + m + e)) are shown.

The module also receives, from the context CT supplied by the access block BACT, a clock select indication value selh consisting of a binary representation that sequentially obtains the value of e + 1. This indication is supplied to m multiplexers MU1, MU2, MU3, ..., MUm, and as a result all the multiplexers are in the same direction (in the drawing only two multiplexers MU1 and MUm are shown for convenience). Each of these multiplexers is connected to a set of outputs having e + 1 outputs of the counter CBC, so that the m output sets themselves shift from multiplexer MU1 to multiplexer MUm by one or a plurality of outputs. Therefore, the multiplexer MU1 is connected to the outputs Sd to S (d + e) of the counter CBC, and the multiplexer MUm is output [S (d + m) to S (d + m + e)]. Is connected to. Finally, the outputs of the M multiplexers M1 through Mm supply the current time hc in the form of two exponents with valid bits of u to u + m, where the valid bits u are the access blocks BACT. It is determined according to the clock selection display value selh composed of binary display which sequentially obtains the value of e + 1 from the context CLT supplied by. Therefore, each of the virtual circuits has a clock signal suitable for its throughput, that is, the bit rate, defined in the display value selh of the processing context CT.

However, it should be noted that a plurality of clock selection blocks and the same clock selection block as described above may be provided together. From the description below, it will be appreciated that the throughput measurement module all utilizes the current time supplied by the block selection module. When all the throughput measurement modules can use the same current time, there may be one block selection module as shown in FIG. In some cases, it is necessary to provide different current times to multiple measurement modules, in which case a measurement module and an equal number of clock selection modules are required.

The processing block BT further includes a lower or a plurality of throughput measurement modules MMD1 to MMD3.

First, the module MMD1 will be described based on FIG. This module receives the following information from the context CT supplied by the block BACT.

The duration T of the measurement time interval expressed as the period u.

The value of the period (u).

The start time hal of the measurement time interval T, which is set later based on the current time hc.

-Number of cells already received n1 at time interval T at the current time.

-Number of bits (B) of one cell.

Module MMD1 also receives the current time hc supplied from module MSH.

Module MMD1 measures the difference hc-hal. When this difference is less than T, the value nlx = n1 + 1 is replaced with the value n1 of the context CT that supplies the block BACT. On the contrary, when the difference is T or more, the enabling signal Val1 with the value Dm1 = n1 is supplied to the later module MQR, MRR or MGC. At this time, the value nlx = 1 and the value halx = hc are supplied to the block BACT, and these values are replaced by the values n1 and hal of the context CT. Therefore, the start time written in the processing context CT is the reception time of the preceding cell in which the value n1 was equal to one.

As such, the value of the throughput Dm1 set at each elapse of each measurement interval equal to at least T may be expressed as n1 * B / (T * u), which is received per second when the period u is expressed in seconds. Indicates the number of bits However, as indicated above, Dm1 = n1 and the measurement result do not include the factor B / (T * u). Thus, the module MMD1 does not need to receive the values u and B from the processing context CT, and their values are used only when using the result. Their arguments not present in the result of the measurement are the result of this measurement. Used in the block using will be described later. Moreover, it should be noted that the value B may be a constant of the transmission system, ie the value T may be a constant of the evaluation system. In this case, these values are not supplied by the context CT, but are included as constant values in all modules of the processing block BT.

Finally, it is necessary to mention the measurement of the measurement time interval T. This measurement is not strictly performed but is accurate enough. In practice, this period is fixed to 1 after the predetermined number of cells has been received starting from the reception time of one cell as described above.

The cells are then counted until the hc-hal receives cells that exceed the measurement time interval. After the measurement interval ends, excess cells are not counted in the throughput indication, but counted in the coefficient of the next measurement interval. Thus, all cells are counted. Accuracy is degraded if there is a gap between measurement time intervals. The error is one or less of the number of cells counted per measurement time interval. If the number of cells in the expected average throughput is large enough, the error can be ignored.

As described above, the measured value of the throughput obtained by the module MMD1 is supplied by the number of cells received within the measurement time interval until the reception of the corresponding cell.

The module MMD2 of FIG. 5 receives the defined value B and the value ha2 at the present time when the preceding cell is received, separately from the current time hc obtained from the clock selection module MSH. do. These two values are obtained from the processing context CT supplied by the block BACT.

Accordingly, the module MMD2 measures the difference hc-ha2 for each cell reception, and enables the enabling signal Val2 with the value Dm2 = hc-ha2 for the next module MQR, MRR or MGC. Supply. The module MMD2 also supplies to the block BACT a value ha2x = hc written in the context CT by substituting the value ha2.

The throughput set as described above for each cell reception should be a value calculated as B / (hc-ha2) * u, but the measurement results Dm3 do not include the arguments B and u. These arguments are used in the next module as described below. In addition, the value B may be a constant of a transmission system as mentioned above.

In the case of this module MMD2, the measured value of the throughput is directly supplied by the elapsed time interval between the cell immediately after reception and the sea cell of the corresponding virtual circuit.

The module MMD3 of FIG. 6 has a value B previously defined separately from the current time hc obtained from the clock selection block MSH, and a value written as the current time upon reception of the first cell of the N cell sets. ha3), the coefficient n3 of the already received cell of the set of N cells, and the value N that the coefficient of one set of cells must reach. Several of these values are obtained from the processing context (CTL).

The module MMD3 first increments the coefficient n3 by n3x = n3 + 1 and then compares the coefficient n3x with the value N. When n3x <N, the module MMD3 supplies the coefficient n3x to the block BACT to update the processing context CT (the value ha3 remains the same). When n3x = N, the module MMD3 measures the difference hc-ha3 and supplies an enabling signal Val3 with the value Dm3 = hc-ha3 for subsequent modules of type MRR, MQR or MGC. . Further, the values ha3x = hc and the values n3x = 0 are supplied to the block BACT, and these values are replaced with the values ha3 and n3 and written in the context CT.

The exact value of the throughput set as described above for each cell reception is represented by the formula B * N / (hc-ha2) * u, but the factors B, N and u are not included in the measurement result Dm3. not. These arguments are used in subsequent modules. The value B may be a constant of the transmission system as described above, and the value N may be a constant of the evaluation system.

The measured value of the throughput supplied by module MMD3 is represented by the duration of the time interval required for the reception of N cells. This measurement may also be thought of as multiplying N constants equal to the average time interval between consecutive cells measured for the N cells.

The processing block BT further includes at least one result quantization module MQR. This module may take the form of module NQR1 shown in FIG. The module NQR1 receives the measured value Dm of the measured throughput, that is, the threshold value D1 of the throughput obtained from one of the preceding modules MMD1 to MMD3. The module NQR1 compares them to each other and generates a result signal R0i when the value of the measured throughput is less than a threshold value, and generates a result signal R1i when it is above the threshold value. These signals are processed in the next module MRR or supplied directly to one of the coefficient management module MCC.

In a variant, the resulting quantization module MQR may take the form of the module MQR2 shown in FIG. The module MQR2 receives the value Da from the context CT in addition to the values Di and Dm. The values Di and Dm are combined in the module MQR to supply the threshold indication scales Di, Di + Da, Di + 2 * Da ..., Di + k * Da. The module MQR2 compares the value Dm with its set of thresholds to generate the resulting signal Ri0 only when it is below the minimum threshold, and when it is above the threshold Di but below the threshold then the signal R1i. Then, in the same way, the resultant signal R (k + 1) is generated only when Dm is equal to or larger than the maximum threshold value Di + k * Da. These signals are processed in the result number reduction module MMR or supplied directly to the coefficient management module MCC.

It is also possible to modify the module MQR2 such that several values of the threshold indication scale are supplied directly by context.

The module to reduce the number of results (MRR) is optional. The module MRR may be provided after the throughput measurement modules NMD1 to MMD3, or after the resulting quantization module MQR. An embodiment of such a module is shown in FIG. The function of the module is to accumulate measurement results according to either quantization or dequantization. This module receives the following values from the processing context CT.

The number of measurement results to accumulate (C),

Number of results already accumulated (c)

Accumulated value (mc) of c measurement results already obtained.

The module also receives measurement results Rm, such as Dm1, Dm2 or Dm3, from the preceding throughput measurement module or results signals Ri0, Ri1, ..., Ri (k + 1) from the preceding result quantization module. ). Finally, the module receives an enabling signal Var such as a signal Va1, Va2 or Va3 from the measurement module which supplied the measurement result.

Based on the signal, the reduction module MRR sets the number cx = c + 1 and compares this number with the number C. At the same time, the module MRR calculates the sum mcx = mc + Rm.

When cx &lt; C, the number of results to be accumulated has not been reached, so the module MRR supplies values (cx and mcx) to update the processing context CT. When cx = C, the module MRR supplies cx = 0 and mcx = 0 to the context and enables the enable signal V1r to the next block, for example the resulting quantization block MQR or coefficient management block MCC. And the measurement result signal (RRm = mc). These two pieces of information have the same meaning as the information Va1 and Dm of the throughput measurement modules MMD1, MMD2, and MMD3 for the subsequent blocks.

Next, two modifications of the coefficient management module MCC will be described. MGC1 of the first modified example shown in FIG. 10 is used when measuring throughput using, for example, throughput measurement module MMD1, or when there is a resultant number reduction module MRR used simultaneously with such measurement module. do. The transform module MGC1 is configured to receive the throughput of the throughput supplied by the module when there is a validation signal Valv corresponding to a validation signal (obtained from a validation signal Val1 or V1r) as described below. Value Vm (i.e., Dm1 or RRm) directly. In addition, the module MGC1 determines, from the block BACT, the threshold value Ds of the throughput, the minimum value D0 of the throughput, the throughput counter position CPi, It receives the maximum count threshold MAX and the minimum count threshold MIN, which are the information supplied by the context CT, all expressed in the same unit, here the number of cells. In this case, this value is not supplied by the context.

The module MCC1 of this first modification compares the value Vm with the throughput value D0. When Vm <Do, no operation is performed so that all the information of the context does not change.

When Vm is greater than D0, the coefficient CPi is increased by Vm and decreased by Ds, so that the coefficient result CPx is obtained. This value is then compared to CMAX. When CPx> CMAX, the result is corrected to CPx = CMAX and written to the context CT. This is the count CPi reaches the value CMAX when the throughput is above the minimum value, i.e. outside the 'silence' period, and when the throughput measured by the counter is always kept below the throughput threshold value Ds. This means that it is kept at this value. This corresponds to a finite "credit" in case a threshold exceeded condition occurs later. At the same time, the result CPx is compared with the value CMIN. When CPx <CMIN, the result is corrected to CPx = CMIN. Here, the command OSCI is sent. This command supplies a signal OSC (see description in FIG. 1) with other commands of the same type of module. This indicates that throughput has exceeded the threshold value Ds as a result of using this margin. This command indicates the cell in question as an excess cell to perform a correction operation. The command OSCI is also written to the context. Thus, a possible excess of throughput is prevented from carrying over in the next measurement period. Finally, when CMAX &lt; CPx &lt; CMIM, the value CPx becomes the value CPi in the context CT without requiring another operation.

From said variant of the coefficient management module such that the measured value Vm is supplied by either of the throughput measuring modules MMD2 or MMD3 or by the resultant water reduction module MRR used in supply to one of the modules. Since it is clear that a variant can be made, the information supplied to the coefficient management module consists of units of duration defined by the selected clock signal.

In this variant of the first variant, the module MMG1 compares the value Vm with the throughput value D0. When Vm> D0, no operation is performed at all, and the context information remains unchanged. When Vm <D0, the coefficient CPi decreases by Vm and increases by Ds. The count result CPx supplied as a result is compared with the value CMIN. When CPx <CMIN, the result is corrected to CPx = CMIN and written in the context CT. This means that when the throughput is greater than the minimum, i.e. outside the 'silence' period, and when the cell-to-cell spacing is less than the minimum, and the throughput measured by this counter is always less than the throughput threshold Ds, the counter CPi is the value. (CMIN) is reached and maintained at this value. This corresponds to a limited "credit" in case the threshold exceeded later. At the same time, the result CPX is compared with the value CMAX. When CPx> CMAX, the result is corrected to CPx = CMAX. Here, the command OSCI (see above) is sent out. This command is also written to the context CT. For this reason, exceeding the throughput threshold value Ds occurs after the available credit is used up. It is necessary to mark the cell which generates this process as an excess cell. Finally, in the case of CMAX &lt; CPx &lt; CMIN, the value of CPx becomes the value CPi in the context CT without requiring any other operation.

Next, the third variant of the coefficient management module MCC1 will be briefly described. This module processes the information supplied from the resulting quantization module of the MQR1 type shown in FIG. This variant closely matches the first two variants, but in particular the throughput counter advances or retreats one step depending on whether an excess of the threshold value Di supplied to the module MQR1 has occurred.

A second variant of the coefficient management module (MGC2) is shown in FIG. This variant is used when the measured values are supplied by the resulting quantization module, such as the module MQR2 in FIG. For each cell, the module MQR2 is characterized by exceeding the threshold for other thresholds.

In other words, module MQR2 displays Rij indicating that the measured value is within the interval between threshold j and the next threshold j + 1 (i = threshold scale: j = 0 ..., (k +1)). The value Rij corresponding to one of these thresholds is supplied to the coefficient management module MCC2 together with the enabling signal Va1w. This enabling signal is supplied from a measurement module for supplying the quantization measurement result, and as described later, the coefficient value SPi, the maximum coefficient threshold SMAX, and the minimum coefficient threshold SMIN and the coefficient scale Kij are simultaneously supplied to the module MMG2.

The coefficient scale Kij is a set of coefficient values, one corresponding to each of the values Rij.

According to the information Rij, one of the values of the coefficient scale Kij is activated, and this value (positive or negative) is added to the coefficient value SPi. Next, the corrected value SPx is compared with the maximum threshold value SMAX. When SPx> SMAX, the same command OSC2 as the command OSCI (see above) occurs. At the same time the corrected value SPx is compared with the minimum threshold SMIN. When SPx <SMIN, the value SPx is limited to SPx = SMIN. No other operation is performed at all.

The same indication Rij supplied by the resulting quantization module is passed to a plurality of coefficient management modules MCC2 having different coefficient scales. As a result, it is possible to evaluate the throughput of the virtual circuit based on another criterion.

The coefficient scale Kij may be a constant of the evaluation system. In this case, the coefficient scale is not supplied by the context but is written to the module MMG2. According to a variant, a plurality of individual coefficient scales are written to the module MGC2. The information Kij designates one of these scales and selects and executes this scale in the module MMG2.

Regardless of which coefficient management module is used, the use of an instruction such as OSC1 or OSC2 further has the advantage of prohibiting some updates to the processing context CT or the like. In the case of the MMD2-type module, replacing the start time ha2 with the current time hax is prevented. As a result of this, it is considered that there is no cell in which the correcting operation is performed in this module. Moreover, it can be comprised so that the counter of a coefficient management module may not be updated. Therefore, all excess cells are deleted to make the virtual circuit the allowable throughput. More generally, no update of the processing context CT is introduced at all. In this case, the cell which caused the correction operation is considered not to be received by the evaluation apparatus.

Next, an immediate correction module (MSC) will be described based on FIG. This module complements the module MMD2 and subsequent modules to handle conditions above throughput. The module receives, for each cell reception, the value nlx of the number of cells received within the current measurement interval from module MMD1. In addition, the enabling signal Val1 is received from the same module MMD1 at the end of each measurement interval. The module MSC also receives a maximum threshold value Dsm and a plurality of intermediate threshold values Dsi from the context CT and sends a correction operation command OSCi from the coefficient management module associated with the throughput measurement module MMD1. Receive the corresponding signal. This command is pre-written in the context CT as described above.

For each cell reception, the throughput measurement reflected by the number of cells n1x received within the measurement interval is compared with the maximum threshold value Dsm. When nlx> Dsm, the command OSC3 is sent. This generates a start command (OSC) of a correction operation on the received cell. Thus, within one measurement interval, when the maximum number of cells is received and treated as normal, subsequent cells are considered excess cells. In this way, a limited number of mutually adjacent cells can be received at a high instantaneous rate. These cells are not deleted by measurements made by modules MMD2 and / or MMD3, but if this high throughput continues, the passage of cells exceeding the maximum threshold defined by the duration of the relatively long measurement time intervals Is stopped. When the signal Val1 is present, this processing procedure is not applied to the reception of the last cell of the measurement time interval.

In this case, the update of the context is inhibited by the rejection of the receiving cell, so that all cells received until the end of the measurement period thereafter are identical (except for the first cell received after the end of the measurement period). It is also possible to design the processing procedure to be rejected.

Further, the module MSC receives a command OSC generated by one of the coefficient management modules which processes the measurement result supplied from the module MMD1 from the context, and corresponding intermediate supplied by the context CT. Select the value of the threshold value Dsi. In the case of exceeding the threshold, the cell number nlx is also compared with this threshold to generate the command OSC3.

This process occurs especially when the number of received cells finally exceeds the prescribed threshold after all the credits have been used at the end of the measurement interval. The above threshold value is made small by the above-described processing procedure regarding the maximum threshold value. The purpose of using an intermediate threshold is to suppress the occurrence of a new threshold exceeding to a low level. This level is for generating writing of the command OSCi.

Although not described here, a processing procedure for causing the instruction OSCi to be deleted from the context at the end of the next measurement period when the corresponding excess condition is not reproduced is also possible.

According to the present invention, the same module as that of the module MSC of FIG. 12 may be provided in combination with the module MMD2 or MMD3. The detailed description thereof is not required because it can be easily deduced from the above description.

Next, the overall configuration of the processing block BT will be described based on FIG. FIG. 13 shows the modules MMD1, MMD2, MMD3, MRR, MQR1, MQR2, MGC2 and two modules MGC1, MGC2 of the blocks BT of FIGS. 1 and 2 in a given virtual circuit CV; An application example using one module (MSC) is shown.

Upon reception of each virtual circuit cell CV, the module MMD2 supplies the measured value MD2 of the throughput including the enabling signal Val2 and the throughput threshold Dm2 shown in FIG. . This value is the duration that separates the receiving cell from the preceding cell of the same virtual circuit. This value is input to the result quantization module MQR2. In the latter module this value is compared to the threshold supplied from the context, taking into account the setting conditions of the measured value of the throughput, in particular the clock period u in which the measured value is expressed. The module MQR2 supplies the output signal ndi to the coefficient management module MCC2. This signal comprises the resultant signals Ri0, ... Ri (k + 1) of FIG. 8 defining the throughput levels The coefficient values of the module vary according to the count scale for each measured throughput level, The count range of the counter defines the threshold over-tolerance: The persistence above the threshold causes a reject command (OSC2).

At the same time, the module MMD3 counts the reception of one cell and, upon reaching the count indicated by the context, sends the measured value md3 of the throughput to the coefficient management module of the MCC1 type as shown in FIG. Optionally, a result quantization module, such as module MQR1, may be provided before MGC1. This throughput measurement includes the enabling signal Bal3 and the throughput value Dm3 in FIG. The value Dm3 is the duration of the time interval at which the received cell is spaced apart from the N cells before the associated virtual circuit. The value of this throughput is added to the content of the throughput counter managed by module MCC1, and the value corresponding to the authorized throughput is subtracted from this value. This latter value is also supplied from the context, taking into account the measurement conditions of the throughput performed, in particular the duration of the clock period in which the measurements were obtained. In practice, the counter adds a difference between the allowed throughput and the measured throughput, in other words, a value corresponding to a deviation to the prescribed throughput. . This deviation is related to the average time interval measured for a set of N cells. Therefore, this deviation covers a considerably longer period than the period measured based on the measurement module MMD2, and masks spikes in throughput appearing in two or three cells which are extremely close to each other. Finally, sustaining over throughput results in command OSC1, so signal OSC is output as described above.

At the same time, module MMD1 counts the reception of one cell within the measurement time interval.

When the measurement time interval ends, the number of cells received within this measurement interval is sent as the measurement result dm1. This measurement result dm1 includes the enabling signal Val1 and the throughput value Dm1 in FIG. A plurality of these measurement results are accumulated by the module MRR. When the accumulation ends, the module MRR enables the MGC1 type coefficient management module to output the measurement result rm including the signal Vlr and the measurement result value RRm in FIG. The operation of this module has already been described, and here again the subtracted value is defined, taking into account the throughput measurement conditions. As a result, sustained throughput exceeds the reject command OSC1. By the combination of the measurement time interval defined in the module MMD1 and the accumulation module MRR, it is possible to evaluate the throughput covering a relatively long period of time, thus high accuracy is obtained. When one measurement module MMD1 and a plurality of different accumulation modules MRR are used, a plurality of different measurement results regarding different accumulation periods are obtained.

Moreover, the module MSC receives the number of cells nlx received within the measurement time interval, compares it with the threshold as described above, and issues a reject command OSC3 in case of sustained over throughput. The module also receives reject commands OSC2 and OSC1 from the modules MGC2 and MGC1 to set threshold values of the throughput used to reject cells of this virtual circuit if the throughput of the virtual circuit continues. .

Finally, an example of the context CT corresponding to the application example of FIG. 13 will be described based on FIG.

14 shows a memory location each divided into square spaces. The number in parentheses in the lower right corner of the space indicates the number of bits. Numerals and other representations use the same modules as in FIGS. 3 to 12.

The clock select indication selh takes 4 bits. This display value is obtained by selecting one of the 16 clock signals. When the current time of the clock contains 17 bits, the counter (CBC) contains up to 32 bits.

The number of bits of the current time supplied by the clock and the start time indication written to the context is determined by the problem from the temporary inoperable virtual circuit. When the clock of the virtual circuit executes one complete cycle without receiving all of the cells, at present the throughput is extremely low and should not be rejected. In order to solve this problem, for example, a minimum throughput is imposed on the connection source, and when there is no connection, the connection is configured to be blocked. This results in artificial throughput. This throughput is as long as the clock cycle of the virtual circuit is long, that is, as many bits as the current time is.

Next, the number of clock periods (T (11 bits) defining the start time hal of 17 bits required for the module MMD1, the number of reception end cells n1 (11 bits), and the duration T of the measurement time interval. ) Exists.

When the average standard throughput of the virtual circuit is 2M bits / second, the least significant bit of the clock signal associated with the virtual circuit selected by the clock select indication value selh has a period of 8 microseconds. In contrast, for a cell of about 300 bits, the average cell spacing is 150 microseconds. The measurement time interval covering the reception of an average of 100 cells should be at least 15000 microseconds, or about 2000 clock periods. Therefore, a value of 11 bits is required to define the display T. In addition, the number of bits necessary to count the number of cells received within the measurement time interval must correspond to the maximum number of cells allowed in this period from the average throughput, which can be expressed as an number of 8 bits. Therefore, the number n1 was supplied with 11 bits corresponding to the maximum possible throughput of almost 20 times the average throughput. As a result, the threshold values Dsm and Dsa required for the determination module MSC are the same number of bits 11.

The indications ha2 and ha3 played in the modules MMD2 and MMD3 are 17 bits and are based on the same clock signal. The measurement of the time interval between two consecutive cells is made up to about 5%. The purpose of the measurement is to prevent spikes of the shortest throughput, so a lack of accuracy is acceptable. The measured value obtained by the module MMD3 is high in accuracy. Furthermore, in response to the request of this module MMD3, the context supplies a value of the number of cells received (n3 (6 bits)) and a value of the number of cells to be received (N (6 bits as well)).

Thus, it is possible to measure the average time interval of 1 to 63 cells. The same values (c and C) required for the resulting number reduction module (MRR) are also 6 bits each, providing the same possibilities. Therefore, the accumulated value mc of the module MRR is 11 + 6 = 17 bits.

The threshold Di and threshold increment Da required for the result quantization modules MQR1 and MQR2 are 17 bits and 6 bits, respectively. The time difference (hc-ha3 or hc-ha2) can have 17 bits. Therefore, it is compared with a threshold of 17 bits apart by 6 bits.

The threshold value Ds required for the module MCC1 consists of 17 bits. This is because the accumulated value supplied by the module MRR contains the same number of bits. In this case, the threshold D0 is regarded as zero (0). The counter CPi controlled by this module has 20 bits. The value CMAX is likewise 20 bits. The value CNIM may be zero or a constant and therefore does not exist in the context.

Also mentioned is the count value SPi (four values of six bits each) and the associated threshold SMAX (four thresholds of six bits each). The threshold SMIN is also assumed to be zero or constant. Finally, the illustrated context also includes an 11-bit application threshold Dsa, as well as the 11-bit maximum threshold value Dsm required for the instant reject decision module MSC of FIG.

The same virtual circuit having an average rated throughput of 4M bits / second is all processed the same except that the clock signals specified for this virtual circuit are different. Virtual circuits with an average throughput of 2-4 Mbits / sec are processed with clock signals of 4Mbits / sec virtual circuits, but at this time, parameters that determine the evaluation of throughput, namely the period T (shortened), the module MQR1 and Adjust the threshold value Di (incremented) of MQR2) or the value Ds (decreased further in the case of FIG. 13) of module MGC1 accordingly.

Moreover, virtual circuits with the same average rated throughput are somewhat tolerant of throughput spikes. This virtual circuit uses threshold values Di and Da that are different from the modules MQR1 and MQR2. As shown in the description of these modules, the configuration of the module may be changed.

This is fully disclosed. Although not described, necessary values may be added in the same manner. You can also use a value selected from a few constants that can reduce the length of the constant and the context. It is well known to those skilled in the art that an encoding method that can significantly save the amount of data to be stored in the memory by only slightly increasing the complexity of the circuit.

There is no technical problem in the practical use of the throughput evaluation apparatus of the present invention, and as described above, various elements can be performed simply by performing simple logical and arithmetic operations. As shown in FIG. 1, a combination of blocks BREC, BACT, BT and BC can be manufactured in the form of a single ACIC element, i.e., an integrated circuit. According to the state of the art, a memory embedded context (MCT) will be an independent device. Since the processing block BT has a modular structure, it can be easily applied to various desired applications.

The application of FIG. 13 is one simple embodiment, and other configurations are possible. However, these other configurations can access an integrated circuit with a sufficient number of modules in various forms, for example, via a link (CMP), and can realize various configurations of the various modules shown in FIG. By providing means (registers and switches for configuration), it is possible to obtain from the same integrated circuit.

Claims (29)

To evaluate the throughput, or bit rate, of a virtual circuit that transmits a cell using an asynchronous time division multiplex transmission channel, includes a data set called context that defines an evaluation condition of the throughput of the virtual circuit. The memory location to be used is a memory allocated to each virtual circuit, and in order to evaluate the throughput of the virtual circuit, the context of the virtual circuit to which the cell belongs is read out for each cell reception, and expressed in a predetermined unit. A method for evaluating throughput of a virtual circuit, the method further comprising the use of a clock signal adapted to supply a current time associated with the virtual circuit being On receiving one cell of the virtual circuit, an indication of one start time ha1, ha2, ha3 is written in the context CT of this virtual circuit, and upon receiving the next cell of the virtual circuit, the context Is read from the storage place allocated to the virtual circuit, and the start time (ha1, ha2, ha3) read in the context is subtracted from the current time (hc) supplied by the clock signal, and the time difference is measured, And a measurement value of the throughput of the virtual circuit is obtained from the time difference, that is, the number of time intervals between the cells counted between the cell into which the start time has been written and the time of the next cell. In order to evaluate the throughput of a virtual circuit transferring a cell using an asynchronous time division multiplex transmission channel, a storage location containing a data set called a context defining a condition for evaluating the throughput of the virtual circuit is allocated for each virtual circuit. A memory is used to read the context of the virtual circuit to which the cell belongs to each cell reception to evaluate the throughput of the virtual circuit and to supply the current time associated with the virtual circuit expressed in a predetermined unit. A method for evaluating throughput of said virtual circuit further comprising the use of a designed clock signal, Upon reception of one cell of the virtual circuit, an indication of the start times ha2 and ha3 is written in the context CT of this virtual circuit, and upon receipt of the next cell of the virtual circuit the context is assigned to the virtual circuit. The time difference is measured by subtracting the start time ha2 and ha3 read out from the context from the current time hc read from the stored storage location and supplied by the clock signal. The measured values of the instantaneous throughputs Dm2 and Dm3 of the virtual circuit expressed in predetermined units, which are defined as time intervals, are constituted, and the measured values of the instantaneous throughputs are evaluated by evaluation means (MQR, MRR) And MGC), wherein the current time hc is written in the context as a start time. 3. The context CT according to claim 2, wherein the context CT comprises the coefficients of the receiving cell n3, the coefficients being incremented upon receipt of each cell of the virtual circuit, after which the incremental coefficients are associated with a specified coefficient value N. Compare and supply the time difference defined as the time interval elapsed between two discontinuous cells only as a measured value of the instantaneous throughput Dm3 of the virtual circuit, only when the received cell coefficient reaches the specific coefficient value, And reinitializing the received cell coefficient (n3). 2. The context CT of claim 1, wherein the context CT comprises a start time ha1 of the measurement interval, a specific duration T of the measurement interval, and the number n1 of cells already received, at the time of receiving each cell. Compare the time difference (hc-ha) with the measurement interval duration (T), and if the time difference is less than the duration of the measurement interval, increment the number n1 of the received cells, Only when the time difference is greater than or equal to the duration of the measurement interval, the increment of the received cell is supplied as the measured value Dm1 of the average throughput of the virtual circuit defined as the number of cells received within a predetermined time interval, and at the same time, the received A method for evaluating a throughput of a virtual circuit, wherein the number of cells n1 and the start time ha1 of the measurement interval are reinitialized. The method according to claim 2 or 3, wherein a plurality of throughput measurement values Dm1, Dm2, and Dm3 sequentially set in a predetermined virtual circuit are accumulated, and the accumulated value is displayed as a measurement value of the accumulation throughput RRm. A throughput evaluation method of a virtual circuit characterized by the above-mentioned. 4. The context CT according to claim 2 or 3, wherein the context CT comprises at least one data item constituting a throughput counter CPi, and according to authorized throughput expressed in the predetermined unit. The content is corrected by adding the difference between the corresponding predetermined value Ds and one of the measured values Dm1, Dm2, Dm3, and RRM of the throughput, and the throughput for the specified extreme position. A method for evaluating a throughput of a virtual circuit, comprising comparing the arrival positions of the counters and generating a signal (OSC1) indicating the necessity of a correction operation when reaching or exceeding this final position. 4. A method according to claim 2 or 3, comprising a plurality of throughput thresholds (Di, Di + Da ...) and a count value SPi, wherein one of said throughput measurements Dm1, Dm2, Dm3, RRm And the thresholds are compared to determine in which interval between the threshold values Ri0, Ri1 ..., the correction value is corrected according to the determined interval, and the coefficient value is in the first direction. And a signal OSC2 indicating a need for a correction operation is supplied by determining that the final position of? Has been reached. 4. The context CT according to claim 2 or 3, wherein the context CT comprises at least one throughput threshold Di and compares the threshold with one of the throughput measurements Dm1, Dm2, Dm3, RRm. Thus, when the measured value is greater than or equal to the threshold value R1i, the throughput counter CPi is started in the first direction; when the measured value is less than the threshold value R1i, the throughput is started in the other direction, and the throughput And determining that the counter has reached the final position in the first direction, and supplying a signal (OSC1) indicating the need for correction operation. 4. The context (CT) according to claim 2 or 3, wherein the context (CT) comprises a maximum allowed throughput indication (Dsm) and at each cell reception. And comparing the indication of the measured throughput with the indication of the maximum throughput, and supplying a signal indicating the need for correction operation when the measured throughput is a value equal to or greater than the permitted maximum throughput. The method according to claim 1 or 4, wherein a plurality of throughput measurement values (Dm1, Dm2, Dm3) sequentially set in a predetermined virtual circuit are accumulated, and the accumulated value is displayed as a measurement value of the accumulation throughput RRm. Throughput evaluation method of a virtual circuit, characterized by the above-mentioned. The predetermined value according to claim 1 or 4, wherein the context CT comprises at least one data item constituting a throughput counter CPi, and the predetermined value corresponding to the authorized throughput expressed in the predetermined unit. The content is corrected by adding the difference between (Ds) and one of the measured values ((Dm1, Dm2, Dm3, RRm) of the throughput, and comparing the arrival position of the throughput counter with respect to the specified final position, this final position And a signal OSC1 indicating the necessity of a corrective operation when reaching or exceeding. The method according to claim 1 or 4, comprising a plurality of throughput thresholds (Di, Di + Da ...) and a count value (SPi), wherein said throughput measurement values (Dm1, Dm2, Dm3, RRm) are included. Comparing one and the thresholds to determine in which interval between the threshold values Ri0, Ri1 ..., the correction value is corrected according to the determined interval, and the coefficient value is first A method for evaluating a throughput of a virtual circuit characterized by determining that the final position in the direction has been reached and supplying a signal (OSC2) indicating the need for correction operation. 5. The context CT according to claim 1 or 4, wherein the context CT comprises at least one throughput threshold Di and compares the threshold with one of the throughput measurements Dm1, Dm2, Dm3, RRm. Thus, when the measured value is greater than or equal to the threshold value R1i, the throughput counter is started in the first direction; when the measured value is less than the threshold value R1i, the throughput counter is started in the other direction. It is determined that the final position in the first direction has been reached, and a signal (OSC1) indicating a need for correction operation is supplied, and the throughput evaluation method of the virtual circuit. The method according to claim 1 or 4, wherein the context CT indicates a maximum allowed throughput indication Dsm and for each cell reception. And comparing the indication of the measured throughput with the indication of the maximum throughput, and supplying a signal indicating the need for correction operation when the measured throughput is a value equal to or greater than the permitted maximum throughput. 10. The maximum allowed rate of claim 9, wherein when the throughput counter CPi or the count value SPi reaches a final position, a threshold throughput value Dsa that depends on the associated throughput threshold is used within the context to allow for the maximum allowed. A method for evaluating a throughput of a virtual circuit, characterized by performing the same function as the throughput display (Dsm). A memory having a data set called a context defining a condition for evaluating a throughput of a virtual circuit, allocated to each virtual circuit, and the virtual to which the cell belongs to each cell reception in order to evaluate the throughput of the virtual circuit. 12. An apparatus for evaluating throughput of a virtual circuit using means for reading the context of the circuit and using an asynchronous time division multiplex transmission channel comprising a clock signal source designed to supply a current time associated with the virtual circuit expressed in a predetermined unit, Means (MMD1, MMD2, MMD3) for writing an indication of a start time ha1, ha2, ha3 in the context CT of this virtual circuit upon reception of one cell of the virtual circuit, the next one of the same virtual circuit; Start provided by the context read from the divisions MMD1, MMD2, MMD3 reading the context from a storage location allocated to the virtual circuit upon reception of the cell, and from the current time hc supplied by the clock signal. Means for subtracting the times ha1, ha2, ha3, from the number of time intervals set by the subtraction, i.e., the number of time intervals between the cells in which the start time was written and the time counted between the time of the next cell; A throughput evaluation device for a virtual circuit, characterized by obtaining a measured value of the throughput of the circuit. The measurement of the instantaneous throughput according to claim 16, wherein the time difference constitutes a measurement value of the instantaneous throughputs Dm2 and Dm3 of the virtual circuit defined as a time interval elapsed between two cells, and the determination of the need for a corrective operation. Means for supplying values to the evaluation means MDR, MMR, MGC, MMD2, MMD3, and means for determining to write the current time hc into the context as starting time ha2, ha3. Throughput evaluation device for a virtual circuit. 18. The context CT according to claim 17, wherein the context CT comprises a coefficient n3 of a receiving cell, means for incrementing a coefficient for each cell reception of the virtual circuit MMD3, and incrementing coefficients to the context CT. Supplying the time difference Dm3 defined as a time interval elapsed between two discontinuous cells and means MMD3 comparing with a specific coefficient value N supplied by the measured value of the instantaneous throughput of the virtual circuit. And means (MMD3) for reinitializing the receiving cell coefficient n3, operating only when the coefficient of the receiving cell reaches the specific coefficient value. Device. 18. The method of claim 17, wherein the context CT also includes a specific duration of the measurement interval T and the number of cells already received n1, wherein each cell reception comprises the time difference and the duration of the measured interval. Means for comparing (MMD1) and incrementing the number of received cells (n1) when the time difference is shorter than the measurement interval duration, the increment of the received cell only when the time difference is longer than the measurement interval duration Means for supplying a number as a measured value of the average throughput Dm1 of the virtual circuit defined as the number of cells received within a predetermined time interval, and simultaneously reinitializing the received cell number n1. Throughput evaluation device of the virtual circuit. 19. The method of claim 18, wherein the context CT also includes a specific duration of the measurement interval T and the number of cells already received n1, and comparing the time difference and the duration of the measurement interval for each cell reception. Means (MMD1) for incrementing the received cell number n1 when the time difference is shorter than the measurement interval duration, and only if the time difference is longer than the measurement interval duration. Means for supplying as a measured value of the average throughput Dm1 of the virtual circuit defined as the number of cells received within a predetermined time interval, and simultaneously reinitializing the received number of cells n1. Throughput evaluation device for virtual circuits. 18. The apparatus according to claim 17, comprising means (MMR) for accumulating a plurality of measurement values (Dm1, Dm2, Dm3) of the plurality of throughputs sequentially set in a predetermined virtual circuit, and representing the whole as measured values of the accumulation throughput RRm. Throughput evaluation device of the virtual circuit, characterized in that. 20. The apparatus according to claim 19, comprising means (MRR) for accumulating a plurality of throughput measurement values Dm1, Dm2, and Dm3 sequentially set in a predetermined virtual circuit, and representing the entirety as a measurement value of the accumulation throughput RRm. Throughput evaluation device for a virtual circuit. 21. The apparatus according to claim 20, comprising means (MRR) for accumulating a plurality of said throughput measurement values Dm1, Dm2, and Dm3 which are sequentially set in a predetermined virtual circuit, and representing the whole as measured value of accumulated throughput RRM. A throughput evaluation device for a virtual circuit, characterized in that. 24. The method according to any one of claims 16 to 23, wherein the context CT comprises at least one throughput counter CPi, the predetermined value Ds corresponding to the allowed throughput and the throughput measurement Dm1. Means for correcting the contents of the counter by adding the difference between one of Dm2, Dm3, and RRm, and comparing the arrival position of the throughput counter with the specified final position and correcting when the former becomes higher than the latter. And a means (MGC1) for generating a signal (OSC1) indicating the necessity of the throughput of the virtual circuit. 24. The method of any one of claims 16 to 23, wherein the context CT comprises at least one throughput threshold value Di and comprises one of the measured values Dm1, Dm2, Dm3, RRm of the throughput. Means for comparing the threshold value (MQR1) and means for starting the throughput counter (CPi) in the first direction when the measured value is above the threshold and in the other direction when the measured value is below the threshold (MGC2). And means (MGC2) for further supplying a signal (OSC1) indicating the need for a correction operation by determining that the throughput counter has reached the final position in the first direction due to the activation. Throughput Evaluation Device. 24. The method of any one of claims 16 to 23, wherein the context CT has at least one data item corresponding to the count value SPi and a plurality of throughput thresholds Di, Di + Da ... Compares the threshold with one of the throughput measurements Dm1, Dm2, Dm3, and RRm to determine in which interval between the threshold values Rij the threshold is measured; Correcting the count value SPi by a function amount, determining that the count value has reached the final position in the first direction, and generating a signal OSC2 indicating the need for a correction operation. Evaluation device. 24. The method according to any one of claims 17 to 23, wherein the context CT comprises a maximum allowed throughput Dsm indication, and for each cell reception, the measured throughput nix and the maximum throughput indication are measured and compared. And a means (MSC) for supplying a signal (OSC3) indicating the need for a correction operation when the determined throughput is equal to or larger than the permitted maximum throughput. 28. The threshold throughput value Dsa according to claim 27, wherein each time said throughput counter or said count value reaches said final position, said threshold throughput value (Dsa) is dependent on an associated throughput threshold that performs the same function as said allowed maximum throughput indication (Dsm). Means (MSC) for writing C) into the context CT. 29. A clock selection module as claimed in any one of claims 17 to 23 and 28, wherein the clock signal source is controlled by commanding a clock signal selection indication (selh) supplied by the context of the virtual circuit. Selects the output sets M1 through Mm of the master clock CB as a result, supplying the current time associated with the virtual circuit, and the least significant bit output is a predetermined unit of measurement used for the measurement of the duration for the measurement of the throughput. And said predetermined measurement unit is selected so that a desired accuracy can be obtained for these measured values.

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