JPH0369232A - Method and apparatus for evaluating throughput of virtual circuit using time sharing multiplexed transmission channel - Google Patents

Abstract

PURPOSE: To prevent the occurrent of a congestion in the downstream of a transmission path by using a memory which assigns a storage place including a data aggregation called a context to respective virtual circuits and reading the context of the virtual circuits to which a cell belongs at every cell reception. CONSTITUTION: When a one cell header is inputted to a block BREC, the header ET is transmitted to a processing context access block BACT. The access block BACT transmits the read processing context CTL to a processing block BT. Moreover, the block receives information concerning input order from a counter block BC. The processing block BT generates the processing context CTX, returns it to the access block BACT so as to execute rewriting in a same address CV and generates a signal OSC unless a reception cell is within a permission range. The signal OSC is transmitted to the block BREC and the signal replaces the reception cell inside the block BREC with a null cell.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for evaluating throughput of virtual circuits using asynchronous time division multiplexed transmission channels.

An asynchronous time division multiplexed transmission channel is a transmission channel that carries data messages in digital data structures called information unit blocks or cells. Each cell includes a header consisting of, for example, four 8-bit characters, and a message body consisting of a predetermined number of characters, for example 32 characters. The cells that are scattered are continuously sent out onto the transmission channel without interruption.

When there is no message to be transmitted, the transmission channel carries "blank" cells, ie cells that have the same format as the message cell and contain easily recognizable convention information.

An arrangement is adopted such that the message cell stream maintains a sufficient proportion of blank cells. That is, such blank cells serve in particular the function of self-automatically synchronizing the receiving terminal.

For example, two characters in the header of each message cell code an information item that is used by the receiving terminal to define the 3'AI direction of the message body.

The remaining two characters of the header contain code check and error detection information for the preceding two characters regarding the service information and the cell's destination. The headers of randomly spaced cells of the same destination contain the same information. This information can therefore be thought of as a kind of virtual circuit that occupies part of the transmission capacity of the transmission channel; more specifically, this virtual circuit occupies part of the transmission channel, e.g. We introduce the throughput of a virtual circuit, which is indicated by the number of cells, and this throughput is a variable value 0. The purpose of the invention is precisely to evaluate the throughput of this virtual circuit.

A transmission channel always supports a plurality of virtual circuits, and cells of virtual circuits are randomly inserted into the so-called asynchronous time division multiplexed transmission channel. The throughput is a variable value, and the throughput of different virtual circuits is a different value. The sum of these throughputs is limited by the maximum throughput of the transmission channel and is also a variable value. Therefore, space for blank cell transmission is maintained.

The number of virtual circuits that can be separately identified also depends on the number of bits allocated for this information in the header of the cell.

The maximum number of virtual circuits is determined in particular by the number of virtual circuits obtained by dividing the maximum throughput of the transmission channel by the minimum throughput of the data source using virtual circuits. This value is extremely large, reaching 64K, for example.

However, asynchronous time-division multiplexed transmission is expected to have the widest range of applications, and as a result, the bit rates of virtual circuit-based sources also span a very wide range (e.g., from a few kilobits to a few hundred megabits per second).
The actual number of virtual circuits is generally less than the maximum number.

Asynchronous time division multiplexed transmission channels are designed to carry data provided by sources at a wide variety of varying bit rates. Switching equipment and transmission equipment deployed along the transmission line leading to the destination,
The message contained in the cell is conveyed to the destination. Therefore, in order to avoid congestion downstream of the transmission line, it is necessary to check at the transmission channel under consideration that there are no sources that introduce throughput, due to failure or fraud, greater than the total throughput allocated to the circuit. . When such a source exists, a common correction operation is
Cells determined to exceed the total throughput allocated to the virtual circuit are blocked and not carried on the transmission channel, or at least marked as excess cells and removed from the transmission line when congestion occurs. The present invention relates to a virtual circuit throughput evaluation system that performs such a test and points out excess cells as a result.

Systems of this kind are already known. For example, French Patent Application No. 2,616,024 teaches the use of a clock and a counter with one threshold per virtual circuit for this purpose. . The counter advances by 1 cell.
Step back on every clock pulse.

When the speed of the cell becomes faster than the speed of the clock pulse, the counter reaches a threshold and a signal output occurs.

Such systems have a very large number of virtual circuits and a very short cell duration (e.g. 500n).
s) cannot be used because the time required to increment all counters after one clock pulse exceeds the duration of one cell.

An object of the present invention is to provide a virtual circuit throughput evaluation method and apparatus that meet the above requirements.9 The present invention is also extremely flexible and can be adapted to various usage conditions. .

In order to evaluate the throughput, that is, the bit rate, of a virtual circuit that conveys cells using an asynchronous time division multiplexed transmission channel, the present invention provides a memory that includes a data set called a context that defines evaluation conditions for the throughput of the virtual circuit. Use memory to allocate locations to each virtual circuit,
It is designed to read the context of the virtual circuit to which the cell belongs each time it receives each cell in order to evaluate the throughput of the virtual circuit, and further to provide the current time associated with the virtual circuit expressed in a predetermined unit. A method is provided that includes the use of a clock signal. The method of the present invention is characterized in that when one cell of the virtual circuit arrives, one start time indication is written in the context of the virtual circuit, and when the next cell of the same virtual circuit arrives, the context is A time difference is calculated by subtracting the start time read from the context from the current time read from a memory location assigned to the virtual circuit and given by the clock signal, and the time difference is calculated by subtracting the start time read from the context from the current time given by the clock signal. A measure of the throughput of the virtual circuit is obtained from the number of inter-cell time intervals counted between the written cell and the time of the cell.

The present invention is also characterized in that a start time indication is written in the context of the virtual circuit each time one cell of the virtual circuit arrives, and that the context is assigned to the virtual circuit each time the next cell of the same virtual circuit arrives. A note! ! The start time read from the context is subtracted from the current time read from the location and given by the clock signal to establish a time difference, said time difference being defined as the time interval elapsed between two cells and given by the clock signal. constitutes a measurement of the instantaneous throughput of the virtual circuit expressed in units, said instantaneous throughput measurement being fed to an evaluation means to determine the need for a corrective operation, said current time being written into the context as a start time; It is to be able to do so.

Due to the above features, it is possible to evaluate the throughput of a virtual circuit from the observed value at the time of cell arrival by simply accessing the context at the time of each cell arrival, and it is possible to process a large number of virtual circuits. be. In addition, throughput measurement is possible in which a correction operation is performed when a threshold value is exceeded when each cell is received. In other words, virtually instantaneous operation is possible even if throughput is suddenly exceeded.

According to another feature of the invention, the context comprises a count number of received cells, and for each reception of each cell of the virtual circuit, said count number is incremented to increment callan 1/; comparing the number with a particular count value; The time difference, defined as the time interval elapsed between two discontinuous cells, is provided as a measure of the instantaneous throughput of the virtual circuit only when the count of received cells reaches a specific count value, and the reception Reinitialize the number of completed cells.

According to this feature, it is possible to set an evaluation regarding the average time interval between the number of cells defined by said specific count value. This specific count value is also
It is included in the context and therefore may be a parametric value.

According to another feature of the invention, the context comprises a specific duration of a measurement interval and a number of received cells, and for each cell reception, comparing the time difference with the measurement interval duration; Further, the number of received cells is incremented when the time difference is less than the duration of the measurement interval, and the incremented number of received cells is increased to a given value only when the time difference is greater than or equal to the duration of the measurement interval. It is provided as a measure of the average throughput of the virtual circuit defined as the number of cells received in a time interval, while the number of cells received and the start time of the measured ink pulse are reinitialized.

Such a feature makes it possible to provide instantaneous throughput measurements, including time intervals between consecutive or non-consecutive cells, from measurements regarding the number of cells received in a given time interval. Such measurements can be performed economically and with the desired accuracy by selecting a time interval of appropriate duration, such as the number of cells to be received in this time interval during normal traffic.

According to another feature of the invention, a plurality of throughput measurements sequentially set for a given virtual circuit are accumulated, and the accumulated values are presented as an accumulated throughput measurement.

According to another feature of the invention, the context comprises at least one data item constituting a throughput counter, between a predetermined value corresponding to the allowed throughput expressed in said predetermined units and one of said throughput measurements. and then compares the reached position of the throughput counter with respect to a particular end position, and generates a signal indicating the need for a corrective operation when this end position is reached or passed.

According to another feature of the invention, the context includes at least one throughput threshold, and the one of the throughput measurements is compared with the threshold to determine in which interval between the thresholds the measurement lies. and correcting the count value as the number of intervals during the determined interval;
It is determined that the count value has reached an end position in the first direction, and a signal indicating the need for a correction operation is provided.

According to another feature of the invention, a plurality of throughput thresholds and count values are provided, and one of the throughput measurements is compared with the threshold to determine in which interval between the thresholds the measurement lies. correcting the Curran I value according to the determined interval; and further determining that the count value has reached an end position in a first direction and providing a signal indicating the need for a correction operation.

According to another feature of the invention, said context includes an allowed maximum throughput indication, and comparing the observed throughput for each cell arrival with said maximum throughput indication;
When the observed throughput is greater than or equal to the maximum allowed throughput, the signal is provided indicating the need for a corrective operation.

According to another feature of the invention, when said throughput counter or said count value reaches a terminal position, a limit throughput value is used in said context, which is dependent on a corresponding throughput threshold that serves the same function as an allowed maximum throughput indication. .

The present invention also provides a memory that allocates to each virtual circuit a storage location containing a data set called a context that defines the evaluation/conditions of the throughput of the virtual circuit, and and a clock signal source designed to provide a current time corresponding to the virtual circuit expressed in a predetermined unit.

The features of the device of the present invention include a means for writing a start time indication into the context of a virtual circuit when one cell of a virtual circuit arrives, and a means for writing a start time indication into the context of a virtual circuit when one cell of the same virtual circuit arrives. means for reading the context from a location; and means for subtracting a start time read by the context from a current time supplied by a clock, and causing the time difference set by the subtraction and the start time to be written. From the number of inter-cell time intervals counted between the time of the first cell and the time of the next cell, a measure of the throughput of the virtual circuit is obtained.

Furthermore, said time difference can be considered to be an instantaneous throughput measurement of a virtual circuit defined as the time interval that elapses between two cells, and the inventive device uses said instantaneous throughput to determine the need for a corrective operation. means for supplying throughput measurements to an evaluation means; and means for determining to write a context with said current time as a start time.

According to another feature of the invention, the context includes a count number of received cells, means for incrementing the count number on each reception of cells of the virtual circuit, and applying the increment count number to a particular count value provided by the context. means for comparing and activating only when the number of received cell counts reaches a certain count value and providing said time difference, defined as the time interval elapsed between two discontinuous cells, as an instantaneous throughput measurement of the virtual circuit; and means for reinitializing the received cell count.

According to another feature of the invention, the context comprises a specific duration of a measurement interval and a number of cells received, means for comparing said time difference with the duration of said measurement interval for each cell reception; incrementing the number of received cells when is less than the measurement interval duration, and incrementing the number of received cells only when the time difference is greater than or equal to the measurement interval duration; the number of cells received in a given time interval; and means for simultaneously re-initializing said number of cells.

According to another feature of the invention, it includes means for accumulating a plurality of said throughput measurements set sequentially for a given virtual circuit and providing the total as an accumulated throughput measurement.

According to another feature of the invention, the context comprises at least one throughput counter, and the content of said counter is corrected by adding the difference between a predetermined value corresponding to the allowed throughput and one of said throughput measurements. and means for comparing the reached position of the throughput counter with a specific end position, and generating a signal indicating the need for a corrective operation when the former exceeds the latter.

According to another feature of the invention, the context comprises at least one throughput threshold, means for comparing one of said throughput measurements to said threshold, and above said threshold starting a throughput counter in a first direction; means for activating in the other direction below a threshold; and means for determining that the throughput counter activated as described above has reached an end position in the first direction and providing a signal indicating the need for a corrective operation.

According to another feature of the invention, the context has a plurality of throughput thresholds and at least one count value, and a throughput measurement is performed to determine in which interval between the thresholds the throughput measurement value lies. means for comparing one of the values with said threshold; and correcting the count value by an amount as a function of the interval determined as above, determining and correcting said count value having reached an end position in a first direction. and means for generating a signal indicating the need for operation.

According to another feature of the invention, the context reads the maximum allowed throughput indication, compares the observed throughput for each cell arrival with the maximum throughput indication, and determines whether the observed throughput is greater than or equal to the maximum allowed throughput. means for providing a signal indicating the need for a corrective operation if the corrective action is necessary.

According to another feature of the invention, each time said throughput counter or said count value reaches a terminal position, a limit throughput value is written into said context depending on a corresponding throughput threshold which serves the same function as an allowed maximum throughput indication. Including means.

According to another feature of the invention, the clock signal source supplies the current time corresponding to the virtual circuit via a clock selection module controlled by a clock signal selection indication provided by the context of the virtual circuit; As a result, the outputs of the master clock are selected such that the least significant bit output characterizes the predetermined unit used to measure the duration involved in the throughput evaluation, and the predetermined unit is such that the evaluation value has the desired accuracy. selected as obtained.

As a result of this, the time representations for virtual circuits can be adapted to the throughput of the virtual circuits themselves, and it is possible to obtain the desired accuracy without increasing the size or number of bits of these representations.

These and other objects and features of the invention will be better understood from the following description based on non-limiting examples illustrated in the accompanying drawings.

First, please refer to FIG. 1, which shows an overall schematic diagram of an embodiment of the present invention. The throughput evaluation system shown in FIG. 1 is inserted between the cell manual ENC and the cell output STC.

The system is inserted into an asynchronous time division multiplexed transmission channel. Specifically, the bit rate of the transmission channel received at the input ENC is, for example, 600 Mpi/sec. This data stream passes through a cell transmit/receive block BREC, illustrated as a shift register. As long as the throughput or bit rate of the virtual circuit supported by the link is acceptable, all cells received at the input ENC will experience a delay equal to the transmission time of one cell, e.g. about 0.5 μs. Accordingly, it is sent as is to the output STC.

According to the example mentioned at the beginning of the text, one cell has a 4-character header, where the two 16-bit characters indicate the virtual circuit number. The cell also contains the 32 character message body.

Once the header of one cell enters the block BREC, this header ET is accessed in the processing context access block B
Sent to ACT. The virtual circuit number Cv in the block BACT is used as an address for reading the processing context CT of the virtual circuit to which the received cell belongs from the processing context memory MCT. This processing context C
T consists of a set of digital information, some of which is semi-permanent information that is fixed for the duration of the communication using the virtual circuit, and the rest can change with each reception of each cell of the virtual circuit. This is variable information.

The access block BACT sends the read processing context CTL to the processing block [IT. The block further receives information regarding the input order from the counter block BC. The processing block BT creates an updated processing context CTx based on these two pieces of information,
It returns to the access block BACT so that it is written again to the same address Cv, and generates a signal O20 when the received cell is not within the permissible range.

The updated context CTX contains variable information that is modified as necessary according to the processing program of the block BT as a function of one cell reception, i.e. as a function of the arrival time of the cell indicated by the counter block BC. obtain.

The signal OSC is transmitted to the block [1 REC, and in the first embodiment this signal replaces the received cells in the block BREC with blank cells. In a second embodiment, the signal O
The SC marks the indicator provided in the header of the cell. This mark causes the switching means not to transmit the cell when it later enters the switching means in case of excess throughput.

It is also possible to use the signal OSC for its purpose by making use of the output 5OSC of the signal OSC.

The length of time required by blocks BACT and BT to perform the above operations is preferably equal to the transmission time of one cell, so that these blocks immediately start a new operation cycle after receiving the next cell. Can be restarted. However, as is known in the art, access block B to C
In order that each of the processing blocks BT and BT can fully use the time of one cell for processing operations related to the cell, the read-processing-rewrite operations of the context for a given received cell can be performed in the same way for the immediately following cell. The operations of the two blocks may be managed to overlap operations.

The context data CT is first written into the memory MCT by a control processor (not shown) connected to the access block BACT by a link CMP.

For each write operation, the processor supplies the virtual circuit address CV and context information 1cT. Block B
The ACT may be configured, for example, to include blank cell identification means and to perform a new context write process within the reception time of each blank cell.

The block BACT finally contains an operation monitoring device, whose operation reports the processor reads by means of the link CMP.

The blocks BREC, BAC, BT, and BC are shown inside the frame surrounded by dotted lines, and as will be explained later, these blocks are designated as application-specific integrated circuits (SIC).
This is because they are collectively formed in the shape of .

In the following description, the transmitting/receiving block BREC will not be explained in detail, but this block is essentially a shift register. Also, the counter block BC will not be described in detail, but this block is simply a binary counter that is incremented by a step every period of the internal clock and cycles through all positions. The number of stages of this counter will be described later. Although the access block BACT will not be described in detail, the function of this block is clearly defined, and the method of manufacturing this block and the technique of combining this block with the memory MCT will be obvious to those skilled in the art. . Only the processing block BT will be explained in detail below.

This processing block BT is shown schematically in FIG. The block includes six types of processing modules, namely:
at least one clock selection module MSI+;
at least one throughput I/measurement module MMD
and at least one result quantization module MQR;
It comprises at least one result reduction module MRR, at least one count management module MGC and at least one judgment module NSC.

The clock selection module MSu is shown in FIG. FIG. 3 also shows a block B consisting of a series of binary stages controlled by a clock HG supplying pulses h.
The counter CBC of C is not shown. Output S of counter C [lC
O to S(d+m+e) are coupled to a clock selection module. The module further includes an access block B
From the context provided by ACT) CT, e+
A tarokk selection display 5elh consisting of a binary display that can sequentially take on the value of 1 is received. This indication is given to m multiplexers-01 to M0m, so that all multiplexers have the same orientation. Each of these multiplexers is connected to one output group with e+1 outputs of the counter CBC, the m output groups themselves shifting by one or more outputs from multiplexer MUI to multiplexer MUm. Therefore multiplexer Mt
ll is connected to the outputs Sd to S(d+e) of the counter,
The multiplexer 811m outputs S(d+m)~Db=
Connected to S(d+m+e). Finally, the outputs M1 to Mm of the m multiplexers are the effective picks of U to u+m.
- provides the current time he in binary form. The valid bit U depends on the display value 5elb. Each virtual circuit therefore has a clock signal defined by its processing context representation 5elb and appropriate to its throughput or bit rate.

However, what is particularly noteworthy is that a plurality of clock selection blocks similar to the one described above can be arranged together. It will be understood from the following description that all throughput measurement modules utilize the current time provided by the clock selection module.

When all measurement modules can use the same current time, only one clock selection module is required as shown in FIG.

It may be necessary to supply the various measuring modules with different current times, in which case as many clock selection modules as measuring modules are required.

The processing block BT then includes one or more throughput measurement modules HMDI to MMD3.

First, the module 1481)1 will be explained based on FIG. This module receives the following information from the context CT provided by block IIACT.

the duration T of the measurement time interval expressed as a period U; the value of the period U; the start time hal of the measurement time interval T set later on the basis of the current time he;

The number of cells nl that have been received in the time interval T at the current time.

Number of bits in one cell B.

Module MMDI also receives the current time hc provided by module MSI+.

Module MMDI calculates the difference hc-hat. When this difference is less than 1, the value n1x=nl+1 is
It is given to CT in yriB and replaced with the value n1 of context CT. Conversely, when the difference is 1 or more, the later module MQR,
A validation signal Vall with a value Dml=nl is given to Ml(R or MGC. At this time, the value n1x-1 and the value halx=hc are given to the CT to block B, and these values are the values of the context CT. Values nl and h
It is written by replacing it with al. Therefore, the start time written in the processing context CT is the reception time of the preceding cell whose value n1 is equal to l.

Throughput 1-D is thus set at the end of each measurement interval of duration at least equal to T. This indicates the number of bits received per second when the period U is expressed in seconds. However, as pointed out above,
Dml=nl and the measurement result does not include the factor B/(T*u). Therefore, module MMDI does not need to receive the values U and B from the processing context; these values are used only when utilizing the results.

It will be explained later that these factors that do not exist in the measurement result are used in a block that utilizes this measurement result. Furthermore,
It should also be understood that the value B may be a constant of the transmission system and that the value lower may be a constant of the evaluation system. In this case, these values are not supplied by the context CT, but are included as constant values in the modules of the processing block BT.

Finally, it is necessary to mention the measurement of the measurement time interval T. Although this measurement is not exact, it is sufficiently accurate. In fact, as described above, this period is fixed to 1 after receiving a predetermined number of cells starting from the arrival time of one cell.

Cells are then counted until a cell is received for which the difference he-hat exceeds the measurement time interval. Since the measurement interval has ended, the last cell is not included in the throughputs 1~ display, but is included in the count for the next measurement interval. Therefore, all cells are counted. Gaps between measurement time intervals reduce accuracy. The error is less than a fraction of the number of cells counted per measurement time interval. When the number of cells in the planned average sloop-sort is large enough, the error can be ignored.

The throughput measurement obtained by the module MMDI as described above is given by the number of cells received in the measurement time interval up to the arrival of the cell under consideration.

The module MND2 in FIG. 5 receives, in addition to the time ha obtained from the clock selection module MSH, the value B defined above and the value hc2, which is the current time and has been read during reception of the preceding cell. These two values are in block B
It is obtained from the processing context CT given by ACT.

Therefore, module MMD2 calculates the difference hc for each arrival of each cell.
-1+a2 and provides the validation signal Va12 with the value 0m2 = he -hc2 for the next module MQR, MRR or MGC. module M
MD2 is also replaced by the value hc2 in Context 1-CT
value written to ha2x = he to block BACT
supply to.

Strictly speaking, the throughput set as above for each cell reception must be a value calculated by 2B/(hc - hc2) * u, but the measurement result 0m3 includes the number of times B and U. Not yet. These factors will be used in the next module as described below. The value B may be a constant of the transmission system as before.

In the case of this module MMD2, the throughput measurement is directly given by the time interval elapsed between the immediately arrived cell and the preceding cell of the virtual circuit under consideration.

In addition to the current time 11c obtained from the clock selection block MSH, the module MMD3 of FIG. received value hc3, the count number 03 of received cells in a group of N cells, and the value N that the count number of cells in one group should reach.

These various values are obtained from the processing context CT.

Module MM[)3 first sets count number n3 to n3x
=n3+l and then compare the count number n3x to the value N. When n3x<H, module MMD3 gives callan I/number n3x to block BACT and updates processing context CT (value hc3 remains unchanged). When n3x=H, module MMD3 calculates the difference he-ha3,
A validation signal Va13 with the value Dm3=he-hc3 is supplied to the subsequent module of type MRR, MQR or MGC. Also, the value ha3x-he and the value n3x=o are supplied to the block BACT, and these values are replaced with the values hc3 and n3 and written under the context C.

The exact value of the throughput set as described above for each reception of each cell is expressed by the formula B * N/ (he - hc3)
*Denoted by u, but factors B, N and U are measurement results of 0
It is not remembered by m3. These factors are used in subsequent modules. In addition, the value B is the transmission system 1 as described above.
It may be a constant of 1. The value N may be a constant of the rating system.

The throughput measurement provided by module MMC3 is denoted as the duration of the time interval required for reception of N cells. This measurement may also be thought of as the average time interval between consecutive cells, evaluated for N cells, multiplied by the same N constant.

The processing block BT then includes at least one result quantization module M (IR), which may have the shape of the module MQRI shown in FIG.

The module MQRI is the measured value Dm of the measured sloop 7+, i.e. the measurement result DIllll, 0m2, Dm3 obtained from one of the preceding modules MMD1 to MMD3.
and a throughput threshold Di obtained from the processing context CT. The module MQR■ compares them with each other and generates a result signal ROi when the measured throughput value is less than a threshold value, and generates a result signal Rli when it is above the threshold value. These signals are either processed in the next module MRR or fed directly to one of the count management modules MGC.

In a modification, the result quantization module MQR may have the shape of the module MQR2 shown in FIG. Module MQ
R2 receives the value Da from the context CT in addition to the values Di and DI11. The values Di and Da are module MQ
Combined within R, the threshold scale Di, Di+Da, Di+
2* Da, , Give *Da to Di+. The module compares the value Dn+ with this set of thresholds and generates a result signal RiO only when it is below the minimum threshold, generates a signal Rli when it is greater than or equal to the set of thresholds Di and below the subsequent thresholds, and in the same way thereafter when Dm is the highest. A result signal R(k+1)i is generated only when the large amount Di+ is greater than or equal to *Da. These signals are either processed in the result reduction module HRR or fed directly to the count management module MGC.

The module MQR2 may be further modified such that the different values of the threshold display scale are provided directly by the context.

The result reduction module MR″R is an arbitrary element.The module MRR is a throughput measurement module MHDI~N
It may be deployed after MD3 or after the result quantization module MQR. An example of such a module is shown in FIG. The function of the module is to accumulate several measurements, quantized or unquantized. This module receives the following values from processing context 1-CT.

- Number of measurement results to be accumulated C1 1 Number of accumulated results C5 - Cumulative value mc of 0 measurement results obtained.

The module further includes a measurement result R such as Dml, 0m2 or Dm3 from the previous throughput measurement module.
m or result signal R101Ril from a previous result quantization module. 11, Receive Rik+1. After fi, the module receives a validation signal Val, such as a signal Val, Va2 or Va3, from the measurement module that gave the measurement result.

Based on the above signals, the module MRR is reduced to a number c
Set x=c+1 and compare this number with number C. At the same time module MRR calculates the sum mcx=mc+Rm.

When ax<C, the number of results to be accumulated has not yet been reached, so module MRR supplies the values C and me to update the processing context CT. When CX=C, the module MRR supplies CX=O and mcx=o to the context and supplies a subsequent block, for example a result quantization block MQR or a count management block MGC, with a validation signal Vlr and a measurement result signal RRmme. . These two pieces of information are used by the throughput measurement modules MMDI, M14D for subsequent blocks.
2. It has the same meaning as the information Val and Dm of MHD3.

Next, two modified examples of the count management module MGC will be explained. MC and C1 shown in FIG. 10 are used when throughput is measured, for example, by a throughput measurement module MMDI or a result reduction module NRR used in conjunction with such a measurement module. The modified module NGCI determines the throughput value Vm provided by the module when there is a corresponding validation signal Valv (obtained from the validation signal Vall or Vlr as described in f&) upon cell reception; (i.e. DIll or RRm) directly. Furthermore, the module NGCI obtains a throughput threshold Ds, a throughput minimum value Do, a throughput counter position CPi, and a maximum count threshold C from the block BACT.
M^X and the minimum count interval value CMIN are received. These are the information provided by the context CT,
All are expressed in the same unit, here the number of cells. The minimum count threshold may be O. In this case, this value is not provided by the context.

In this first variant, the module NGCI compares the value Vm with the throughput value DO. When Vm<Do, no operation is performed and the context information remains unchanged. V
When n+ is equal to or larger than group Do, the count number CPi is increased by Vm and decreased by Ds, and a count result CPx is obtained. Compare this value to CMAX. CPx > CM
When AX, the result is modified to CPx=CM^X and written to context CT. This means that the throughput is always above the minimum value, i.e. outside the "silence" period, and the throughput evaluated by the counter is always above the throughput threshold D.
When the counter CPi is maintained below the value CM
This means that AX is reached and maintained at this value. This provides leeway when an over-threshold condition occurs later. At the same time, the result CPx is compared to the value CMIN. When CP<CMIN, the result is modified to CPx=CMIN. At this point, the instruction 0SSCI is sent. This instruction, along with other instructions of similar modules, uses the signal 0SC
(Refer to the explanation regarding Figure ■). This indicates that the throughput has exhausted the margin and exceeded the threshold D9. This instruction identifies the offending cell as an excess cell and causes corrective action to be taken. The instruction osct is also written into the context. This prevents unexpected excesses in throughput from carrying over to the next measurement period. Finally, when CMAX < CPx < CMIN, the value CPx is changed to context 1-C without requiring any pond operation.
T becomes the value CPi.

From the above modification of the count management module, the measured value V+ is determined by the throughput measurement module MMD2 or MMD3.
a result number reduction module M provided by or used in combination with one of said modules.
It will be clear that variants such as those provided by RR can be created. The information provided to the count management module consists of units of duration defined by the selected clock signal.

In this variant of the first variant above, the module MGCI compares the value Vm to the throughput value DO.

When Vm>Do, no operation is performed and the context information remains unchanged. When Vm<Do,
The count number CPi decreases by Vm and increases by Ds.

The count result CPx given as a result is CMI
compared to N. When CPx<CMIN, the result is C
Correct Px=CI4IN and write this to the context CT. This means that when the throughput exceeds the minimum value, i.e. when the "silence jitllr81" is outside and the interval between cells is below the minimum value, and when the throughput evaluated by this counter is always below the throughput threshold Ds. , which means that the counter CPi reaches the value CMIN and remains at this value.This gives a corresponding margin in case the threshold is exceeded later.Similarly, the result CPx is compared to the value CMAX. CPx > CMAX node”, the result is CP
Correct it to x=CM^X. The instruction 0SCI (see above) is now issued. This instruction also contains the context C
Written to T. Therefore, the exceedance of the throughput threshold Ds occurs after the possible headroom has been exhausted. The cell that caused this process must be marked as an excess cell. Finally, if CMAX >CPx<CMIN, the value of CPx becomes the value CPi of context CT without any other operation.

Next, the third variant of the count management module MGCI will be briefly explained. This module processes the information given by the result quantization module of the MQR1 type shown in Figure 7.The variant of this module corresponds roughly to the first two variants, the only difference being that the information supplied to the module MQR1 is The throughput counter moves forward or backward depending on whether the threshold Di is exceeded.

The second variant of the count management module MGC2 is the 11th
This modification, shown in the figure, shows that the measured values are in the module M of FIG.
Used when provided by a result quantization module such as QR2. For each cell, the module MQR2 characterizes threshold exceedances for different thresholds.

That is, module MQR2 detects R1 indicating that the measured value is present in the interval between threshold j and the next threshold j+1.
j display (i-threshold scale, j -0.

, , gives +1)). A value Rlj corresponding to one of these thresholds is given to the count management module MGC2 together with a validation signal vlaw. This validation signal is supplied from a measurement module that provides a quantized measurement result, and simultaneously includes a count value SPi, a maximum count threshold SM^X, a minimum count threshold 5HIN, and a count scale Kij, which are set each time a preceding cell is received, as will be described later. provided to module MGC2.

The count scale Kij is a - group of count values, one corresponding to each value Rlj.

According to the information Rlj, one of the values of the count scale Kij is excited and this value (positive or negative) is added to the count value SPi. Next, the corrected value SFX is set to the maximum threshold SM
^Compared to X. Command 0SC when SPx>SM^X
An instruction 0SC2 similar to I (see above) occurs. At the same time, the corrected value SP is compared to the minimum threshold value 5HIN.

When SPx<5HIN, the value SPx is 5Px=5HIN
limited to.

No other operations are performed.

The same representation Rl provided by the result quantization module
j is communicated to a plurality of count management modules MGC2 having different count scales. As a result, it is possible to evaluate the throughput of a virtual circuit using different criteria.

The count scale Kij may be a constant of the evaluation system.

In this case, the count scale is not provided by the context but is written to module MGC2. According to a variant, a plurality of separate counting graduations are written in the module MGC2. The information Kij specifies one of these scales and causes the module MGC2 to select and execute this scale.

Regardless of which count management module is used, the use of instructions OSCi, such as 0SCI or 0SC2, also has the advantage of partially inhibiting updating of the processing context CT. In the case of the MMDZ type module, replacement of the start time ha2 with the current time hax is prevented. As a result, it is assumed in this module that the cell on which the correction operation was performed did not exist. Additionally, the counter(s) of the count management module(s) may be configured not to be updated. Therefore, all excess cells are removed and the virtual circuit is maintained at an acceptable throughput. More generally, no updating of the processing context CT is introduced. In this case, the cell that gave rise to the corrective operation is considered not to have been received by the evaluation device.

Next, the instant correction module NSC will be explained based on FIG. 12. This module complements the module MMDI and the modules following it to handle over-throughput situations. For each cell arrival, this module receives from the module MMDI the value nlx of the number of cells received in the current measurement interval. It also receives a validation signal Vall from the same module MMDI at the end of each measurement interval. The module NSC also receives a maximum threshold value Dsll and a plurality of intermediate threshold values Dsi from the context CT and receives signals corresponding to the correction operation commands OSCi from a count management module coupled to the throughput measurement module MMDI. This command has been written in advance to the context CT using the procedure described above.

For each cell arrival, the throughput measurement indicated by the number of cells nlx received in the measurement time interval is the maximum amount Dsm.
compared to When nlx>Ds+n, instruction 0SC3
is sent. This generates an instruction OSC to start a correction operation on the arriving cell. Therefore, when a maximum number of cells are received and successfully processed in one measurement interval, subsequent cells are considered as excess cells. In this way, a limited number of mutually close cells can arrive with high instantaneous throughput. These cells are module MH
If this high throughput persists, the passage of cells exceeding a maximum threshold defined for the duration of the relatively long measurement time interval is prevented, although they are not eliminated by the measurements carried out by D2 and/or MHD3. Such a procedure is not applied to the reception of the last cell of the measurement time interval when the signal Vall is present.

In the above case, the context update is prohibited by rejecting the received cell, so that all cells subsequently received up to the end of the measurement period (+T!ll
It is also possible to design a procedure in which the cell is rejected as well (with the exception of the first cell received after a period of time).

Furthermore, the module NSC is a count management module that processes the measurement results given from the module MMDI.

- upon receiving an instruction osct generated by one of the rules from the context, selects the value of the corresponding intermediate threshold Dsi given by the context CT;

If the threshold is exceeded, the number of cells nlx is also compared to this threshold in order to generate the instruction 0SC3. This process occurs in particular when the number of received cells eventually exceeds a defined threshold after exhausting the headroom margin at the end of the measurement interval. The above-described procedure regarding the maximum threshold value reduces threshold exceedances. The purpose of using intermediate thresholds is to keep the occurrence of new threshold crossings to a low level. This level is
This is the level that causes the writing of the instruction OSCi.

Although not explained here, if the corresponding excess condition does not reappear, the command 0 is removed from the context at the end of the next measurement period.
A processing procedure such as deleting SCi is also possible.

According to the invention, a module similar to module NSC of FIG. 12 may be deployed coupled to module MHD2 or MHD3. The details will be easily inferred from the above description, so no explanation is necessary.

Next, the overall configuration of the processing block BT will be explained based on FIG. 13. FIG. 13 shows the module MMDI of the block BT of FIGS. 1 and 2 in a given virtual circuit C.

MHD2, MM[13, MRR, MQRI, MRR2
, MGC2, two modules NGCI, and one module NSC.

For each arrival of each virtual circuit cell C, M[12
provides a throughput measurement value md2 including a validation signal Va12 and a throughput threshold value 0m2 shown in FIG. This value is the duration of time that separates an arriving cell from a preceding cell of the same virtual circuit. This value is input to the result quantization module MHD3. Within the latter module, this value is compared to a threshold given by the context, taking into account the configuration conditions of the throughput measurements, in particular the clock period U in which the measurements were expressed. Module MHD3 provides an output signal ndi to count management module MHD3. The signals include the result signals RiO, . . . Ri(k+1) of FIG. 8 that define the throughput level. The module's count value changes according to a count scale for each measured throughput level, and the counter's range from 1 to 1 defines an over-threshold tolerance. Persistence of exceeding the threshold generates a rejection order 0SC2.

At the same time, the module MHD3 counts the arrival of one cell and, when the count indicated by the context is reached, sends a throughput measurement md3 to a count management module of type MGC1 similar to FIG. 10. Optionally, MGCI may be preceded by a result quantization module, such as module MQRI. This throughput measurement value includes a validation signal Va13 and a throughput value Dm3 shown in FIG. The value Dn3 is the duration of the time interval separating the arriving cell from the Nth previous cell of the virtual circuit. This throughput value is the module NGC
is added to the contents of a throughput counter managed by I, and a value corresponding to the allowed throughput is subtracted from this value. This latter value is also given by context and takes into account the throughput measurement conditions, in particular the duration of the clock period in which the measurement was taken.

In fact, the counter adds a value corresponding to the difference between the authorized throughput and the measured throughput, in other words the deviation from the specified throughput. This deviation relates to the average time interval evaluated on a group of N cells. Such deviations thus cover a much longer period than the period evaluated on the basis of measurement module MMD2 and hide throughput spikes appearing in two or three cells very close to each other. After R, the duration of the overrun (throughput) causes the command 0SCI to be generated, so that the signal OSC is output as described above.

Also at the same time, module MMDI counts the arrival of one cell within the measurement time interval. When the measurement time interval ends, the number of cells received during this measurement interval is sent out as the measurement result dml. This measurement result dm
1 includes the validation signal Vall and the throughput value Dml shown in FIG. A plurality of such measurements are accumulated by module MRR. When the accumulation period ends,
The module MRR converts the measurement result rff+ including the validation signal Vlr and the measurement result value RRm of FIG. 9 into M(:
Send to C1 type count management module. The operation of this module has already been explained. Here again, the subtracted value is defined taking into account the throughput measurement conditions. As a result, a sustained excess of throughput will generate a reject instruction 0SCI. The combination of the measurement time interval defined in the module MMDI and the accumulation module MRR makes it possible to carry out an evaluation of the throughput that covers a relatively long period of time and thus provides a high degree of accuracy.

With one measurement module MMDI and different accumulation modules MRR, different measurement results for different accumulation periods are obtained.

Furthermore, the module NSC receives the number of cells nlx received in the measurement time interval, compares it with a threshold value as described above and issues a rejection command 0SC3 in case of a sustained excess of throughput. This module also receives rejection instructions 0SC2 and 0SCI from modules MGC2 and NGCI to set throughput limits that are used to reject cells of a virtual circuit if the virtual circuit's throughput continues to be exceeded.

Finally, the context corresponding to the application example in Figure 13) CT
An example will be explained based on FIG.

FIG. 14 shows storage locations each subdivided into rectangular spaces. The number in parentheses in the lower right corner of the space indicates the number of bits. Numerical values and other displays are the same as in the modules shown in FIGS. 3 to 12.

The clock selection display 5elh consists of 4 bits. This display can select one clock signal out of sixteen. When the current time of the clock contains 17 bits, the counter CBC contains over 32 bits.

The current time supplied by the clock and the number of bits of the start time indication written into the context are determined by the problem posed by a temporally inactive virtual circuit. When the virtual circuit's clock performs one complete cycle without receiving any cells, a rejection decision should not be made when the throughput is actually very low. To solve this problem, for example, the connection source can be configured to require a minimum throughput, otherwise the connection is cut off. This creates an artificial throughput. This throughput becomes smaller as the clock cycle of the virtual circuit becomes longer, or in other words, as the number of current times increases.

Next, the 17-bit start time IIal and number of received cells nH11 pin-) required for module 114D1
and a clock period vLT (11 bits) defining the duration T of the measurement time interval.

When the average rated throughput of the virtual circuit under consideration is 2 Mbit/s, the lowest pip I of the virtual circuit-related clock signal selected by indication 5elh has a duration of 8 μs. In contrast, for cells of approximately 300 bits, the average interval between cells is 150 μsec. average 100
The measurement time interval covering the reception of cells must be at least 15,000 microseconds, or approximately 2000 clock periods. Therefore, an 11-bit value is required to define the representation T. On the other hand, the number of bits required to count the number of cells received in the measurement time interval is
It must accommodate the average throughput that can be expressed as an 8-bit number up to the maximum number of cells allowed in that time. Therefore, the number 01 has approximately 20% of the average throughput.
It gave 11 bits I, which corresponds to a double maximum possible throughput. As a result, the thresholds Dsm and Dsa required by the decision module NSC have the same number of bits (11).

Display 1 required for modules Mt41)2 and MM[)3
1a2 and he3 are 17 bits and are based on the same clock signal.

Measurement of time interval between two consecutive cells is approximately 5%
It will be carried out until This lack of precision is acceptable since the purpose of the measurement is to block the most significant and shortest throughput spikes.

The measurements obtained by module MMD3 are clearly more accurate. In response to this request from module MMD3, context I further provides the value of the number of received cells n3 (6 bits) and the value of the number of cells to be received N (also 6 bits). It is therefore possible to measure the average time interval of 1 to 63 cells.

The similar values C and C required for the result reduction module MRR are also 6 bits to 1, respectively, giving the same possibilities. Therefore, the cumulative value me of module MRR is 11+6=17 bits.

The threshold Di and the threshold increment Da required for the result quantization modules MQRI and MQR2 are 17 bits and 6 bits, respectively. The time difference he-ha3 or he-he2 is 17
It can have bits. Therefore, it is compared to a 17-bit threshold that separates the 6-bit number.

The threshold value Ds required for module MGCI consists of 17 bits. The reason is that the cumulative values given by module MRR contain the same number of bits.

Here, it is assumed that the threshold value Do is zero. The counter CPi controlled by this module has 20 bits. The value CMAX is also <20 bits. Value CMIN
can be zero or a constant, so it does not exist in the context.

Also, the count value 5Pi (4 values of 6 bits each)
and the associated thresholds SM^X (4 thresholds of 6 bits each) were also mentioned. The threshold value 5HIN is also assumed to be zero or a constant. Finally, the illustrated context also includes a maximum threshold Dsm of 11 bits required by the instant rejection module NSC of FIG. 12 and an application threshold Dsa of <11 bits.

A similar virtual circuit with an average rated throughput of 4 Mbit/s would be processed in exactly the same way, except that the clock signal specific to this virtual circuit would be different. A virtual circuit with an average throughput of 2 to 4 Mbit/s is processed using a virtual circuit clock signal of 4 Mbit/s.
(shortened), threshold Di of modules MQR1 and MQR2 (increased) or value Ds of module NGCI
(decreased from FIG. 13) as appropriate.

Furthermore, virtual circuits with the same average rated throughput 1~ are allowed more or less noticeable throughput spikes. Different thresholds Di and D for modules HQRI and MQR2
You may also use a. The organization of the modules may be modified as indicated in the description of these modules.

The procedure has been outlined above. Values not explained but required can be added in the same way.

It is also possible to use values that can be considered constants or values that are selected from a small group of constants that can reduce the dimensions of the context. Codes that can save a considerable amount of data that must be stored in memory with only a modest increase in circuit complexity. methods are well known to those skilled in the art.

There are no technical problems in putting the throughput evaluation device of the present invention into practice, and the various elements described above only need to perform simple logical and arithmetic operations. As shown in FIG. 1, the assembly of blocks BREC, BACT, BT and DC can be manufactured in the form of a SIC device, ie an integrated circuit. In the current state of the art, the memory MCT containing the context will be an independent element. Processing block B
Since the T has a Mosier-style construction, it can be easily adapted to a variety of desired uses. The application of FIG. 13 is just one example; other arrangements are possible. However, all these separate organizations are accessible with a sufficient number of modules of different types and organization means, e.g. (registers and organizing switches) from the same integrated circuit.

[Brief explanation of drawings]

1 is a block diagram of one embodiment of the present invention, FIG. 2 is a block diagram of a processing block BT of the system of FIG. 1, and FIG. 3 is an embodiment of the clock selection module MSI of FIG. FIG. 4 is an explanatory diagram of the first embodiment of the throughput measurement module MMC of FIG. 2, and FIG.
FIG. 6 is an explanatory diagram of the second embodiment of the throughput measurement module MMD in FIG. 2, FIG. 7 is an explanatory diagram of the third embodiment of the throughput measurement module NMD in FIG. An explanatory diagram of the first embodiment, FIG. 8 is an explanatory diagram of the second embodiment of the result quantization module MQR in FIG. 2, FIG. 9 is an explanatory diagram of the embodiment of the result reduction module MRR in FIG. 2, 10 is an explanatory diagram of the first embodiment of the count management module MGC in FIG. 2, FIG. 11 is an explanatory diagram of the second embodiment of the count management module MGC in FIG. 2, and FIG. 12 is an explanatory diagram of the second embodiment of the count management module MGC in FIG. An explanatory diagram of an embodiment of the judgment module NSC, FIG. 13 is a schematic diagram of the functional assembly of various modules of the specific virtual circuit processing block BT in an example of use of the present invention, and FIG. 14 is a diagram suitable for the example of use of FIG. 13. It is an explanatory diagram of an example of a context. BREC・・・・・・Cell transmission/reception block, BACT・
... Access block, BT ... Processing block, IIC ... Counter block, HCT
...Processing context memory, MSH...
・Clock selection module, MMD...Throughput measurement module, MQR...Result quantization module, MRR...Result reduction module,
MGC・・・Count management module, NSC・
...Judgment module. shi = b-

Claims (21)

[Claims] (1) In order to evaluate the throughput, that is, the bit rate, of a virtual circuit that transports cells using an asynchronous time division multiplexed transmission channel, a storage location containing a data set called a context that defines the evaluation conditions for the throughput of the virtual circuit. is allocated to each virtual circuit, and includes means for reading the context of the virtual circuit to which the cell belongs for each reception of each cell in order to evaluate the throughput of the virtual circuit, and is further expressed in a predetermined unit. A method comprising the use of a clock signal designed to provide a current time associated with said virtual circuit, wherein upon arrival of one cell of said virtual circuit, one start time indication is written to said context of said virtual circuit. In rare cases, upon the arrival of the next cell of the same virtual circuit, said context is read from the memory location assigned to said virtual circuit, and then from the current time given by said clock signal, the start time read from the context. The time is subtracted to calculate the time difference, and from the time difference and the number of inter-cell time intervals counted between the cell in which the start time was written and the time of the next cell, the virtual circuit is calculated. A method for evaluating throughput of a virtual circuit, characterized by obtaining a measured value of throughput. (2) In order to evaluate the throughput of a virtual circuit that carries cells using an asynchronous time-division multiplexed transmission channel, a memory location containing a data set called a context that defines the evaluation conditions for the throughput of the virtual circuit is using memory allocated to the circuit, and means for reading the context of the virtual circuit to which the cell belongs for each reception of each cell in order to evaluate the throughput of the virtual circuit, and further comprising means for reading the context of the virtual circuit to which the cell belongs in order to evaluate the throughput of the virtual circuit, and further comprising: A method comprising the use of a clock signal designed to give a corresponding current time, in which for each cell arrival of said virtual circuit a start time indication is written in the context of the virtual circuit, and the next cell of the same virtual circuit For each arrival of a cell, the context is read from a memory location assigned to the virtual circuit, and a time difference is established by subtracting the start time read from the context from the current time given by the clock signal. ,
said time difference constitutes a measure of the instantaneous throughput of the virtual circuit defined as the time interval elapsed between two cells and expressed in a predetermined unit, said measure of instantaneous throughput determining the need for a corrective operation; 2. A method according to claim 1, characterized in that the current time is supplied to the evaluation means at a time of 2000, and the current time is written into the context as a start time. (3) The context includes a count number of received cells, the count number is incremented for each reception of each cell of the virtual circuit, the incremented count number is compared with a specific count value, and the count number of received cells is determined to be the specific count value. providing said time difference, defined as the time interval elapsed between two discontinuous cells, as a measure of the instantaneous throughput of the virtual circuit and reinitializing the received cell count only when . A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to claim 2. (4) the context includes a start time of a measurement interval, a specific duration of the measurement interval, and a number of received cells, and for each cell reception, comparing the time difference with the measurement interval duration; Further, the number of received cells is incremented when the time difference is less than the duration of the measurement interval, and the incremented number of received cells is increased to a given value only when the time difference is greater than or equal to the duration of the measurement interval. provided as a measurement of the average throughput of a virtual circuit defined as the number of cells received in a time interval, at the same time the number of received cells and the start time of the measurement interval are reinitialized. 1. A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel as described in 1. (5) A plurality of throughput measurement values sequentially set in a given virtual circuit are accumulated, and the accumulated value is presented as a measurement value of accumulated throughput. A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to item 1. (6) the context includes at least one data item constituting a throughput counter, and the difference between a predetermined value corresponding to the allowed throughput expressed in said predetermined unit and one of said throughput measurements is added; Accordingly, the content thereof is corrected, and then the reached position of the throughput counter is compared with a specific terminal position, and when the terminal position is reached or passed, a signal indicating the necessity of a correction operation is generated. 6. A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of claims 1 to 5. (7) having a plurality of throughput thresholds and count values;
comparing one of the throughput measurements with the threshold value to determine in which interval between the threshold values the measurement value lies, correcting the count value according to the determined interval; Use of an asynchronous time division multiplexed transmission channel according to any one of claims 1 to 5, characterized in that it determines that an end position in one direction has been reached and provides a signal indicating the need for a corrective operation. How to evaluate virtual circuit throughput. (8) the context includes at least one throughput threshold, comparing one of the throughput measurements with the threshold, and activating a throughput counter in a first direction when the measurement value is greater than or equal to the threshold; When the measured value is smaller than a threshold, the other direction is activated, and the throughput counter activated as described above determines that the terminal position in the first direction has been reached and provides a signal indicating the need for a corrective operation. A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of claims 1 to 5. (9) If the context includes a maximum allowed throughput indication, the observed throughput for each cell arrival is compared with the maximum throughput indication, and if the observed throughput is greater than or equal to the allowed maximum throughput, perform a correction operation. 9. A method for evaluating the throughput of a virtual circuit using an asynchronous time-division multiplexed transmission channel according to any one of claims 2 to 8, characterized in that the signal indicating the need for an asynchronous time division multiplexed transmission channel is provided. (10) When the throughput counter or the count value reaches a terminal position, a limit throughput value is used in the context depending on a corresponding throughput threshold that serves the same function as an allowed maximum throughput indication. 9. A method for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel as described in 9. (11) A memory that allocates to each virtual circuit a storage location containing a data set called a context that defines the conditions for evaluating the throughput of a virtual circuit, and a means for reading the context of the circuit, and a clock signal source designed to provide a current time corresponding to the virtual circuit expressed in predetermined units, starting in the context of the virtual circuit upon arrival of one cell of the virtual circuit. means for writing a time indication; and means for reading said context from a memory location assigned to said virtual circuit upon arrival of the next cell of the same virtual circuit; and from a current time supplied by a clock signal source. , means for subtracting the start time read by the context, and the time difference set by the subtraction between the cells counted between the cell in which the start time was written and the time of the next cell. An apparatus for evaluating the throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel, characterized in that a measurement of the throughput of the virtual circuit is obtained from a number of time intervals. (12) said time difference constitutes an instantaneous throughput measurement of a virtual circuit defined as the time interval elapsed between two cells, and said instantaneous throughput measurement is provided to an evaluation means for determining the need for corrective operations; and the means to
Claim 11, further comprising: means for determining to write the current time into a context with the current time as a start time.
An apparatus for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel as described in . (13) the context includes a count of received cells, means for incrementing the count for each cell received by the virtual circuit, and means for comparing the incremented count to a particular count value provided by context 1; It is activated only when the number of received cell counts reaches a certain count value, and provides said time difference, defined as the time interval elapsed between two discontinuous cells, as an instantaneous throughput measurement of the virtual circuit, and also when the number of received cells 13. The apparatus for evaluating the throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to claim 12, further comprising means for reinitializing the count. (14) the context includes a specific duration of a measurement interval and a number of cells received, and means for comparing the time difference and the duration of the measurement interval for each cell reception;
incrementing the number of received cells when the time difference is less than the measurement interval duration, and incrementing the number of received cells only when the time difference is greater than or equal to the measurement interval duration received in a given time interval; 14. Asynchronous time division multiplexed transmission according to claim 12 or 13, characterized in that it comprises means for providing as a measurement of the average throughput of a virtual circuit defined as a number of cells and at the same time reinitializing said number of cells. A device for evaluating the throughput of virtual circuits using channels. (15) Claim 1 characterized in that it includes means for accumulating the plurality of throughput measurement values sequentially set in a given virtual circuit and providing the whole as an accumulated throughput measurement value.
15. A virtual circuit throughput evaluation device using the asynchronous time division multiplexed transmission channel according to Item 2 or 14. (16) the context includes at least one throughput counter, means for correcting the contents of the counter by adding a difference between a predetermined value corresponding to the allowed throughput and one of the throughput measurements; 16. Comparing the reached position with the specific end position, and generating a signal indicating the need for a correction operation when the former exceeds the latter. An apparatus for evaluating the throughput of virtual circuits using asynchronous time division multiplexed transmission channels. (17) the context includes at least one throughput threshold, and means for comparing one of the throughput measurements to the threshold; above the threshold, activating a throughput counter in a first direction; below the threshold, activating a throughput counter in the other direction; and means for determining that the throughput counter activated as described above has reached an end position in the first direction and for providing a signal indicating the need for a corrective operation. An apparatus for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of . (18) the context has at least one data item corresponding to a count value and a plurality of throughput thresholds; and means for correcting the count value by an amount as a function of the interval determined as above, determining that the count value has reached an end position in a first direction, and performing a correction operation. 16. A device for evaluating the throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of claims 11 to 15, characterized in that it comprises means for generating a signal indicating the need. (19) If the context includes a maximum allowed throughput indication, compare the observed throughput with the maximum throughput indication for each cell arrival, and signal the need for a corrective operation if the observed throughput is greater than or equal to the allowed maximum throughput. Claim 12, characterized in that it comprises means for supplying.
19. An apparatus for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of claims 1 to 18. (20) Each time said throughput counter or said count value reaches a terminal position, it includes means for writing into said context a limit throughput value dependent on a corresponding throughput threshold that serves the same function as an allowed maximum throughput indication. The apparatus for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to claim 19. (21) the clock signal source provides a current time corresponding to a virtual circuit via a clock selection module controlled by a clock signal selection indication provided by the context of the virtual circuit, resulting in an output group of master clocks; , the least significant bit output characterizes the predetermined unit used to measure the duration involved in the throughput evaluation, the predetermined unit being selected such that the desired accuracy of the evaluation value is obtained. 21. The device for evaluating throughput of a virtual circuit using an asynchronous time division multiplexed transmission channel according to any one of claims 12 to 20.