KR100225791B1 - Substrate for mounting flip chip and its manufacturing method - Google Patents

Abstract

Industrial Applicability The present invention can reliably flip-chip mount a semiconductor element, and reduce the thermal history of the semiconductor element, thereby realizing an improvement in reliability. In the flip chip mounting substrate for flip chip mounting semiconductor elements, the first metal pad 3 and the first metal pad 3 formed on the mounting surface on which the semiconductor element of the substrate 1 is mounted correspond to the arrangement of the electrodes of the semiconductor element. And a second metal pad 4 covering the periphery of the first metal pad 3 and the periphery thereof, a solder resist 5 covering the periphery of the second metal pad 4 and the periphery thereof, and the first metal pad. (3) has a metal bump (6) formed covering the exposed surface, the first metal pad (3) is highly wettable with respect to the metal bump (6), the second metal pad (4) is the metal It is characterized in that the wettability for the bump 6 is lower than that for the first metal pad 3.

Description

Flip chip mounting substrate and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flip chip mounting substrate for flip chip mounting a semiconductor device and a method of manufacturing the same.

Conventionally, in the case of flip chip mounting a semiconductor element on a mounting substrate, a metal bump for electrical connection with a wiring pattern provided on the mounting substrate is generally formed on the semiconductor element side, and one end of the wiring pattern formed on the mounting substrate is formed. Position the metal bumps on the land part and connect them through solder or conductive resin.

There are various methods for forming the metal bumps, but one of the general methods uses solder. Moreover, although there are many kinds of solders, the thing of Sn-Pb process composition (Sn / Pb = 63/37) and the Sn / Pb = 3 / 97-10 / 90 composition are used.

As the structure of the metal bumps, it is preferable to insert and charge an arbitrary core material into the metal bumps from the viewpoint of reworkability to remove the semiconductor element from the substrate after mounting on the mounting substrate, and as the core material, copper balls or Sn / Pb = The 3 / 97-10 / 90 composition is used. In addition, the shape of the metal bump is preferable because it is close to the mushroom or columnar column because the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate is alleviated.

The shape close to the column referred to herein refers to a shape in which the bump height is high with respect to the junction area of the metal bumps. As a method of obtaining such a shape, a method is known in which, after bonding a solder to a semiconductor element, while the solder is still in a molten state, the solder is pulled up by a certain distance to thin the bumps to increase the height of the solder.

However, in the method of forming metal bumps in the columnar phase as described above, the manufacturing process is complicated, and it is necessary to increase the amount of solder to be supplied to form the columnar phase. Increasing the amount of solder is relatively easy by supplying solder as a ball, but in order to supply solder balls to the electrode terminals of a semiconductor element, a dedicated device such as a ball mounter or a jig is required and the supply operation can be efficiently performed. There is a problem that can not be.

Another method of supplying solder is a method of supplying solder to an electrode terminal of a semiconductor element by electrolytic solder plating. This method has the advantage of supplying solder to many electrode terminals at once, but in order to increase the amount of solder, it is necessary to increase the area of each electrode terminal portion to be soldered. The relative height of the metal bumps relative to the wet area cannot be increased.

After the solder is supplied to the electrode terminal portion of the semiconductor element as described above, in the case of forming a metal bump, the semiconductor element itself is also heated to a high temperature when heated to melt the solder. In particular, in the case of forming the metal bumps containing the core material, since it is heated several times, the semiconductor element is also treated several times under high temperature, and there is also a problem that adversely affects its electrical characteristics. In addition, in the case of supplying solder by electrolytic solder plating, there is a problem in that a process for solder plating is complicated, for example, a power supply pattern for electroplating to a semiconductor element must be formed.

SUMMARY OF THE INVENTION An object of the present invention is to provide a flip chip mounting substrate for a semiconductor device which can reliably flip chip mount a semiconductor element, and reduce the thermal history of the semiconductor element for mounting, thereby improving the reliability of the semiconductor element. It is providing the manufacturing method.

1 is a perspective view showing the overall configuration of a flip chip mounting substrate.

2 is an explanatory diagram showing a manufacturing process of a metal bump formed on a substrate.

3 is an explanatory diagram showing a step of mounting a semiconductor element on a substrate surface;

The present invention has the following configuration in order to achieve the above object.

That is, in a flip chip mounting substrate for flip chip mounting a semiconductor element, the first metal layer formed on the mounting surface on which the semiconductor element of the substrate is mounted in correspondence with the electrode array of the semiconductor element, the periphery of the first metal layer and the A second metal layer covering the periphery, a periphery of the second metal layer, an insulating layer covering the periphery thereof, and a metal bump formed by covering the exposed surface of the first metal layer, wherein the first metal layer has wettability with respect to the metal bump. The second metal layer is characterized in that the wettability of the metal bump is lower than that of the first metal layer.

The first metal layer is made of a metal having high wettability with respect to a metal bump having a melting point of 400 ° C. or lower, and the second metal layer is made of a metal having wettability with respect to the metal bump lower than that of the first metal layer. It is characterized by.

The metal bump is characterized in that the surface layer made of a metal having a lower melting point than the core part is coated on the surface of the spherical core part made of metal.

The metal composition of the spherical core portion is solder of Sn / Pb = 3/97 to 10/90, and the metal composition of the surface layer is Sn / Pb = 60/40 to 70/30. do.

The first metal layer is made of any one of copper (Cu), gold (Au), and nickel (Ni), and the second metal layer is made of chromium (Cr), titanium (Ti), and aluminum (Al). Characterized in any one metal.

In addition, in the method for manufacturing a flip chip mounting substrate in which a semiconductor element is mounted on a mounting surface on which a semiconductor element is mounted via a metal bump formed corresponding to an electrode array of the semiconductor element, the mounting surface on which the semiconductor element of the substrate is mounted. A first metal layer having a high wettability to the metal bumps corresponding to the electrode array of the semiconductor element, and having a lower wettability than the wettability to the first metal layer with respect to the metal bumps covering the periphery and the periphery of the first metal layer. After forming the second metal layer and forming an insulating layer to cover the periphery and the periphery of the second metal layer, a third metal layer covering the exposed surfaces of the first and second metal layers is formed by electroplating, and a third The metal layer is heated and melted to form a metal bump on the surface of the first metal layer.

Further, a metal layer having a lower melting point than that of the third metal layer forming the metal bumps is formed on the surface of the metal bumps.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a perspective view showing the overall configuration of a flip chip mounting substrate, Figure 2 is an explanatory view showing a manufacturing process of a metal bump formed on the mounting substrate, Figure 3 is an explanatory view showing a step of mounting a semiconductor element on the mounting substrate. to be.

First, with reference to FIG. 1, the whole structure of a flip chip mounting substrate is demonstrated. In Fig. 1, reference numeral 1 denotes a substrate made of 92% alumina ceramic, and the semiconductor element mounting portion 2 of the substrate 1 has wiring patterns connected to land portions and land portions corresponding to the arrangement of the electrode terminals of the semiconductor elements. 1a) is formed, and the metal bump 6 described later is formed in the land portion. In general, flip chip connection is a method in which an active element surface of a semiconductor element is directed toward a substrate side, and a metal bump bonded to an electrode terminal of the semiconductor element and a land portion provided on the substrate are directly connected. In the present embodiment, the metal bumps 6 are provided in the land portions of the substrate 1 instead of the metal bumps in the semiconductor elements, and the electrode terminals of the semiconductor elements are positioned at the land portions of the substrate 1. The metal bumps 6 are melted and connected to the electrode terminals of the semiconductor device.

The wiring pattern 1a is connected to each metal bump 6 provided in the land portion and the via 1b provided around the semiconductor element mounting portion 2. The via 1b penetrates in the thickness direction of the substrate 1 and is electrically connected to the wiring pattern on the front and back surfaces of the substrate 1. As the alumina ceramic substrate 1, for example, a multilayer alumina ceramic substrate or a substrate for MCM (Multi-Chip Module) having a wiring pattern formed of a thin film is used.

Next, a specific configuration of the semiconductor device mounting portion 2 will be described with reference to FIG. In the semiconductor element mounting portion 2 of the 92% alumina ceramic substrate 1, a first metal pad 3 as a first metal layer is formed at one end of each wiring pattern 1a. The first metal pad 3 is a land portion for forming metal bumps.

The first metal pad 3 is formed simultaneously with the formation of the wiring pattern 1a shown in FIG. In order to form the wiring pattern 1a and the first metal pad 3, for example, 0.1 μm of a titanium (Ti) layer and 0.2 μm of a copper (Cu) layer are formed by a magnetron sputtering method. After forming on the whole surface, a photosensitive resist is apply | coated, the photosensitive resist is exposed and developed, the copper layer of the site | part which forms the wiring pattern 1a and the 1st metal pad 3 is exposed, and it is carried out by the copper addition plating method. The copper layer is formed to a total thickness of about 8 μm.

Subsequently, after the photosensitive resist is removed once, only the wiring pattern 1a and the first metal pad 3 are covered with the photosensitive resist by the photolithography process as described above, and the wiring patterns 1a and Except for the metal pad 3, the titanium layer and copper layer previously formed by sputtering can be removed by etching, so that only the wiring pattern 1a and the first metal pad 3 can be formed on the substrate 1. . The first metal pad 3 of the embodiment has a diameter of 0.165 mm.

Examples of the metal forming the wiring pattern 1a and the first metal pad 3 include metals having high wettability to metal bumps such as the above-described solder, particularly metal bumps having a melting point of 400 ° C. or lower, for example, copper, gold, Nickel and the like are preferably used. When using gold, nickel, etc., it can form by addition plating method similarly to the above example.

At the periphery of the first metal pad 3, a second metal pad 4 as a second metal layer is formed to cover the periphery of the first metal pad 3. The second metal pad 4 forms a chromium (Cr) layer 0.15 μm covering the surface of the first metal pad 3 by the magnetron sputtering method, and after coating the photosensitive resist on the surface of the chromium layer, the first metal The second metal pad 4 is exposed by exposing and developing the photosensitive resist so as to leave a portion that becomes the second metal pad 4 only at the periphery of the pad 3, and etching the chromium layer using the patterned photosensitive resist as a mask. Form. In this embodiment, the second metal pad 4 has an opening of 0.105 mm and a pad peripheral width of 0.04 mm.

Examples of the metal used as the second metal pad 4 include low wettability to the metal bumps described above, particularly alloys having a melting point of 400 ° C. or lower, for example, chromium (Cr), titanium (Ti), and aluminum (Al). Etc. are used preferably.

5 is a solder resist which is an insulating layer, and is partially caught on the upper surface of the second metal pad 4 to cover the outer peripheral portion thereof. That is, the solder resist 5 partially exposes the inner circumference of the second metal pad 4 and covers the second metal pad 4. The solder resist 5 covers almost the entire surface of the substrate 1 except for the exposed surfaces of the first metal pad 3 and the second metal pad 4 on the substrate 1. As the soldering resist 5, photosensitive polyimide is preferably used.

Since the second metal pad 4 has a low wettability with respect to the alloy constituting the metal bump 6, a gold layer 8 is formed on the surface of the second metal pad 4 in contact with the metal bump 6. do. The gold layer 8 is formed by a vapor deposition method, a plating method, or the like. The reason why the gold layer 8 is formed is that since the second metal pad 4 is a chromium layer and plating is more difficult to attach than the copper layer of the first metal pad 3, the first metal pad 3 and the first metal pad 3 and the first metal pad 3 and the first metal pad 3 and the metal layer 3. In order to form a bump forming material such as solder on the surface of the second metal pad 4 by the electroplating method, the second metal pad 4 is uniformly plated. The thickness of the gold layer 8 was sufficient as about 1 micrometer or less, and set it as 0.1 micrometer in this embodiment.

The metal bumps 6 are formed on the substrate 1 as a third metal layer, and are bonded to each other by being aligned with the electrode terminals of the active element surface of the semiconductor element 7.

The metal bumps 6 are formed by the electroplating method, but the structure is made of the core part 6a of the metal bumps 6 and the thin surface layer 6b formed on the surface of the core part 6a. The metal constituting the surface layer 6b uses a low melting point metal with respect to the melting point of the metal constituting the core portion 6a.

In this embodiment, the metal which forms the core part 6a is specifically solder of Sn / Pb # 10/90 composition. The core portion 6a is formed by depositing on the exposed surfaces of the first metal pad 3 and the second metal pad 4 by the electroplating method using the wiring pattern 1a as the power supply pattern (see Fig. 2 (a)). ).

Next, the substrate 1 is heated in a reflow furnace of nitrogen gas heated to about 380 ° C to melt the alloy of the core portion 6a to form a substantially spherical bump (see Fig. 2 (b)). When the alloy of the core portion 6a is melted, the gold layer 8 formed on the surface of the second metal pad 4 is introduced into the alloy, and the wettability of the alloy of the first metal pad 3 and the core portion 6a is improved. On the other hand, the alloy of the core portion 6a is substantially spherical as shown in Fig. 2B because it is not wettable with the second metal pad 4.

In this embodiment, the alloy which forms the surface layer 6b of the metal buff 6 is specifically solder of Sn / Pb # 63/37 composition. The surface layer 6b is formed by spherically forming the core portion 6a and then depositing it on the surface of the core portion 6a by electroplating. Subsequently, the substrate 1 is heated in a reflow furnace of nitrogen gas heated to about 220 ° C., and the alloy of the surface layer 6a on the surface of the core portion 6a is melted to obtain process soldering (see FIG. 2 (c)). ).

In this way, the flip chip mounting board | substrate 1 which has the metal bump 6 in which the thin surface layer 6b of thin thickness was formed in the surface of the core part 6a formed spherical is obtained.

The alloy constituting the core portion 6a does not melt under heating conditions when the semiconductor element 7 is bonded to the substrate 1, and the alloy constituting the surface layer 6b melts under these heating conditions. It is necessary to satisfy.

In the above embodiment, solder mainly composed of Sn and Pb is generally used as the metal constituting the core portion 6a and the surface layer 6b. However, Bi (bismuth), Sb (antimony), Ag (silver) and the like are added. One can also be used.

Next, the process of mounting the semiconductor element 7 on the flip chip mounting substrate 1 will be described with reference to FIG.

As shown in Fig. 3A, first, the semiconductor element 7 is disposed on the substrate 1 on which the metal bumps 6 are formed in the semiconductor element mounting portion 2. On the surface of the semiconductor device 7, a surface electrode 7a such as aluminum is formed, and an electrode terminal 7b is formed on the surface electrode 7a. 7c is a passivation film for protecting the active element surface.

Next, the electrode terminal 7b of the semiconductor element 7 is brought into contact with the metal bump 6, and the reflow furnace is passed through in this state. Upon passing through the reflow furnace, the surface layer 6b of the metal bump 6 melts, and the semiconductor element 7 is bonded to the substrate 1 as shown in Fig. 3B.

The reflow was heated to a temperature at which only the surface layer 6b of the metal bump 6 was melted, and thus was heated to approximately 220 ° C. in the present embodiment.

In this way, the semiconductor element 7 can be joined only by the surface layer 6b of the metal bump 6 while keeping the core 6a of the metal bump 6 as spherical as shown in FIG. 3 (b). have.

As described above, in the present embodiment, when the semiconductor element 7 is bonded to the substrate 1, the heating of the semiconductor element 7 is performed once, and the melting point temperature of the surface layer 6b of the metal bump 6 ( For example, heating to 220 ° C. is sufficient, and the number of times that the heat history is generated is reduced, so that the temperature at which the semiconductor element 7 is heated is also low, so that the thermal effect on the semiconductor element 7 can be suppressed and assembled The reliability of the later semiconductor element 7 can be improved.

In addition, by using the flip chip mounting substrate 1 of the present embodiment, the stress when the semiconductor element 7 is mounted on the substrate 1 can be reduced. That is, in the board | substrate 1 of this embodiment, the metal bump 6 is formed from the core part 6a and the surface layer 6b, and when the semiconductor element 7 is joined to the board | substrate 1, the metal bump 6 is carried out. Only the surface layer 6b is melted, and the core portion 6a maintains its original shape, so that the height of the metal bumps 6 can be increased, and when the semiconductor element 7 is mounted on the substrate 1, the substrate ( The stress generated between 1) and the semiconductor element 7 can be effectively alleviated.

Also in the case of the substrate 1 of the present embodiment, the semiconductor element 7 is slightly separated from the substrate 1 in a state in which the surface layer 6b of the metal bump 6 is molten, thereby joining the metal bump 6 to the junction portion. Can be molded into a columnar shape.

In the present invention, the metal bumps 6 are formed on the mounting substrate 1 without mounting the metal bumps 6 on the semiconductor elements 7, so that the semiconductor elements 7 are mounted. Therefore, a complicated process such as forming the metal bumps 6 in the semiconductor element 7 can be omitted as in the related art, thereby improving the yield of the material in the flip chip mounting process and lowering the manufacturing cost.

As described above, the metal bump is formed on the side of the substrate on which the semiconductor element is mounted, the metal bump is formed of the core portion and the surface layer having a lower melting point than the core portion, and only the surface layer is melted so that the semiconductor element is formed on the substrate. Bond. Therefore, the heating for joining the semiconductor element to the substrate melts only one surface layer and the surface layer of low melting point, so that the heat history acting on the semiconductor element can be minimized and the heating temperature can be lowered to complete. Reliability can be improved.

In addition, since only the surface layer of the metal bump is melted to bond the semiconductor devices, the stress is concentrated on the first metal pad having high wettability with the metal bumps on the second metal pad having low wettability with the metal bumps in the post-bonded state. The bumps can be welded only to the first metal pad to increase the height of the metal bumps, and the stress caused by the difference in thermal expansion coefficient between the semiconductor element and the substrate during mounting can be preferably alleviated.

In addition, by providing the metal bumps for joining the semiconductor elements on the substrate side, the bump formation process on the complicated semiconductor element side can be omitted, and the yield of the material in the flip chip mounting process can be improved, thereby increasing the manufacturing cost. Can be reduced.

Claims (7)

A flip chip mounting substrate for flip chip mounting semiconductor devices, A first metal layer formed on a mounting surface on which the semiconductor element of the substrate is mounted in correspondence with an electrode array of the semiconductor element; A second metal layer covering the periphery of the first metal layer and its periphery, An insulating layer covering the periphery of the second metal layer and its periphery, Has a metal bump formed by covering the exposed surface of the first metal layer, And the first metal layer has high wettability with respect to the metal bumps, and the second metal layer has low wettability with respect to the metal bumps with respect to the first metal layer. The method of claim 1, wherein the first metal layer is a metal having high wettability to the metal bump having a melting point of 400 ° C or less, and the second metal layer has a wettability to the metal bump lower than the wettability to the first metal layer. Flip chip mounting substrate, characterized in that the metal. The flip chip mounting substrate according to claim 1, wherein the metal bumps are coated with a surface layer made of a metal having a lower melting point than that of the core part on the surface of the spherical core part made of metal. 4. The solder according to claim 3, wherein the composition of the spherical core portion metal is Sn / Pb = 3/97-10/90 and the composition of the metal of the surface layer is Sn / Pb = 60/40-70/30. Flip chip mounting substrate, characterized in that. The method of claim 1, wherein the first metal layer is made of any one of copper (Cu), gold (Au), nickel (Ni), and the second metal layer is chromium (Cr), titanium (Ti), aluminum ( A flip chip mounting substrate comprising any one of Al) metals. In the manufacturing method of a flip chip mounting substrate for mounting a semiconductor element via a metal bump formed on the mounting surface on which the semiconductor element is mounted corresponding to the arrangement of the electrodes of the semiconductor element, On the mounting surface on which the semiconductor element of the substrate is mounted, a first metal layer having high wettability with respect to the metal bumps is formed in correspondence with the arrangement of the electrodes of the semiconductor element, covering the periphery of the first metal layer and its periphery, After forming a second metal layer having a lower wettability than the wettability to the first metal layer, and forming an insulating layer to cover the periphery and the periphery of the second metal layer, the exposed surface of the first and second metal layers by electroplating And forming a metal bump on the surface of the first metal layer by heating and melting the third metal layer. The method for manufacturing a flip chip mounting substrate according to claim 6, wherein a lower melting point metal layer is formed on the surface of the metal bumps than the third metal layer forming the metal bumps.