KR100220640B1 - Input buffer atm switch in atm pbx - Google Patents

Abstract

The present invention relates to an input buffer type ATM switch of Asynchronous Transfer Mode-Private Branch Exchange (ATM-PBX), and in particular, provides fairness and priority to each input terminal requiring path allocation, thereby providing fair cell transfer delay and cell loss. The present invention relates to an ATM-PBX input buffer type ATM switch that prevents and maximizes switch efficiency.

The input buffer type ATM switch of the conventional ATM-PBX does not allocate a path by applying a priority at a fair rate in the path control unit, and as a result, the traffic loss increases and the cell loss rate increases, thereby preventing various quality of service. .

The cell input according to the present invention is routed and switched fairly by a cyclic coefficient while the path assignment request signal and the path assignment approval signal are exchanged between the cell selector and the cell path controller, thereby reducing the cell loss rate and increasing the switching efficiency. It can provide various quality of service such as multiple transmission and wide area transmission.

Description

ATM-PBX Input Buffer Type ATM Switch

1 is a block diagram showing an input buffer type ATM switch having a conventional ATM-PBX capacity of 8 * 8.

2 (a) is a block diagram showing an input buffer type ATM switch of the ATM-PBX having a capacity of 8 * 8 according to an embodiment of the present invention,

FIG. 2 (b) is a diagram showing the internal structure of the cells stored in each input queue in FIG. 2 (a).

FIG. 2 (c) is a diagram showing the internal data structure of each cell selector in FIG. 2 (a).

FIG. 3 is a block diagram showing the cell path controller in FIG.

* Explanation of symbols for main parts of the drawings

11-1 11-8, 21-1 21-8: Input Queue

12: path control unit 13, 24: switching unit

22-1 22-8: Cell Selection Block (CSB)

23: Cell Routing Control Block (CRCB)

One 3: Cell assignment unit 4: Path assignment approval signal generator

1-1 1-4, 2-1, 2-2, 3-1: route allocator

The present invention relates to an input buffer type ATM switch of Asynchronous Transfer Mode-Private Branch Exchange (ATM-PBX), and in particular, provides fairness and priority to each input terminal requiring path allocation, thereby providing fair cell transfer delay and cell loss. The present invention relates to an ATM-PBX input buffer type ATM switch that prevents and maximizes switch efficiency.

In the information age, as the information exchanged increases, a high speed communication system is required. Therefore, the structure of BISDN (Broad Informatied Digital Network) has been proposed, and ATM-PBX plays a role as a switch.

In addition, various ATM switch chips in the ATM-PBX have recently been developed.

As shown in FIG. 1, the input buffer type ATM switch of the conventional ATM-PBX includes a plurality of input queues 11-1 for temporarily storing cells input through each input terminal. 11-8) and corresponding multiple input cues 11-1 11-8) After reading the header of the cell temporarily stored in the path and competing the path, the path is set and the corresponding input queue (11-1) And a path controller 12 for temporarily applying a cell stored in step 11-8) and a switch 13 for switching the corresponding cell according to the path setting of the path controller 12.

The conventional input buffer type ATM switch of the ATM-PBX configured as described above operates as follows.

Input queues (11-1) to a plurality of input terminals of a conventional input buffer type ATM switch 11-8), when a cell is input through each input terminal, a plurality of input queues (11-1) 11-8) temporarily stores the input cells.

In addition, the path controller 12 may control the plurality of input queues 11-1. 11-8) reads the header of the cell temporarily stored in the path and races the path, and sets the path to apply the cell to the switching unit 13.

Accordingly, the switching unit 13 switches the cells according to the path setting of the path control unit 12.

On the other hand, when path contention fails in the path control unit 12, the input queue 11-1. 11-N), the cell is stored as it is, and then the cell header is read again in the next time slot and raced again.

However, the traffic load for each time slot during each input queue 11-1 When the capacity of 11-8) is exceeded, the path control unit 12 repeats the above operation, thereby not only imparting a fair cell propagation delay, but also giving a priority at a fair rate so that the path cannot be allocated. The number of path collisions caused by the header of the line increases, resulting in a large cell loss.

As described above, the input buffer type ATM switch of the conventional ATM-PBX does not allocate a path by applying a priority at a fair rate in the path control unit, so that the traffic loss increases, so that the cell loss rate is large and various quality of service cannot be guaranteed. There was a problem.

The present invention is to solve the above problems, it is suitable for a high-performance ATM switch that maximizes switch efficiency by preventing fair cell propagation delay and cell loss by assigning fairness and priority to each input terminal requiring path allocation. It is an object of the present invention to provide an ATM-PBX input buffer type ATM switch.

In order to achieve the above object, the input buffer ATM switch of the ATM-PBX according to the embodiment of the present invention has a plurality of input queues 21-, as shown in FIG. 21-8), a plurality of cell selection units, a cell path control unit 23, and a switching unit 24.

The plurality of input queues 21-1 21-8 and the switching unit 24 are the same as in the conventional configuration, and thus description thereof is omitted.

The plurality of cell selection units 22-1 22-8 denotes each input queue 21-1. 21-8) Read only the output signal (Output Port Number), add and save the circulation coefficient (CN), arrange the output terminal numbers in the same bit string, apply the path allocation request signal, and assign the path. If the acknowledgment signal is received and compared with the corresponding output terminal number, if it does not match, the circulating coefficient is increased and reapplied to the next time slot. Cell data applied from 21-8) is finally routed and applied to the switching unit 24.

The cell path controller 23 may be configured to select each cell 22-1. 22-8) assigns a path according to a path assignment request signal applied to each bit string and supplies the path assignment approval signal to each cell selector 22-1. 22-8).

The cell path control unit 23, as shown in FIG. 3, selects each of the cell selection units 22-1. If more than one bit of two adjacent bits applied to each bit string request output terminal allocation from 22-8), the second internal signal S1 is generated as '1' and priority is given to the higher bits of the two bits. A plurality of path allocators 1-1 which generate the first internal signal C1 as '0'. A first cell assignment unit 1 having 1-4); A plurality of paths for generating a third internal signal C2 and a fourth internal signal S2 by considering each second internal signal S1 applied from the first cell allocator 1 as a bit for requesting output terminal assignment. A second cell allocating unit (2) having allocators (2-1, 2-2); A plurality of paths generating the fifth internal signal C3 and the sixth internal signal S3 by considering each fourth internal signal S2 applied from the second cell allocator 2 as a bit for requesting output terminal assignment. A third cell allocating unit (3) having an allocator (3-1); The first internal signal C1, the third internal signal C2, the fifth internal signal C3 and the respective cell selection units 22-1 generated by the cell assignment units 1, 2, and 3. And a path assignment approval signal generator 4 for comparing the bits applied to each bit from 22-8) to generate a path assignment approval signal.

The operation of the input buffer type ATM switch of the ATM-PBX according to the embodiment of the present invention will be described in detail as follows.

First, a cell input through a plurality of input terminals of an input buffer type ATM switch has a respective input queue 21-1 until a cell which has already been input is assigned with a path. 21-8) are stored on a first-in, first-out basis.

At this time, the input queue 21-1 21-8) should be appropriately calculated in consideration of the throughput and the cell loss rate of the system. For example, 54 (bytes) of internal cells such as the second (b) are output by receiving the path assignment If the time is n, the minimum wait time is n for an input buffered ATM switch with a capacity of 8 * 8. If all eight have the same output terminal number, the minimum wait time is 8n.

Therefore, the input queue 21-1 in consideration of cell loss. 21-8) should be at least 8 * 54 (bytes) in size. Cell selection unit 22-1 among cells input and stored in 21-8). 22-8) reads only the output terminal number, adds and stores a cyclic coefficient as shown in FIG. 2 (c), and rearranges the output terminal number by the same bit string as shown in FIG. 3 to assign the path to the cell path controller 23. Apply the request signal.

Here, each bit of the output terminal number becomes an output terminal. For example, when a third output terminal path assignment is requested, the output terminal number becomes `` 00000100 ''.

As another example, when the output terminal number is "10100100", path allocation of the 8th, 6th, and 3rd output terminals is requested.

Thus, the cell path controller 23 allocates a path to an output terminal corresponding to each bit and generates a path assignment approval signal for each bit.

In this way, each cell selector 22-1 that receives the path assignment approval signal from the cell path control unit 23. 22-8) compares the stored output terminal number with the route assignment approval signal and matches each input queue 21-1. 21-8), when the path is finally assigned to the switching unit 24 and switched, if the path is not assigned during one time slot because of mismatch, the circulation coefficient is increased by one to have priority.

The circulation coefficient starts with the first '000' and each input queue 21-1. 21-8), while reading the output terminal number, it becomes '001' and then increases by 1 with the above operation.

However, the operation of the cell path control unit 23 will be described in more detail as follows.

As shown in FIG. 3, each cell selector 22-1 22-8) allocates paths by grouping two adjacent bits among the bits bound by the same bit string. Each path allocator 1-1 of the first cell allocation unit 1 is assigned. 1-4) generates a second internal signal s1 as '1' when at least one bit of two adjacent bits requests an output terminal assignment and applies '1', and sets a priority among the two adjacent bits. The upper bit makes the first internal signal C1 '0' and the lower bit makes the first internal signal C1 '1' to give to the upper bit.

In addition, each path allocator 2-1 or 2-2 of the second cell allocating unit 2 requests output terminal allocation for each second internal signal S1 applied from the first cell allocating unit 1. The third internal signal C2 and the fourth internal signal S2 are generated in the same operation as regards the bit.

In addition, each path allocator 3-1 of the third cell allocator 3 regards each fourth internal signal S2 applied from the second cell allocator 2 as a bit for requesting output terminal allocation. The fifth internal signal C3 and the sixth internal signal S3 are generated in the same operation as described above.

If both bits are '1', each cell selector 22-1 22-8), the cyclic coefficient gives priority to the bit having the larger value, and if the same, the higher order bit is given priority.

Accordingly, the path assignment approval signal generator 4 may include the first internal signal C1, the third internal signal C2, the fifth internal signal C3, and the cell selector 22-1 generated as described above. By comparing the bits applied to each bit string from 22-8), the path assignment approval signal is determined as follows.

Here, the output terminal number is denoted by OPN, and the path assignment approval signal whose output terminal number is n is denoted by Pn GT.

Terminal 1 Pn GT = / C1-1 * / C2-1 * / C3-1 * OPN n bit

Terminal 2 Pn GT = / C1-1 * / C2-1 * / C3-1 * OPN n bit

Terminal 3 Pn GT = / C1-2 * / C2-1 * / C3-1 * OPN n bits

Terminal 4 Pn GT = / C1-2 * / C2-1 * / C3-1 * OPN n bits

Terminal 5 Pn GT = / C1-3 * / C2-2 * / C3-1 * OPN n bits

Terminal 6 Pn GT = / C1-3 * / C2-2 * / C3-1 * OPN n bits

Terminal 7 Pn GT = / C1-4 * / C2-2 * / C3-1 * OPN n bits

Terminal 8 Pn GT = / C1-4 * / C2-2 * / C3-1 * OPN n bits

Then, the Pn GT thus determined is again the cell selection unit 22-1. Compare with OPN stored in 22-8) as follows.

Input terminal GT = / (OPN 0 bit P1 GT) * / (OPN 1 bit P2 GT) *. . . . * / (OPN 7 bit P8 GT)

In this way, a fair path allocation for each terminal is guaranteed by the circulation coefficient.

As described above, the cell loss rate is lowered and switched by switching the cells inputted according to the present invention by fair path assignment by a cyclic coefficient while exchanging a path assignment request signal and a path assignment approval signal between the cell selector and the cell path controller. It is possible to provide various quality of service, such as multi- and wide-area transmission, by increasing efficiency.

Claims (2)

In the input buffer type ATM switch of ATM-PBX having a plurality of input queues storing cells input through each input terminal in a first-in first-out manner, and a switching unit for switching cell data applied according to a finally allocated path. Reads only the output terminal number from each input queue, adds and stores a cyclic coefficient, arranges the output terminal numbers in the same bit string, applies a path assignment request signal, receives the path assignment approval signal, and receives the corresponding output terminal number. A plurality of cell selectors which increase a recursive coefficient and reapply them to the next time slot if they do not match, and if they match, finally allocates the cell data applied from each input queue and applies them to the switching unit; And a cell path control unit for allocating a path according to a path assignment request signal applied to each bit string from each cell selector and applying the path assignment approval signal to each cell selector. Input buffer ATM switch. The method of claim 1, wherein the cell path controller generates a second internal signal S1 when at least one bit of two adjacent bits applied to each bit string from the cell selector requests an output terminal assignment, and generates the corresponding two bits. A first cell allocator including a plurality of path allocators for generating a first internal signal C1 for giving priority to the higher bits; A plurality of path allocators for generating the third internal signal C2 and the fourth internal signal S2 by considering each second internal signal S1 applied from the first cell assignment unit as a bit for requesting output terminal assignment. A second cell allocation unit provided; A plurality of path allocators for generating the fifth internal signal C3 and the sixth internal signal S3 by considering each fourth internal signal S2 applied from the second cell allocator as a bit for requesting output terminal assignment. A third cell allocation unit provided; Comparing the first internal signal (C1), the third internal signal (C2), the fifth internal signal (C3) generated by each cell allocation unit with the bits applied to each bit string from each cell selection unit, the path allocation approval Input buffer type ATM switch of ATM-PBX, characterized in that it comprises a path assignment approval signal generator for generating a signal.