KR100209741B1 - Manufacture of semiconductor device - Google Patents

Abstract

The present invention relates to a mask opening process, and more particularly to a pad and a fuse opening process for shortening a manufacturing time by reducing the number of masks.

In the pad and fuse opening process of the embodiment of the present invention as described above, the pad and the fuse opening process may include forming a metal layer for forming a pad and a fuse; Sequentially depositing a tin nitride (TEOS) layer and a TEOS (Tetra Ethyl Ortho Silicate) layer over the entire surface of the metal layer; Depositing a P-SiN (P-type silicon nitride) layer and a PI (Polymide Isoindro Quindzoline) layer on the TEOS layer in this order; Applying a photoresist on the PIQ layer; Patterning the photoresist so that the PIQ layer is exposed; Isotropically etching the PIQ layer using the patterned photoresist as a mask so that the P-SIN layer is exposed and etched inwardly of the patterned photoresist; Etching the P-SIN layer such that the TEOS layer is exposed using the photoresist and the PIQ layer as masks; Removing the photoresist on the PIQ layer; And sequentially removing the TEOS layer and the tin nitride layer using the PIQ layer as a mask.

Description

Pad and fuse open process method

FIG. 1 is a sectional view of a conventional pad and fuse open process; FIG.

FIG. 2 is a sectional view of a pad and a fuse open process according to an embodiment of the present invention; FIG.

DESCRIPTION OF THE REFERENCE NUMERALS

21: metal layer 22: TiN (tin nitride) layer

23: TEOS (Tetra Ethyl Ortho Silicate) layer

24: P-Sin (P-type silicon nitride) layer

25: Polyimide Isoindro Quindzoline (PIQ) layer

26: Photoresist

The present invention relates to a mask opening process, and more particularly to a pad and a fuse opening process for shortening a manufacturing time by reducing the number of masks.

Hereinafter, a conventional method of opening a pad and a fuse will be described with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of a conventional pad and fuse open process.

First, a metal layer 1 and a TiN (tin nitride) layer 2 are deposited as shown in FIG. 1 (a) showing a pad and a fuse opening process at the passivation and package stages of a semiconductor device, ) In the upper part 3000 300 A TEOS (Tetra Ethyl Ortho Silicate) layer (3) serving as a protective layer of a thickness of about 1450 2500 P-SiN (P-type silicon nitride) layer 4 is deposited in this order.

Next, as shown in FIG. 1 (b), on the P-SiN layer 4, 20000 A predetermined portion of the first photoresist 5 is removed from the surface of the first photoresist 5 by an exposure and development process using a SIL PHOTO mask, A first pad and a fuse open mask process are performed.

The P-SiN layer 4 is anisotropically etched so that the TEOS (tetraethyl ortho silicate) layer 3 is filled with the first photoresist 5 removed in the above process as a mask, as shown in FIG. 1 (c). Then, the first photoresist 5 is removed by anisotropic etching.

As shown in FIG. 1 (d), on top of the anisotropically etched P-SiN layer 4, A polyimide isoindro quindzoline (PIQ) layer 6 is applied. Then, on the PIQ (Polyi mide Isoindro Quindzoline) layer 6, 27000 The second photoresist 7 having a thickness of about 100 탆 is removed by an exposure and development process to match the first pad and the fuse open mask process using an MP PHOTO mask do. A second pad for removing 120 .mu.m on both sides of the PIQ (Polyimide Isoindro Quindzoline) layer 6 by 10 .mu.m by an isotropic etching method with the second photoresist 7 remaining as a mask removed, Process.

After the second photoresist 7 is removed by an isotropic etching method as shown in FIG. 1E, the surface adhesion between the PIIM (Polyimide Isoindro Quindzoline) layer 6 and the P-SiN layer 4 is increased And then hard-baked. Then, the TEOS (Tetra Ethyl Ortho Silicate) layer 3 and the TiN layer 2 are anisotropically etched using the polyimide isoindro quinzoline (PIQ) layer 6 and the P-SiN layer 4 as a mask to open the pad and the fuse .

However, the conventional pad and fuse opening process have the following problems. First, there is a loss of turn around time (TAT) as the pad and fuse open mask process proceed twice.

Second, the photoresist must be deposited and removed twice, resulting in a loss of turnaround time (TAT).

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to reduce the number of masks and time required for the fabrication process.

According to another aspect of the present invention, there is provided a method of opening a pad and a fuse, comprising the steps of: forming a metal layer for forming a pad and a fuse in a pad and a fuse opening process; forming a tin nitride layer on the metal layer, Depositing a layer of P-SiN (P-type silicon nitride) layer and a layer of PIIM (Polyimide Isoindro Quindzoline) on the TEOS layer in sequence, depositing a TEOS layer on the TEOS layer, Patterning the photoresist so that the PIQ layer is exposed, isotropically etching the PIQ layer using the patterned photoresist as a mask to expose the P-SIN layer and exposing the patterned photoresist inward Etching the P-SIN layer to expose the TEOS layer using the photoresist and the PIQ layer as a mask, Sir step, characterized in that the PIQ layer by removing the photoresist, the micro-PIQ layer on the use that is produced by removing the TEOS layer and the tie nitride layer in order.

Hereinafter, a method of opening a pad and a fuse according to an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 2 is a cross-sectional view of a pad and a fuse open process according to an embodiment of the present invention.

First, a metal layer 21 and a TiN (tin nitride) layer 22 are formed as shown in FIG. 2 (a) showing a pad and a fuse opening process in the passivation and package steps of a semiconductor device, ) Front of 3000 300 A TEOS (Tetra Ethyl Ortho Silicate) layer 23 serving as a protective layer of a thickness of about 1450 2500 P-SiN (P-type silicon nitride) layer 24 is deposited in order.

As shown in FIG. 2 (b), on the entire surface of the P-SiN layer, 130000 (Polyimide Isoindro Quindzoline) 25 is applied on the entire surface of the PIQ (Polyimide Isoindro Quindzoline) layer 25, A photoresist 26 having a thickness of about 20 nm is applied. Then, the photoresist 26 of about 100 mu m is selectively removed by an exposure and development process using a SIL PHOTO or MP PHOTO mask. Then, a pads and a fuse open mask process are performed to remove 120 μm on both sides of the PIQ (Polyimide Isoindro Quindzoline) layer 10 μm by 10 μm by isotropic etching using the photoresist 26 as a mask. do.

Next, the P-SiN layer 24 is dry-etched until the TiN layer 22 is exposed using the photoresist 26 and the polyimide isoindro quindzoline (PIQ) layer 25 as a mask as shown in FIG. 2 (c) . After the photoresist 26 is removed, the surface of the P-SiN layer 24 is hard-baked to improve the surface adhesion between the PIQ layer 25 and the P-SiN layer 24.

The TEOS layer 23 and the TiN layer 22 are dry-etched using the polyimide isoindro quinzoline (PIQ) layer 25 and the P-SiN layer 24 as masks as shown in FIG. 2 (d) do.

As described above, the pad and the fuse opening process of the embodiment of the present invention have the following effects.

By reducing the number of masks for the pad and fuse open process to one, the turnaround time (TAT) can be shortened.

Claims (2)

Forming a pad and a metal layer for forming a fuse in a fuse opening process; Depositing a tin nitride layer, an FP-TEOS layer, a P-SiN layer, a PIQ layer, and a photoresist on the entire surface of the metal layer; Removing a predetermined portion of the photoresist and the PIQ layer such that the surface of the P-SiN layer is exposed; Removing the P-SiN layer to expose the FP-TEOS layer using the photoresist as a mask; Removing the photoresist on the PIQ layer; And sequentially removing the FP-TEOS layer and the tin nitride layer using the PIQ layer as a mask. The method of claim 1, further comprising the step of curing and drying the PIQ layer after removing the photoresist.