KR100209736B1 - Pretreatment process of wafer - Google Patents

Pretreatment process of wafer Download PDF

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Publication number
KR100209736B1
KR100209736B1 KR1019960049958A KR19960049958A KR100209736B1 KR 100209736 B1 KR100209736 B1 KR 100209736B1 KR 1019960049958 A KR1019960049958 A KR 1019960049958A KR 19960049958 A KR19960049958 A KR 19960049958A KR 100209736 B1 KR100209736 B1 KR 100209736B1
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South Korea
Prior art keywords
wafer
insulating film
pretreatment process
present
process according
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KR1019960049958A
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Korean (ko)
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KR19980030512A (en
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윤진영
한현규
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구본준
엘지반도체주식회사
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Priority to KR1019960049958A priority Critical patent/KR100209736B1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers

Abstract

본 발명은 웨이퍼 전처리 공정에 관한 것으로 특히, 포토(Photo)공정시 푸팅(Footing)방지에 적당하도록 한 웨이퍼 전처리 공정에 관한 것이다.The present invention relates to a wafer pretreatment process, and more particularly, to a wafer pretreatment process suitable for prevention of foaming during a photo process.

이와같은 본 발명의 웨이퍼 전처리 공정은 웨이퍼를 준비하는 단계; 상기 웨이퍼상에 제1절연막 및 제2절연막을 차례로 형성하는 단계; 상기 제2절연막이 형성된 웨이퍼에 극성용매를 사용하여 세척 및 베킹하여 제2절연막을 형성하는 단계를 포함하여 형성함을 특징으로 한다.The wafer pretreatment process of the present invention includes: preparing a wafer; Sequentially forming a first insulating film and a second insulating film on the wafer; And forming a second insulating film on the wafer having the second insulating film by cleaning and baking the wafer using a polar solvent.

Description

웨이퍼 전처리 공정Wafer preprocessing process

본 발명은 웨이퍼 전처리 공정에 관한 것으로 특히, 포토(Photo)공정시 푸팅(Footing)방지에 적당하도록 한 웨이퍼 전처리 공정에 관한 것이다.The present invention relates to a wafer pretreatment process, and more particularly, to a wafer pretreatment process suitable for prevention of foaming during a photo process.

일반적으로 원자외(DUV : Deep Ultra Violet) 포토 레지스트(Photo Resist) 공정에서 사용하는 CAR(Chemically Amplified Resist)형 레지스트(Resist)는 노광된 부분에서 산성 발생기(Generator)가 레지스트를 산화시키고, 상기 레지스트가 알칼리 용액에 용해되므로써 패턴(Pattern)을 형성한다.Generally, CAR (Chemically Amplified Resist) type resist (Resist) used in a deep ultraviolet (DUV) photoresist process oxidizes a resist in an exposed part of an acid generator, Is dissolved in an alkali solution to form a pattern.

그러나 CAR형 레지스터의 화학적 특성으로 인해 레지스터와 접촉되는 웨이퍼의 표면이 니트로겐(Nitrogen)을 함유하는 경우 노광후에 산화되었던 부분의 레지스트가 상기 웨이퍼의 표면과 반응하여 중화됨으로써 현상액에서 노광된 부분이 용해되지 않고 찌꺼기(Rsidue)가 잔존하는 푸팅(Footing) 현상이 발생한다.However, if the surface of the wafer contacting the resistor due to the chemical properties of the CAR type resistor contains nitrogen, the portion of the resist oxidized after the exposure reacts with the surface of the wafer to neutralize the exposed portion of the wafer, And the residue (Rsidue) remains.

이하, 첨부된 도면을 참조하여 종래의 웨이퍼 전처리 공정을 설명하면 다음과 같다.Hereinafter, a conventional wafer pretreatment process will be described with reference to the accompanying drawings.

제1도는 종래의 웨이퍼 전처리 공정을 나타낸 개략도이다.FIG. 1 is a schematic view showing a conventional wafer pretreatment process.

즉, 제1도에 도시된 바와같이 웨이퍼(11)상에 절연막(12) 및 질화막(13)을 차례로 형성하고, 상기 질화막(13)이 형성된 웨이퍼(11)를 플라즈마(Plasma) 장치내에서 산소(O2)애싱(Ashing)공정을 실시하여 상기 질화막(13)상에 산화막(14)을 형성한다.1, the insulating film 12 and the nitride film 13 are sequentially formed on the wafer 11 and the wafer 11 on which the nitride film 13 is formed is etched in a plasma apparatus with oxygen (O 2 ) ashing process is performed to form an oxide film 14 on the nitride film 13.

여기서 상기 산소(O2)애싱(Ashing)은 산소 플라즈마에 상기 웨이퍼(11)를 노출시켜서 질화막(13)표면에 얇은 산화막(14)을 형성시키는 공정이다.The oxygen (O 2 ) ashing is a step of exposing the wafer 11 to an oxygen plasma to form a thin oxide film 14 on the surface of the nitride film 13.

이후 공정은 도시하지 않았지만 상기 산화막(14) 상에 레지스트(Resist)를 도포한다. 그리고 포토 공정시 상기 질화막(13)의 표면에 산화막(14)이 형성됨으로써 상기 웨이퍼(11)의 니트로겐(Nitrogen)과 산성의 레지스트가 반응하지 않기 때문에 푸팅(Footing)현상이 발생하지 않는다.Although not shown in the drawings, a resist is coated on the oxide film 14. In the photolithography process, since the oxide film 14 is formed on the surface of the nitride film 13, the nitriding of the wafer 11 does not react with the acidic resist, so that a footing phenomenon does not occur.

그러나 이와같은 종래의 웨이퍼 전처리 공정에 있어서 다음과 같은 문제점이 있었다.However, the conventional wafer pretreatment process has the following problems.

즉, 웨이퍼 표면에 형성되는 찌꺼기를 제거하기 위해 O2애싱(Ashing) 처리를 하기 위한 플라즈마(Plasma) 발생 장비가 필요하므로 공정이 복잡하고, 공정을 위한 장비 비용 소모 및 공정시간이 길어지는 한편 막의 변성으로 인해 에칭(Etching) 공정에 영향을 준다.In other words, a plasma generating apparatus for performing an O 2 ashing process is required to remove the residues formed on the wafer surface, so that the process is complicated, the equipment cost for the process is long and the process time is long, It affects the etching process due to denaturation.

본 발명은 상기와 같은 문제점을 해결하기 위해 안출한 것으로 공정을 간소화 시키도록 한 웨이퍼 전처리 공정을 제공하는데 그 목적이 있다.SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems and it is an object of the present invention to provide a wafer pretreatment process which simplifies the process.

제1도는 종래의 웨이퍼 전처리 공정을 나타낸 개략도.FIG. 1 is a schematic view showing a conventional wafer pretreatment process. FIG.

제2도는 본 발명의 웨이퍼 전처리 공정을 나타낸 개략도.FIG. 2 is a schematic view showing a wafer pretreatment process of the present invention. FIG.

* 도면의 주요부분에 대한 부호의 설명DESCRIPTION OF THE REFERENCE NUMERALS

21 : 웨이퍼 22 : 절연막21: wafer 22: insulating film

23 : 질화막 24 : 산화막23: nitride film 24: oxide film

상기와 같은 목적을 달성하기 위한 본 발명의 웨이퍼 전처리 공정은 웨이퍼를 준비하는 단계; 상기 웨이퍼상에 제1절연막 및 제2절연막을 차례로 형성하는 단계; 상기 제2절연막이 형성된 웨이퍼에 극성용매를 사용하여 세척 및 베킹하여 제3절연막을 형성하는 단계를 포함하여 형성함을 특징으로 한다.According to an aspect of the present invention, there is provided a wafer pretreatment process comprising the steps of: preparing a wafer; Sequentially forming a first insulating film and a second insulating film on the wafer; And forming a third insulating film on the wafer having the second insulating film by cleaning and baking the wafer using a polar solvent.

이하, 첨부된 도면을 참조하여 본 발명의 웨이퍼 전처리 공정을 상세히 설명하면 다음과 같다.Hereinafter, the wafer pretreatment process of the present invention will be described in detail with reference to the accompanying drawings.

제2도는 본 발명의 웨이퍼 전처리 공정을 나타낸 개략도이다.FIG. 2 is a schematic view showing the wafer pretreatment process of the present invention.

제2도에 도시된 바와같이 웨이퍼(21)상에 절연막(22)과 질화막(23)을 차례로 형성하고, 상기 질화막(23)이 형성된 웨이퍼(21)를 트랙(Track)내(도면에 도시하지 않음)에서 DI(Dry Ion) 워터(Water)로 세척 및 베이킹(Baking)을 한다. 또는, IPA( Iso Propxl Alcohol)나 티너(Thinner)처리 후 DI워터로 세척 및 베이킹한다. 그리고 상기 베킹은 습식 분위기하에서 전처리한 웨이퍼를 베이킹할 수도 있다.An insulating film 22 and a nitride film 23 are sequentially formed on the wafer 21 as shown in FIG. 2 and the wafer 21 on which the nitride film 23 is formed is placed in a track Washing and baking with DI (Dry Ion) water. Alternatively, after IPA (Iso Propxl Alcohol) or Thinner treatment, it is washed and baked with DI water. The beaking may be performed by baking the pre-treated wafer in a wet atmosphere.

이때 상기 DI워터나 IPA는 이온결합성 물질이기 때문에 상기 웨이퍼(21)의 표면에 얇은 산화막(24)이 형성된다.At this time, since the DI water or IPA is an ion-binding material, a thin oxide film 24 is formed on the surface of the wafer 21.

이후 공정은 도시하지 않았지만 상기 산화막(24)상에 레지스트(Resist)를 도포한다. 그리고 포토 공정시 상기 질화막(23)의 표면에 산화막(24)이 형성됨으로써 상기 웨이퍼(21)의 니트로겐(Nitrogen)과 산성의 레지스트가 반응하지 않기 때문에 푸팅(Footing)현상이 발생하지 않는다.Although not shown in the drawings, a resist is coated on the oxide film 24. In the photolithography process, the oxide film 24 is formed on the surface of the nitride film 23, so that nitrogen does not react with the acidic resist of the wafer 21, so that a footing phenomenon does not occur.

이상에서 설명한 바와같이 본 발명의 웨이퍼 전처리 공정에 있어서 다음과 같은 효과가 있다.As described above, the wafer pretreatment process of the present invention has the following effects.

첫째, 트랙(Track)내에서 얇은 산화막을 질화막상에 형성함으로써 질화막의 푸팅(Footing)을 방지한다.First, a thin oxide film is formed on the nitride film in the track to prevent the nitride film from foaming.

둘째, 트랙내에서 모든 공정이 일괄적으로 진행하므로 공정시간이 단축된다.Second, the process time is shortened because all the processes in the track are performed collectively.

Claims (5)

웨이퍼를 준비하는 단계; 상기 웨이퍼상에 제1절연막 및 제2절연막을 차례로 형성하는 단계; 상기 제2절연막이 형성된 웨이퍼에 극성용매를 사용하여 세척 및 베킹하여 제3절연막을 형성하는 단계를 포함하여 형성함을 특징으로 하는 웨이퍼 전처리 공정.Preparing a wafer; Sequentially forming a first insulating film and a second insulating film on the wafer; And a step of forming a third insulating film by cleaning and baking the wafer having the second insulating film using a polar solvent. 제1항에 있어서, 상기 제2절연막은 니트로겐이 함유된 절연막임을 특징으로 하는 웨이퍼 전처리 공정.The wafer pretreatment process according to claim 1, wherein the second insulating film is an insulating film containing nitrogen. 제1항에 있어서, 상기 제3절연막은 트랙내에서 일괄적으로 진행됨을 특징으로 하는 웨이퍼 전처리 공정.The wafer pretreatment process according to claim 1, wherein the third insulating film is collectively processed in a track. 제3항에 있어서, 상기 트랙내에서 일괄적인 진행은 IPA나 티너 처리후, 극성용매로 세척 및 베킹함을 특징으로 하는 웨이퍼 전처리 공정.4. The wafer pretreatment process according to claim 3, wherein the batch process in the track is cleaned and baked with a polar solvent after IPA or Tinner treatment. 제1항에 있어서, 상기 세척후 습식분위기에서 베킹함을 특징으로 하는 웨이퍼 전처리 공정.The wafer pretreatment process according to claim 1, wherein the wafer is prebaked in a wet atmosphere after the cleaning.
KR1019960049958A 1996-10-30 1996-10-30 Pretreatment process of wafer KR100209736B1 (en)

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KR19980030512A KR19980030512A (en) 1998-07-25
KR100209736B1 true KR100209736B1 (en) 1999-07-15

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