KR100208275B1 - Apparatus and method for automatically recognizing signaling link in no.7 signaling protocol monitor device - Google Patents

Abstract

The present invention relates to an automatic monitoring device and method for a signal link suitable for automatically detecting a system connected with an SPM device and automatically detecting which stage the interface is matched. In the prior art, although it was possible to receive and process a signal, it could not process it automatically, and there was a drawback that the status of the signal could not be monitored and monitored. However, in the present invention, the NO. In the exchange system that sends and receives signals, it automatically detects the system connected to the SPM device and monitors the system to automatically know which channel is connected in the case of the subhighway or PCM link. It can be improved.

Description

Automatic monitoring device and method for signal link

The present invention relates to an apparatus and method for monitoring the status of a NO.7 signal link, and more particularly, to an automatic monitoring device for a signal link for automatically detecting and monitoring the status of a signaling system (SS) NO.7 signal link and It is about a method.

An example of a device that monitors the status of the SS NO.7 signal link is a signaling protocal moniter (SPM) device. The SPM unit works in conjunction with the exchange system to monitor the status of the SS NO.7 signal link at the signaling terminal (ST), sub-highway (SHW) stage, and pulse code modulation (PCM) stage. Do this.

However, the existing proposed SPM device is designed to receive and monitor signals from the matching block when monitoring the SS NO.7 signal link status. there was.

The present invention has been made to solve the above-mentioned drawbacks of the prior art, and automatically monitors the status of the SS NO.7 signal link without a separate operator command to automatically monitor the status of the signal link to the operator easy to understand The purpose is to provide.

In order to achieve the above object, the present invention provides an apparatus for automatically monitoring a NO.7 signal link provided in an exchange, comprising: a monitoring clock for generating outputs of a predetermined period required for monitoring when a reference clock is applied; A clock error check unit for checking whether a clock applied through the signal link is normal or not; a clock error register for storing check results output from the clock error check unit; A channel number register for storing the channel number, an automatic channel selector 140 for automatically selecting a channel at the time of NO.7 signal link matching, and channel information selected by the automatic channel selector is transmitted, It includes a path connection for connecting the path according to the method of the method, and a CPU for performing the overall control of the monitoring device It provides automatic monitoring device and method for a signaling link to the.

1 is a block diagram of a signal link automatic monitoring apparatus according to a preferred embodiment of the present invention

2 is a flowchart illustrating an automatic detection method of an automatic signal link monitoring apparatus according to the present invention.

3A to 3C are data storage format diagrams in respective registers.

<Description of the code | symbol about the principal part of drawing>

100: monitoring clock generator 110: clock error check unit

120: clock error register 130: channel number register

140: automatic channel selection unit 150: path connection unit

160: CPU

The above and other objects and various advantages of the present invention will become more apparent from the preferred embodiments of the invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, with reference to the accompanying drawings, it will be described in detail a preferred embodiment of the present invention.

First, referring to FIG. 1, the SPM apparatus monitors the state of the NO.7 signal link of a signaling terminal (ST), a subhighway (SHW) stage, and a pulse code modulation (PCM) stage. To perform.

When the information is transmitted through the trunk using the NO.7 protocol, the monitoring clock generating circuit 100 receives the reference clock as an input and generates various clocks to check the clock. There are CHK4M clock to check whether it is 4 MHz clock, CHK2M to check if it is 2MHz clock, and CHK64K to check whether it is 64 KHz clock. Check if the signal is coming back to normal.

In addition, the clock error check unit 110 checks whether the input clock input on the interface is normal or not, and receives a 64 KHz clock as an input signal and compares it with a CHK 64 clock signal to 64 KHz when an error occurs. Tells you that an error has occurred.

In the interface, there is a PCM signal, a signal terminal signal, and a subhighway signal. The interface is transmitted to the clock error check unit.

The interface compares 2 MHz, 4 MHz, and PCM clock signals with CHK2M, CHK4M, and CHKPCM signals to generate 2M error signals, 4M error signals, and PCM error signals when an error occurs.

The clock error register 120 is a register that stores error information of a clock from the clock error check unit.

The channel number register 130 is a register that stores the number of the channel to be monitored during subhighway matching and PCM matching.

The automatic channel selector 140 may automatically determine a signal flow by selecting a channel at the PCM stage and subhighway matching.

The CPU 160 in the SPM device is connected to each of the clock error register 120 and the channel number register 130 to control each register, and each of the monitoring clock generator 100 and the clock error check 110 It is connected to the automatic channel selection unit 140 and the path connection unit 150 to control the signal and to enable the interworking of information between blocks and registers.

The automatic channel selector sets the D1 receive bit of the clock error register 120 to 0 when an error occurs in the channel number register in the CPU when the PCM and the subhighway stage match. When an error signal is generated in a corresponding channel to the transmitter, the D0 receive bit of the clock error register is set to zero.

The path connection unit 150 receives a signal from the automatic channel selector 140 and connects the path according to the method of the NO.7 signal.

The control of the CPU 160 connects the signal of the matching end to the CPU 160. In particular, the CPU 160 transfers the data clock received from the signal terminal to the CPU 160 at the signal terminal connection command.

In the subhighway connection command, only the signal channel extracted from the automatic channel selector among the clock and data received from the subhighway is connected to the CPU 160.

Referring to FIG. 2, when the CPU 160 powers on, the clock error check unit 120 checks the states of the clocks in the clock error check unit 110 so that the reception of the clock error check unit 120 is a signal terminal. The clock is checked to determine whether the clock operates normally (step 200).

If it operates normally, it is connected to the terminal of the signal terminal (step 202).

If it does not operate normally, it is determined whether the subhighway clock is operating normally (step 204).

If the CPU 160 determines that the CPU 160 operates normally, it connects to the subhighway (step 206).

Since there are 32 channels in the subhighway stage, the channel value should be checked from 0 to 31, so the initial value of the channel value is set to n = 0 and N = n (step 208).

It is determined whether signal data of the N channel is received (step 210).

If the signal data of the N channel is not received, an error processing is performed to inform the operator that the data cannot be received due to an abnormal channel through the SPM (step 212).

If the signal data of the N channel is received, it is determined whether a signal message has been received with the received signal normal (step 214).

If it is determined that the signal is not a normal signal, error processing is terminated (step 212).

If it is determined in step 214 that it is determined that the channel is a normal channel, only the message signal is extracted from the automatic channel selector by dividing the clock signal and the message signal received from the subhighway and stored in the channel number register (step 216).

It is determined that n is 32 and n is 32, and steps 208 to 218 are repeated repeatedly until n is 32 (steps 218 and 220).

If the clock of the subhighway is not normal in step 204 described above, it is again determined whether the PCM clock is normal (step 222).

If it is not normal, there is a high possibility that an error occurs in the matching cable, so that the operator checks the matching cable check request to the CPU 160 to allow the operator to recognize it in the terminal of the SPM (step 224).

If it is determined in step 222 that the PCM clock is normal, it is connected to the PCM path of the path connection unit 150 to check each 32 channels of the PCM channel (step 226).

The flow chart for checking and storing each channel of each step is similar to the previous method, and the steps 208 to 220 are repeated with the above steps until n is 32.

Referring to FIG. 3, a format diagram for storing information in a register is as follows.

First, FIG. 3A is composed of eight bits from D0-D7 in the clock error register, and each data indicates whether a signal is normally input or is a received signal or a transmitted signal. And, D3 and D2 represent dummy values, indicating that no information is contained.

The bit of D0 is a bit to know the state of the transmission signal, D1 is the state of the received signal, and each of D4, D5, D6, and D7 is 64K, PCM, 2M, and 4M, respectively. The bit to write.

In addition, the channel number register of FIG. 3B also uses bits D0-D7, and stores the number of the corresponding channel to be monitored during subhighway matching or PCM matching. Up to D4 stores the monitored channels to indicate the status. The three bits up to D5-D7 are reserved bits that can be expanded if necessary.

In addition, referring to FIG. 3C, a register inside the MC68302, which is an example of a CPU used as a microprocessor of an SPM device, is used to control various selection signal information and initialization information in order to provide a control signal. D0 is used as a signaling terminal stage selection signal, D1 is used as a 101 board selection signal, D2 is used as a signal for selecting a subhighway stage, D3 is not used, and D4 is used as a switch reset signal.

In addition, up to D5-D7, it is possible to set as a select signal for another signal by the reserved bit.

For the INPUT signal, the oscillator generates a 16 MHz clock, which is the reference signal for the watch clock.

On the basis of the 16 MHz clock, which is the reference signal, 64KHz clock and 2 MHZ, 4MHz, and PCM signals that are connected to the signaling terminal of the system matched with the SPM device are distinguished. It is possible to judge.

As described above, the present invention provides an apparatus and a method capable of automatically monitoring the status of the NO.7 signal link, so that the result of monitoring the NO.7 signal link can be easily understood. .

Claims (5)

An apparatus for automatically monitoring a NO.7 signal link provided in an exchange, A supervisory clock generator 100 for generating outputs of a predetermined period required for monitoring when a reference clock is applied, A clock error check unit 110 that checks whether a clock applied through the signal link is normal; A clock error register 120 for storing a check result output from the clock error check unit 110; A channel number register 130 for storing a number of a corresponding channel to be monitored when the NO.7 signal link is matched; An automatic channel selector 140 for automatically selecting a channel at the time of the NO.7 signal link matching, When the channel information selected by the automatic channel selection unit 140 is transmitted, the path connection unit 150 for connecting the path in accordance with the method of the NO.7 signal, and And a CPU (160) for performing overall control of the monitoring device. The method of claim 1, The path connection unit 150 is an automatic monitoring device for a signal link, characterized in that for performing the PCM path connection, signal terminal path connection and time switch path connection functions. In the automatic monitoring method for the signal link for automatically monitoring the NO.7 signal link provided in the exchange, Determining whether the states of the clocks applied through the NO.7 signal link operate normally at power-on and connecting the terminal of the signal terminal to the exchange when the signal is normally operated; Determining that the sub-highway clock is operating normally if it does not operate normally and connecting the sub-highway if it operates normally; If the clock of the sub-highway is not normal, if the PCM clock is normal again, and if the PCM clock is normal, the automatic monitoring method for the signal link consisting of the step of connecting to the PCM path of the path connection unit 150. The method of claim 3, wherein In the second step, if it is determined that the sub-highway clock is operating normally, if connected to the sub-highway, the method further comprises the step of repeatedly checking the channel to the specific channel set up and storing the channel information Automatic monitoring method for signal link. The method of claim 3, wherein Connecting the PCM path, And after the connection to the PCM path, checking each channel of the PCM channel and storing channel information.