KR100205809B1 - Data recording method in a vrss - Google Patents

Abstract

The present invention relates to a fast search system of a VCR.

According to the present invention, when the user data is used as date data, the corresponding date data is recorded and converted into bit string digital data in the control track when the program is recorded. In the VRSS, which checks the tape's main domain and selectively executes FF, the input recording date data and the date data played on the control track are compared and the playback ends after FF at the same time. When user data is recorded on the camera, record data is sequentially recorded, followed by year data in bytes, month, day, hour, and minute data in byte units, and AM / PM and recording end data in 1-bit units. In this case, the one byte unit is formed by logic made up of each duty of eight cycles.

Description

Data recording method in VRS (Video Random Search System)

1 is a circuit diagram of a conventional screen navigation system (VISS).

2 is a control signal output waveform diagram of FIG.

3 is a schematic diagram of signal waveforms of FIG.

4 is a detailed waveform diagram of each part of FIG.

5 is a flow diagram of a conventional VISS implementation.

6 is a VRSS circuit diagram of the present invention.

7 is a flow chart of user information proxy for VRSS execution in accordance with the present invention.

8 is a flowchart illustrating a user information tracking feature screen during playback for VRSS execution according to the present invention.

9 is a data column arrangement state diagram in the present invention.

10 is a bit structure diagram of a byte unit in the present invention.

* Explanation of symbols for main parts of the drawings

10: video signal processing circuit 11: synchronous separation circuit

12: dividing circuit 13: control head

14: preamplification circuit 15: Schmitt trigger circuit

16 deck 17 key input circuit

18: timer circuit 19: microcomputer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system for quickly searching a specific screen in a VSI, and more particularly, to a data recording method in a VRSS (Video Random Search System), which enables a user to find a specific recording part by tracking user information. It is about.

1 is a circuit diagram of a control signal reproducing and waveform converting apparatus which executes a conventional VISS function, a control head 2 for reproducing a control signal from a video tape 1, and an amplifier for amplifying a reproduction control signal. (3) and a waveform converting section 4 (Schmitt trigger circuit) for converting the amplified control signal into a control pulse having a duty ratio corresponding to the control signal period.

In the conventional control reproducing system having such a configuration, the control signal recorded on the videotape 1, that is, the general control signal of the standard as shown in FIG. 2A or the VISS control signal as shown in FIG. )

The normal regeneration control pulse as shown in FIG. 2A has a high pulse width T _H and a low pulse T _L in the control signal period T.

T = T _H + T _L , Th / TX100 [%] = 60 [%]

It has a duty ratio of ± 5 [%] and a duty ratio of T _H / T x [%] = 27.5 [%] ± 2.5 [%] in the VISS control signal period T of FIG.

Here, the control pulses of FIG. 2A are normal SP regeneration (tape speed = 33.35mm / sec), EP regeneration (tape speed = 11.12mm / sec), SP 9x regeneration (CUE) A control signal pulse detected at 27 times speed reproduction (CUE), and the control pulse of FIG. 2B is a pulse of a control signal detected at 200 times speed (FF or REW).

The reproduction of such control pulses will be described with reference to a, b, and c in FIGS. 1 to 3 as follows.

The control pulse recorded in the control track of the video tape 1 is reproduced by the control head 2 in a waveform as shown in FIG. 3A. Since the reproduced control signal is weak, the control pulse 2 is transmitted through the amplifier 3 in FIG. Amplify as b.

The amplifier 3 is an amplifier having a gain of 60 [dB] and amplifies it to 1V _{p_p} because the input control signal is 1mV _{p_p} .

The amplified control signal is supplied to the Schmitt trigger circuit 4, and the Schmitt trigger circuit 4 outputs the waveform OUT of the control signal with a control pulse such as c in FIG. 3 corresponding to the period of the input control signal. .

The output control pulse is supplied to the system control unit of the VCR or camcorder and is provided as phase control information of the capstan motor, real time counter operation information, or information for detecting the VISS signal.

In addition, the above-described control playback / conversion operation will be described.

The control signal reproduced by the control head 2 (see a in FIG. 3) is input to the amplifier 3, which first passes through the noise canceling circuit of the resistor R1 capacitor C1 and removes the noise and then the resistor R2. It is supplied to the input terminal (+) of the operation heavy amplifier (A1) through.

The operational amplifier A1 amplifies and outputs the input control signal to a level sufficient for waveform conversion by the gain G defined by the resistors R3, R4, and the capacitor C3.

Where G = 1 + [{[R4 X / 1 (2πfC30] / R4 + 1 / (2πfC3}] / R3].

On the other hand, in this amplifier 3, the resistors R5 and R6 act as bias biasing resistors of the operational amplifier A1 to perform power supply (+ VCC) voltage division, and the capacitor C2 is for noise removal and the capacitor ( C4) is a power supply decoupling capacitor.

The amplified control signal (see b in FIG. 3) is input to the Schmitt trigger circuit 4.

The Schmitt trigger circuit 4 is composed of a comparator A2, a resistor R7 (R8) and a power supply bias resistor R9 for setting a threshold voltage (± VT _H ; THRESH HOLD voltage).

Therefore, the control signal supplied to the input terminal (+) of the comparator A2 has the output of the comparator A2 at a level higher than + VT _H based on ± VT _H as shown in a of FIG. Below -VT _H , the output of the comparator A2 becomes low (L) as shown in (B).

That is, the control signal output from the output terminal OUT becomes a control pulse waveform-transformed (in a period corresponding to the control signal cycle) as shown in FIGS. 3C and 4B.

In the circuit, VT _H = input voltage XR7 / (R7 + R8) [V] is set.

As described above, the conventional control signal reproducing and waveform converting apparatus which reproduces the control signal and converts the waveform into the control pulse can detect the control signal and convert the waveform in the normal reproducing mode without error. If it is recorded on the video tape, there is a hassle of having to find the recording scene while the user checks the first part of the screen to be searched.

5 is a flowchart illustrating a conventional VISS, in which an index search is first selected according to a VISS command when a tape is played back by a VCR to determine whether a positive key is pressed.

If the (+) key is input, FF is performed to check whether the duty ratio (6: 4) is present. Since the normal control pulse duty ratio is 4: 6, proceed with FF until a duty ratio of 6: 4 is obtained.

In addition, if (-) key input, REW is performed until the control signal of 6: 4 duty ratio that indicates the recording start area is found as in the previous method.

When a change in duty ratio is detected in this way, the point is determined as the start of the program, the FF or REW function is stopped, and playback is performed.

In addition, the VASS (Video Addess Search System) is composed of a search system similar to that of the VISS. Here, the duty ratio is recognized as "1" when the duty ratio is 6: 4 and "0" when 2.75: 7.25. The address is assigned to the control track at the beginning of the recording, and when the address is designated and played back at this time, the program is directly searched by the corresponding address.

However, in the case of VISS as described above, it is inconvenient for the user to search all the programs sequentially until the corresponding program is found according to the FF or REW function. In the case of VASS, the recorded data is recorded at the beginning of a specific recording on the tape. Searching for an address is simpler than VISS, but it is easy to forget the address (recording sequence number).

Because the concept of simple numbers is used so much in daily life that confusion and loss of its contents occur frequently.

It is an object of the present invention to record a plurality of specific programs on a videotape so that the corresponding recording time and date are recorded at the beginning of the recording. It is to provide a data recording method in a VRSS so that it can be easily found.

A feature of the present invention is to check the current time when the recording key is input and if the current time is not set, setting the current time through the time setting message output and loading the current time if the current time is set, and then the loaded current Recording the digital data of the year, month, day, time information on the control track at the beginning of the corresponding recording, and recording the control pulse of the general duty (4: 6) after executing the step; Checking the amount of tape in the current VCR deck according to the data recording method and VRSS key input including date data, performing a REW when the amount of tape is greater than half, and performing an FF when less than half; In accordance with the tape FF and REW execution, the VRSS header is checked before the end and beginning of the tape is detected. The user data search method by VRSS comprising the step of comparing with the above, and stopping the FF mode and executing the playback after installing the corresponding program by the execution of the above step, and determining whether the unit of bytes is recorded for the VRSS. Data, year data, month data, hour data, minute data, AM / PM data (1 bit) and end data are recorded in sequence, each byte unit consisting of eight pulse periods (T), each of which is its duty To make the logic bits 2: 2 ("1") and 8: 2 ("0").

Hereinafter, the present invention will be described based on the accompanying drawings.

6 is a hardware configuration diagram of the system of the present invention, which includes a sync separation circuit 11 for separating a 60HZ sync signal from a video signal output from the video signal processing circuit 10, and the sync separation circuit 11; A division circuit 12 for dividing the 60HZ synchronization signal output from the controller 1/2 and a duty cycle of the 30HZ control pulse output from the division circuit 12, and controlling recording through the control head 13 to the control track. The preamplifier circuit 14 and the Schmitt trigger circuit 15 for amplifying a control pulse signal reproduced by the control head 13 and processing a pulse for duty recognition, and from the Schmitt trigger output. It includes a microcomputer 19 for tracking the user data through the date data according to the duty based on the timer circuit 18, the deck 16 and the key input circuit (17).

The execution process of the system of the present invention on the basis of such hardware is as follows.

First, the user data recording process for VRSS in the step of recording a program on the tape will be described with reference to FIGS. 6 and 7.

When the recording key of the key input circuit 17 is inputted to record a specific program by using the VCR, the microcomputer 19 checks the current start.

At this time, if the current time is not set, the current time setting message is sent to perform the current time setting supported by the timer circuit 18.

When the current time is set, the microcomputer records the presence or absence of the recording data (H: 1 byte), year data (Y: 2 bytes), month data (M: 1 byte), and day data (Fig. 9) at the beginning of recording. D: 1 byte), hour data (H₁: 1 byte), minute data (M₁: 1 byte), AM / PM data (1 bit), and end data (E: 1 byte) are loaded in this order.

Each of these data is made in a unit of 1 byte composed of eight periods T as shown in FIG. 10, and each bit has its logic value determined according to the duty ratio of each period.

In other words, when the duty of each period is 2: 8, the logic becomes “1”, and when 8: 2, the logic becomes “0” to generate 1-byte information composed of 8 bits.

The user bit string data (date conversion digital data) for this VRSS is time delay adjusted by the control head 13 to be recorded at the start of recording on the video tape.

When the recording of the user data for VRSS is completed, the control head 13 is supplied with a standard control signal having a constant duty (4: 6) and continues to be recorded during the recording period.

Meanwhile, the VRSS execution process according to FIG. 8 is as follows.

First, when the VRSS key is pressed by using the key input circuit 17 to search for a specific recording program, the microcomputer 19 requests the year, month, day, and time data. When the memory is inputted, the microcomputer 19 checks the main domain (remaining amount) of the tape on the deck 16.

As a result of retrieving the main domain information of the tape, if the remaining tape amount is less than half, FF is performed, and if the remaining tape exceeds half, REW is performed.

If the tape is started as a result of REW, FF is performed as if the remaining tape is less than half. Check the presence of header by VRSS during FF execution.

The VRSS header is the user digital information recorded by the control head and the first part of a particular program. At this time, if the VRSS header is detected, the comparison is made in order of year, month, day, and time. If the VRSS header data of the corresponding program matches the year, month, day, and time data when the VRSS key is input, FF execution is terminated and playback is executed. .

The VRSS header search process is executed up to the tape end. If the VRSS header is not detected in the FF process, the REW of the above step is performed again.

By repeating this process, the VRSS which searches a specific program based on the user date data is executed.

As described above, the present invention can solve the multi-stage search operation and the address storage burden for the recording sequence, which are disadvantages of screen search in VISS and VASS, for high-speed search of a specific program.

Claims (2)

In the high-speed search system of the VCR, if the current time is not set by each recording key input, if the time is not set, the current time setting program is executed according to the current time setting message output, and then the set current time data is digitized in a bit string to control pulses. When the user data is recorded on the control track of the tape by loading the data into the recording data, record data, year data in the byte unit, month, day, hour, and minute data in 1 byte unit, and AM / A method for recording data in VRSS, characterized by recording sequentially in the order of PM and recording end data. The method of claim 1, wherein the 1-byte unit is formed by logic made of each duty of eight cycles.