KR100205431B1 - Error correction circuit and method for digital video disc system - Google Patents

Abstract

It is about error correction of Digital Video Disc (DVD) system. In particular, check the EDC after PI error correction, and if PO error correction is detected, if there is no error, PO error correction is skipped. This eliminates unnecessary error correction time, which speeds up the error correction processing time, and allows the memory control unit to perform other tasks by that time, thereby enabling the DVD to add functions.

Description

Error Correction Circuit and Method of Digital Video Disc (DVD) System

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a digital video disc (DVD) system. In particular, a horizontal axis error correction is performed in units of blocks of a predetermined byte, and an error detection code (EDC) is checked, followed by a vertical axis error according to the shank result. An error correction circuit and method for a DVD system that skips correction.

Recently, a system has been developed for recording and playing back moving images on or from a high density optical disk after compressing the image using a high efficiency coding technique, one of which is a DVD system.

The DVD system employs a variable bit rate coding technique in which a code amount generated in response to complex image information is changed, and a system similar to MPEG 2 (Moving Picture Experts Group 2) for ensuring a high quality image.

The error correction in such a DVD system is in a Reed-Solomon error correction format. Usually, 37856 bytes of data are performed in units of 182 bytes horizontally and 208 bytes vertically. This horizontal correction is referred to as PI (Parity Inner) error correction and vertical correction is referred to as PO (Parity Outer) error correction.

1 is a flowchart illustrating an error correction method of the conventional DVD system. First, PI error correction is performed in step 101 and PO error correction is performed in step 102.

Then, after performing the EDC check in step 103, the correction data is output in step 104.

At this time, the EDC shank of step 103 is for informing the MPEG decoder (not shown) when outputting the data after error correction, and is used only to determine whether the output data is in error.

And even if only PI error correction is performed in the DVD system, most errors are corrected.

However, in the related art, since PO error correction is performed unconditionally after PI error correction, unnecessary error correction is performed, which takes a long time for error correction and thus burdens the memory controller.

The present invention is to solve the above problems, an object of the present invention is to check the error correction circuit of the DVD system by shortening the error correction time by checking the EDC after PI error correction and skipping the PO error correction according to the result of the check and In providing a method.

A feature of the error correction circuit of the DVD system according to the present invention for achieving the above object is to perform a PI error correction on the memory for error correction and the input data, and to perform PO error correction according to the error detection code check result. An error correction skipping section, an error detection code section receiving PI error corrected data from the error correction section, and checking an error detection code, and writing the PI error correction data to a memory and outputting the error detection code section It indicates that there is no error, skips the PO data read from the memory, and if there is an error, the memory control unit reads the PO data from the memory and outputs the error correction.

The error correction method of the DVD system according to the present invention includes a first step of performing PI error correction on input data, a second step of checking an error detection code (EDC) of the PI error corrected data, And a third step of skipping the PO error correction according to the error detection code (EDC) check result.

1 is a flowchart showing an error correction method of a conventional digital video disk (DVD) system.

2 is a block diagram showing an error correction circuit of the DVD system according to the present invention.

3 is a flowchart illustrating an error correction method of a DVD system according to the present invention.

* Explanation of symbols for main parts of the drawings

21: demodulation section 22: address comparison section

22-1, 27: SRAM 23: memory control unit

24: memory 25: error correction

26: error detection code unit 28: interface control unit

29: FIFO

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram illustrating an error correction circuit of the DVD system according to the present invention.

2, a demodulator 21 for demodulating playback data when a DVD is played, an address comparison section 22 for reading a sector address of the demodulated data, and determining whether or not to transmit the data, is connected to the address comparison section 22. 3 frames of static RAM (SRAM) 22-1, error correction, variable bit rate (VBR) control, and data search information for data transmission in PI error correction frame units Memory 24 for Search Information (DSI), a memory controller 23 for controlling the data arrangement of the memory 24 and controlling error correction, and PI data from the memory 24 by the memory controller 23. Error correction 25 for reading and performing PI error correction and skipping PO error correction according to the EDC result. When PI error correction is made in the error correction 25, an EDC check is performed to the memory control unit 23. EDC unit 26 for outputting, the memory control An SRAM 27 for two frames for performing PI error correction and PO error correction in a cyclic manner, and a memory control unit 28 for controlling data transmission to an MPEG decoder (not shown). And an interface control unit 28 and a First In First Our (FIFO) memory 29.

The memory 24 is composed of 256k × 16 bytes of Dynamic RAM (DRAM).

3 is a flowchart illustrating an error correction method of a DVD system according to the present invention.

In the present invention configured as described above, during reproduction of the DVD, the demodulation section 21 demodulates the reproduction data and outputs it to the address comparison section 22. FIG.

The address comparison section 22 reads the sector address of the demodulated data to determine whether it is the desired sector data and determines whether or not the data is transmitted.

Here, there are two kinds of sector addresses to be concatenated, one of which is a sector address stored while interrupting data transmission by an overflow coral of the memory 23, and the other is a sector inputted as a request for a sector according to DSI in MPEG. This is an address.

In addition, the address comparison section 22 generates a jump signal when the DRAM 24, which also serves as the VBR control memory, becomes full, causing the servo to read data of all tracks and wait for data to be joined.

During this period, the level of the DRAM 24 is lowered and the SRAM 22-1 stores data again when a waiting data sector is input.

The SRAM 22-1 is provided to transmit data in PI error correction frame units (here, 182 bytes).

On the other hand, in the address comparison section 22, if the input data is determined to be data to be transmitted as desired sector data, it is transmitted to the memory control section 23 in units of 182 bytes.

The memory control unit 23 outputs the data to the error correction unit 25, and the error correction unit 25 performs PI error correction (step 301).

In the error correction section 25, the PI error correction data is input to the EDC section 26, the EDC is checked, and the result is output to the memory control section 23 (step 302).

If it is determined that there is an error even after PI error correction, the memory controller 23 writes the PI error corrected data to the memory 24 and outputs the PO data to the error correction unit 25 again.

The memory 24 stores data for error correction, VBR control and DSI, and the memory controller 23 controls the data arrangement of the memory 24.

In other words, when error correction is required, the memory control unit 23 reads the data written to the memory 24 and outputs the data to the error correction unit 25 in units of 208 bytes.

The error correction section 25 performs PO error correction on the input data and immediately writes it to the memory 24 through the memory control section 23 without an EDC link (step 303).

On the other hand, the memory control unit 23 does not output the PO data from the memory 24 to the error correction unit 25 when it is determined that there is no error after PI error correction as a result of the check of the EDC.

Thus, the error correction section 25 skips PO error correction.

That is, only the PI error corrected data is written to the memory 24 to complete the error correction.

The memory controller 23 is provided with two frames of SRAM 27 for performing PI error correction and PO error correction in a cyclic manner under the control of the memory controller 23.

When error correction is completed according to the result of the EDC link, the memory control unit 14 reads the error corrected data from the memory 24, performs the EDC link again (step 304), and then stores the MPEG data, the system data, and the DSI data. The system data is selected and the system buffer (not shown) is drawn, and the MPEG controller and the DSI data are output to the interface controller 28 (step 305).

The EDC check performed after the error correction is completed is for informing the MPEG decoder and is used only to determine whether or not the output data is in error.

When the memory 24 is full, the memory control unit 23 stops data transmission while sending an overflow signal to the address comparison unit 22.

The interface control unit 28 controls data transmission to MPEG, and discards data not required by MPEG among block data of 16 sectors and transmits only sector data required by MPEG to a track buffer (not shown).

That is, the interface control unit 28 controls data transmission to MPEG.

As described above, according to the error correction circuit and method of the DVD system according to the present invention, after PI error correction, if the EDC is checked and there is an error, PO error correction is performed again, and if there is no error, PO error correction is skipped. This eliminates unnecessary error correction time, which speeds up the error correction processing time, and allows the memory control unit to perform other tasks by that time, thereby enabling the addition of the DVD function.

Claims (4)

A memory for error correction; An error correction unit performing PI error correction on input data and skipping PO error correction according to an error detection code (EDC) check result; An error detection code unit for receiving PI error corrected data from the error correction unit and checking an error detection code; If the PI error corrected data is written to the memory and the output of the error detection code section indicates no error, the PO data read is skipped from the memory. If the error is indicated, the PO data is read from the memory and output to the error correction unit. Error correction circuit of a digital video disk system, characterized in that it comprises a memory control unit. The error correcting circuit of claim 1, wherein the error correcting unit skips PO error correction when the PO data is not input through the memory controller. A first step of performing PI error correction on the input data, a second step of checking an error detection code (EDC) of the PI error corrected data, and a PO error correction according to the error detection code (EDC) check result And a third step of skipping the error correction method of the digital video disk system. 4. The digital video disk system according to claim 3, wherein the third step skips PO error correction if it is determined that there is no error as a result of the error detection code (EDC) check, and performs PO error correction if it is determined that there is an error. Error correction method.