KR0184120B1 - Method of accessing a memory data and magnifying an image using a memory mapping method and address generating apparatus according to the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a screen output method in an image device such as a closed circuit televison. In particular, the display means accesses the stored image data after storing the entire image read through the image reading means in a memory. In an image display apparatus for displaying an enlarged area of an entire image in the same size as a full screen in an image display apparatus that is displayed through the image display apparatus, the entire memory area is divided into subregions having the same size with a constant aspect ratio. The first process of setting up; A second step of accessing horizontal and vertical pixel data corresponding to the corresponding area when an arbitrary area is selected by the user among the detailed areas set in the first step; A third step of repeatedly displaying the horizontal and vertical pixel data accessed in the second step a predetermined number of times to generate an image corresponding to the entire screen; And a fourth process of displaying the image data generated in the third process through the display means, and providing an image enlargement display method, a memory data access method, and an addressing apparatus according to the memory mapping technique. In a device such as a CCTV system, the operation response time generated by the conventional method of mounting the software for the enlargement of the partial screen on the control unit is delayed and there is an effect of solving the problem that the control unit is overloaded.

Description

Image Magnification and Memory Data Access Method Using Memory Mapping Method and Its Address Generator

1 is a simplified block diagram of a CCTV system to which the image magnification method according to the present invention is applied.

2 is a diagram illustrating division of a memory area.

3 is a diagram showing the configuration of an address generator in the control unit shown in FIG.

4 is an exemplary configuration diagram of a counter clock setting unit shown in FIG.

* Explanation of symbols for main parts of the drawings

10 lens 20 charge coupled device (CCD)

30: signal conversion output section 40, 50: memory

60: image generator 70: CRT

80: keyboard 100: control unit

110: initial counter setting unit 120: counter clock setting unit

121: counter unit 122: multiplexer

130: address generator 130A: horizontal address generator

130B: vertical address generator

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a screen output method in an image device such as a closed circuit televison (hereinafter referred to as a CCTV). In particular, the present invention applies a memory mapping technique to enlarge and output an arbitrary area of an image displayed on a screen. The present invention relates to an image magnification and memory data access method and an addressing device accordingly.

In general, in financial institutions such as banks, department stores, large bookstores, and valuables stores, the recent trend is that surveillance devices are provided to monitor each part of the store to prevent theft of valuables or for the safety of customers. to be.

A representative apparatus that performs the above-mentioned function is called CCTV, and a video camera fixes or scans an arbitrary area, reads an image corresponding to the current area, and processes the bottom image read by the data to process the CRT (Cathode Ray Tube). It is a device that is displayed on a back and asks a supervisor or monitor to confirm it.

In this case, the monitor may feel the impulse of the need to expand and examine the suspected or specially identified part of the read image displayed on the CRT. A method of loading software for enlarging the partial screen in the mobile phone has been proposed.

However, in the above-described conventional screen magnification method, the operation for screen magnification is performed by the software, so that the response time of the operation is slow, and further, the screen magnification by the software in which the control unit is installed in addition to its own performance function. There is a problem that the control unit is overloaded because an operation must be performed.

Accordingly, an object of the present invention for solving the above problems is to store the image signal read out from the video camera in the memory and to allocate the stored image data to a predetermined number of sub-region data to display the full screen of the user. Image access and memory data access method using a memory mapping technique that outputs only the pixel data assigned to the corresponding area through the configuration of hardware when accessing the image data of the corresponding area according to the area selection and enlarges it It is to provide a memory addressing apparatus according to.

A feature of the present invention for achieving the above object is that any image of the entire image in the image display apparatus for storing the entire image read through the image reading means in the memory and then accessing the stored image data and displaying it through the display means An image magnification display method for enlarging and displaying an area equal to an entire screen size, comprising: a first step of dividing and setting an entire memory area into sub-areas having a constant aspect ratio; A second step of accessing horizontal and vertical pixel data corresponding to the corresponding area when an arbitrary area is selected by the user among the detailed areas set in the first step; A third step of repeatedly displaying the horizontal and vertical pixel data accessed in the second step a predetermined number of times to generate an image corresponding to the entire screen; And a fourth step of displaying the image data generated in the third step through the display means.

Another aspect of the present invention for achieving the above object is a data access method for accessing only pixel data in an arbitrary region of stored image data after storing the entire image read through the image reading means in a memory, A first process of dividing the entire memory area into ^two equally sized detail areas N ^{2 having a} constant aspect ratio; In the case where each region divided in the first process is regarded as a concept of a predetermined number of pixels, the pixel position located in one row and one column among the pixel positions in each region is detected as horizontal and vertical positions of the entire memory region. 2 courses; A third step of storing the data detected in the second step as an address initial value of a corresponding region; A fourth step of inputting an address value corresponding to the corresponding area among the address initial values stored in the third step when the arbitrary area is selected by the user among the detailed areas set in the first step; And a fifth process of inputting an N times counter signal to the memory in a pulse period of a horizontal and vertical counter signal used when accessing all pixel data of the memory.

Another feature of the present invention for achieving the above object is an apparatus for accessing only pixel data in an arbitrary region of stored image data after storing the entire image read through the image reading means in a memory. An initial value setting output means for dividing the area of the image stored in the video into N ² and accessing the memory data for the designated portion among the counters of the horizontal and vertical addresses; Counter clock generating means for outputting horizontal and vertical counter clock signals for accessing pixel data of a corresponding region from address initial values output from said counter initial value setting output means; And generating an address for receiving the address initial value and the horizontal and vertical counter clock signals, and outputting an address of pixel data located in the corresponding area from the address initial value according to the horizontal and vertical counter clock signals and inputting the same to the memory. It includes a means.

By the above-described features of the present invention, the most preferred embodiment which can be easily carried out by those skilled in the art with reference to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a schematic block diagram of a CCTV system to which an addressing apparatus according to the image enlargement method of the present invention is applied. The lens 10 collects an optical signal emitted from a target to be read, and through the lens 10. A charge coupling device (hereinafter referred to as a CCD) 20 that receives the focused optical signal and outputs an electrical signal according to the strength of the corresponding optical signal, and digitally outputs the electrical signal output from the CCD 20. A signal conversion output unit 30 converts the data into a color signal and a luminance signal according to a control signal, and outputs the data for the luminance signal of the entire image output from the signal conversion output unit 30. In the first memory 40, the second memory 50 for storing the data for the color signal of the entire image output from the signal conversion output unit 30, and in the first, second memory (40, 50) Output data An image generation unit 60 for receiving and converting the image signal suitable for a predetermined aspect ratio according to a control signal; and a CRT 70 for receiving and displaying image data output from the image generation unit 60 on a screen; The keyboard 80 for generating a key selection signal according to the control operation of the controller, and area classification data for dividing the memory areas of the first and second memories 40 and 50 into a predetermined number of areas are set in advance. In order to access only image data corresponding to a region set according to a key selection signal generated at 80, an address of the region is input to the first and second memories 40 and 50, and the accessed data is a CRT. The control unit 100 controls the image generating unit 60 to correspond to the aspect ratio of 70.

An example of the area division of the memory 40, 50 in the above configuration is shown in FIG.

In the case shown in FIG. 2, a case where the entire memory area is assumed to be 768x480 is divided equally into nine areas of equal size.

In addition, referring to FIG. 3 attached to the memory address control part of the configuration of the controller 100, as shown in FIG. 2, the image stored in the memory is divided into nine equal parts, A counter initial value setting unit 110 for generating a counter initial value of horizontal and vertical addresses for accessing a memory address, and setting the counter initial value for an address generation input for an entire memory area or an address generation input for a specific area A counter for outputting a signal obtained by dividing a horizontal and a stock counter signal each of which is divided into three horizontal and vertical counter signals for accessing the entire memory area as horizontal and vertical counter signals for accessing a corresponding area when an address is generated for a specific area according to an operation mode of the unit 110. The clock setting unit 120, the counter initial value setting unit 110, and the counter clock setting unit 1 And an address generator 130 that receives the signal output from 20 and generates horizontal and vertical addresses of the corresponding area and inputs the signals to the first and second memories 40 and 50.

The address generator 130 receives a counter initial value of a horizontal address and a horizontal counter signal among signals output from the counter initial value setting unit 110 and the counter clock setting unit 120 to correspond to pixels of the corresponding area. Among the signals output from the horizontal address generator 130A, the counter initial value setting unit 110, and the counter clock setting unit 120, the counter initial value of the vertical address and the vertical counter signal are inputted. The vertical address generator 130B outputs a vertical address corresponding to the pixel of the region.

In addition, as shown in FIG. 4 attached by the counter clock setting unit 120, the system clock SCLK and the horizontal blanking signal HBLK are input and have a period three times greater than the period of each input signal. A counter unit 121 for generating a horizontal counter clock HC0 HC1 and a vertical counter clock VC0 VC1 and a system clock SCLK and a horizontal blanking signal HBLK. The first and second signals of the horizontal counter clock HC0 HC1 and the vertical counter clock VC0 VC1 which are inputted to A1 and output to the counter 121 are selectively input to the second and fourth input terminals B0 and B1. The multiplexer 122 outputs to the second output terminals Q0 and Q1.

The counter 121 is composed of two counters, although not shown in its configuration, which generates HC0 and HC1 using one system clock (SCLK) (for example, 14.318 MHz), and then uses a logical multiplication means ( (Not shown) to output the horizontal counter clock signal HC0 HC1. In addition, the other counter generates VC0 and VC1 using the horizontal blanking signal HBLK, and then outputs the vertical counter clock signal VC0 VC1 through an AND function (not shown).

Looking at the preferred operation of the CCTV system to which the image magnification method according to the invention configured as described above is applied as follows.

First, since the overall operation of the CCTV system is a general one, it will be omitted in the following detailed description, and as a main aspect of the present invention, that is, as shown in FIG. If it is assumed that the mapping is divided, it will be described in detail only how the arbitrary region can be enlarged.

When the user wants to see the image read out through the lens 10 and the CCD 20 through the CRT 70, the mode selection signal MS input to the multiplexer 122 shown in FIG. In this case, the horizontal counter clock is used as the system clock (14.318MHz) and the vertical counter clock is used as the horizontal blanking signal (HBLK). Should be used.

Therefore, the multiplexer 122 is a system clock input to the first input terminal A0 to the first output terminal Q0.

(14.318 MHz) is selected and output, and the horizontal blanking signal HBLK input to the third input terminal A1 is output to the second output terminal Q1.

At this time, before the horizontal and vertical counter clocks (HCC, VCC) is generated by the operation of the counter clock setting unit 120 as described above, the counter initial value setting unit 110 having a data table as shown in Table 1 below. ), When the mode signal selected by the user judges the 'low' state input and the 'high' state input, and the 'low' state, the initial value of the horizontal and vertical counter is set to 0 according to the full screen output and is output.

Subsequently, the first and second memories are generated in the address generator 130 by the horizontal and vertical counter initial values output from the counter initial value setting unit 110 and the horizontal and vertical counter clocks generated by the counter clock setting unit 120. An address for accessing all the pixel data stored in (40, 50) is generated.

The first and second memories 40 and 50 output pixel data corresponding to the addresses generated by the address generator 130, and the image generator 60 outputs the first and second memories ( 40 and 50 form a screen by receiving the color signal and the luminance signal of each pixel outputted to the user through the CRT (70).

In the full screen output mode as described above, when the user wants to enlarge an arbitrary area, for example, to enlarge the fifth area (indicated by the number 5 in FIG. In case of selection, the mode selection signal MS is switched to the 'high' state.

Accordingly, the multiplexer 122 selects and outputs the horizontal counter clock HC0 HC1 input to the second input terminal B0 to the first output terminal Q0 and to the fourth input terminal B1 to the second output terminal Q1. The vertical counter clock signal VC0 VC1 is outputted. The horizontal, vertical and counter clock signals are outputted.

The HC0 HC1 and VC0 VC1 are generated by the counter unit 121.

Referring to the operation of the counter 121, a horizontal counter clock signal HC0 HC1 is output using a system clock SCLK, and a vertical counter clock signal VC0 VC1 is output using a horizontal blanking signal HBLK. The total number of partitions is 9, i.e. 3 In the individual case, the horizontal counter clock HC0 HC1 is a clock signal having a period three times greater than that of the system clock SCLK. The vertical counter clock signal VC0 VC1 is a clock signal having a period three times greater than that of the horizontal blanking signal HBLK.

Therefore, by the horizontal and vertical counter counter clocks output from the multiplexer 122, the address generator 130 starts at the initial horizontal and vertical address counter values (horizontal: 256, vertical: 160) for the fifth region. It outputs by counting horizontal and vertical addresses at 3 times slower than that, and accordingly, the first and second memories 40 and 50 also store themselves at 3 times slower than the conventional full screen output mode. The pixel data corresponding to the fifth area among the existing data is output.

In the image generator 60 receiving the data output from the first and second memories 40 and 50, the same pixel is processed three times for each of the horizontal and vertical parts to enlarge the size of the image. As a result, the entire screen is formed.

Table 2 below summarizes the signal relationship of each part for screen formation in the full screen output mode and the screen magnification output mode as described above.

When providing an image enlargement and memory data access method and an addressing device applying the memory mapping technique according to the present invention operating as described above, the conventional control system to mount the software for the enlargement of the partial screen in the control unit such as CCTV systems There is an effect of solving the problem that the operation response time generated by the method is late and the control part is overloaded.

In the above-described embodiment of the present invention, a CCTV system has been described as an example, but it is expected that many applications and modifications can be made by those skilled in the art. For example, it can be used in areas such as video phones and general-purpose TVs, which can be used for all display devices in which video signals are stored in memory.

Such modifications and applications are intended to be included in the following claims.

Claims (5)

An image display apparatus that stores the entire image read through the image reading means in a memory and then accesses the stored image data and displays it through the display means. An image enlargement display method comprising: a first process of dividing an entire memory area into subregions of equal size having a constant aspect ratio; A second step of accessing horizontal and vertical pixel data corresponding to the corresponding area when an arbitrary area is selected by the user among the detailed areas set in the first step; A third step of repeatedly displaying the horizontal and vertical pixel data accessed in the second step a predetermined number of times to generate an image corresponding to the entire screen; And displaying the image data generated in the third process through the display means. The pixel processing method of claim 1, wherein in the third process, when an area of the entire memory is divided into N ² sub-regions in the first process, any pixel data accessed in the second process is N-1 on a horizontal axis. A first step of continually accessing the redundant accesses; A second step of consecutively accessing the pixel data N-1 times on the vertical axis if the pixel data exists at every position along an arbitrary horizontal axis through the first step; And a third step of repeating the first and second steps until an image corresponding to the entire screen is generated. A data access method for accessing only pixel data in an arbitrary region of stored image data after storing the entire image read through the image reading means in a memory, wherein the details of the same size are constant in the aspect ratio of the entire memory region. A first process of dividing into areas N ² ; In the case where each region divided in the first process is regarded as a concept of a predetermined number of pixels, a pixel position located in one row and one column among pixel positions in each region is detected as horizontal and vertical positions of all memory regions. 2 courses; A third step of storing the data detected in the second step as an address initial value of a corresponding region; A fourth step of inputting an address value corresponding to the corresponding area among the address initial values stored in the third step when the arbitrary area is selected by the user among the detailed areas set in the first step; And a fifth step of inputting N times the counter signal into the memory in the pulse period of the horizontal and vertical counter signals used to access all the pixel data of the memory. An apparatus for accessing only pixel data in an arbitrary region of stored image data after storing the entire image read through the image reading means in a memory, wherein the region of the image stored in the memory is divided into N ² and the designated portion is assigned to the designated portion. An initial value setting output means for setting a counter for horizontal and vertical addresses when accessing memory data for the memory; Counter clock generating means for outputting horizontal and vertical counter clock signals for accessing pixel data of a corresponding region from address initial values output from said counter initial value setting output means; And generating an address for receiving the address initial value and the horizontal and vertical counter clock signals, and outputting an address of pixel data located in the corresponding area from the address initial value according to the horizontal and vertical counter clock signals and inputting the same to the memory. Means for generating an address. 5. The apparatus of claim 4, wherein the counter clock generating means receives a first horizontal and vertical counter clock signal necessary for realizing a screen using all pixels stored in the memory and is N times longer than a period of each input signal. A counter clock generator for generating a second horizontal and vertical counter clock signal having a second clock signal; And a multiplexer for selectively outputting the first horizontal and vertical counter counter clock signals and the second horizontal and vertical counter clock signals input according to a control signal.