KR0182034B1 - High degree noise shape modulator using sigma-delta modulation - Google Patents

Abstract

The present invention relates to a higher-order noise shaping modulator using sigma-delta modulation, comprising: a first modulator (60) for receiving a digital signal and shaping and outputting noise by sigma-delta modulation; and the first modulator (60). A subtractor 70 for extracting and outputting a noise component from the signal outputted from the signal), and a quantization for shaping noise by sigma-delta modulation and removing quantization noise by receiving the noise component signal output from the subtractor 70. The noise canceller 80 and the adder 90 receives the signal output from the first modulator 60 and the signal output from the quantization noise canceller 80, and adds the output signal to the digital signal. By removing the noise generated when converting to a signal or conversely converting an analog signal to a digital signal, by constructing a noise shaping structure in multiple stages, Reducing the number of bits of the output bell, it is possible to reduce the filter order of the rear end can be expanded to a higher order structure, and Sigma that can reduce the size of the circuit relates to a high-order noise shaping modulator using a delta modulation.

Description

Higher-Order Noise-Formed Modulator Using Sigma-Delta Modulation

1 is a circuit diagram showing a typical 3-bit digital-to-analog converter,

2 is a circuit diagram applying a noise shaping modulator of the prior art,

3 is a block diagram of a high-order noise shaping modulator using sigma-delta modulation according to the first embodiment of the present invention.

4 is a block diagram of a high-order noise shaping modulator using sigma-delta modulation according to a second embodiment of the present invention.

The present invention relates to a higher order noise shaping modulator using sigma-delta modulation, and more specifically, to converting a digital signal into an analog signal, or vice versa. In order to eliminate the noise generated in the conversion, the noise shaping structure is configured in multiple stages, thereby reducing the number of bits in the final output and reducing the filtering order at the rear end, thereby expanding the higher order structure. The present invention relates to a higher-order noise shaping modulator using sigma-delta modulation that can reduce the size of a circuit.

Digital-to-analog converters are used in almost all electronic circuits that handle digital and analog signals together, and are typically constructed using arrays of resistors or arrays of capacitors.

Hereinafter, a general digital-analog converter will be described.

1 is a circuit diagram illustrating a typical 3-bit digital-to-analog converter.

The 3-bit digital signal has eight steps from '000' to '111'. When the input signal (Din) decoded to 8-bit is input, the corresponding switch is turned on. The resistance value is determined and the voltage of the output signal Vo is determined by the reference voltage Vref according to the resistance value.

For example, when a digital signal having a value of '011' is input, the fourth switch S4 is turned on by inputting the input signal Din of '00001000' with 8 bits, and the output signal value is represented by the following equation (1). Is calculated as

Here, when the value of the reference resistor Rref and the values of each of the resistors R1 to R7 are the same, Equation (1) is simplified as in Equation (2) below.

That is, the value of the analog signal converted for the digital signal '011' is represented as '5/8' times the reference voltage (Vref), and the value of the converted analog signal for each input digital signal is shown in Table 1 below. same.

However, in the above, the value of the analog signal for each digital signal is determined assuming that the value of each resistance is the same. If the resistance value has an error, the output analog value does not appear precisely.

In Fig. 1, a 3-bit digital-to-analog converter is shown, but 8-bit to 10-bit digital-to-analog converters are practically required to process video signals, and 13-bits are required to process signals for communication and audio. A 16-bit digital-to-analog converter is required. For example, when 13 bits are processed, the output analog value is '8192' steps. The value of the signal is easy to appear error, especially when noise occurs in the surroundings, there is a problem that the value of the output signal is out of the correct original value.

Digital-to-analog converters for communication and audio are designed to improve the signal-to-noise ratio by using a sigma-delta modulation noise shaping modulator to solve the above problems.

By the way, the sigma-delta modulation of the noise shaping modulator, in order to obtain a higher resolution has to increase the order of the noise shaping, accordingly, a lot of research has been conducted in the meantime, proposed as one of the multi-stage higher-order noise shaping modulator ( MASH (multistage noise shaping) technology.

The higher-order noise shaping modulator is configured to form a stable first-order and second-order noise shaping structure in multiple stages in order to improve instability occurring in the higher-order noise shaping structure.

Hereinafter, a noise shaping modulator according to the prior art will be described.

2 is a circuit diagram of a conventional noise shaping modulator.

As shown in FIG. 2, the conventional noise shaping modulator includes: a first modulator 10 for receiving a digital signal and shaping and outputting noise by sigma-delta modulation; A subtractor 20 for extracting and outputting a noise component from a signal output from the first modulator 10; A second modulator 30 receiving the noise component signal output from the subtractor 20 and shaping and outputting noise by sigma-delta modulation; A differentiator 40 which receives a signal output from the second modulator 30 and removes and outputs the quantization noise generated by the first modulator 10; The adder 50 receives the signal output from the first modulator 10 and the signal output from the differentiator 40, and adds the received signal.

The first modulator 10 includes a first delay unit DY11 for feeding back and delaying the signal processed by the first modulator 10 and outputting the digital signal X. A subtractor DF12 for subtracting and outputting a signal fed back from the first delay unit DY11, an integrator 15 for integrating and outputting a signal output from the subtractor DF12, and from the integrator 15; It consists of a quantizer Q16 for quantizing and outputting the output signal.

The integrator 15 includes an adder AD15 outputting the signal output from the subtractor DF12 and a feedback signal to the quantizer Q16, and a signal output from the adder AD15. And a second delay unit DY15 which is fed back, delayed and outputted to the adder AD15.

The subtractor 20 receives the output signal of the integrator 15 of the first modulator 10 and subtracts the output signal of the quantizer Q16 of the first modulator 10.

The configuration of the second modulator 30 includes a first delay unit DY31 which feeds back the signal processed by the second modulator 30, delays it, and outputs it from the subtractor 20. A subtractor DF32 for receiving a signal to be received and subtracting the signal fed back from the first delay unit DY31, an integrator 35 for integrating and outputting a signal output from the subtractor DF32; It consists of a quantizer (Q36) for quantizing and outputting the signal output from the integrator (35).

The integrator 35 includes an adder AD35 for adding the signal output from the subtractor DF32 and a feedback signal and outputting the added signal to the quantizer Q16, and a signal output from the adder AD35. And a second delay unit DY35 which is fed back, delayed and outputted to the adder AD35.

The differentiator 40 includes a delay unit DY41 for delaying and outputting a signal output from the second modulator 30, and a delay unit (i) for the signal output from the second modulator 30. And a subtractor DF42 which subtracts the signal output from the DY41 and outputs it to the adder 50.

Operation of the prior art noise shaping modulator is as follows.

When the digital signal X is input, the first modulator 10 outputs noise shaping by sigma-delta modulation. First, the first delay unit DY11 is processed by the first modulator 10 immediately before. The signal is fed back and delayed, and the subtractor DF12 receives the digital signal X and subtracts and outputs the signal fed back from the first delay unit DY11.

The integrator 15 including the adder AD15 and the second delayer DY15 integrates and outputs the signal output from the subtractor DF12, and the quantizer Q16 outputs from the integrator 15. The signal to be quantized is output.

The subtractor 20 receives the output signal of the integrator 15 of the first modulator 10 and subtracts the output signal of the quantizer Q16 of the first modulator 10 to output the first signal. The noise component is extracted from the signal output from the first modulator 10.

The second modulator 30 receives the noise component signal output from the subtractor 20 and shapes and outputs the noise by sigma-delta modulation. The first delay unit DY31 is immediately before the second modulator. The signal processed at 30 is fed back and delayed, and the subtractor DF32 receives the signal output from the subtractor 20 and subtracts and outputs the signal fed back from the first delay unit DY31.

The integrator 35 integrates and outputs the signal output from the subtractor DF32, and the quantizer Q36 quantizes and outputs the signal output from the integrator 35.

The differentiator 40 receives a signal output from the second modulator 30, and removes the quantization noise generated by the first modulator 10, and the delay unit DY41 is the second modulator. The signal output from 30 is delayed and output, and the subtractor DF42 subtracts and outputs the signal output from the delay DY41 from the signal output from the second modulator 30.

The adder 50 receives and outputs a signal output from the first modulator 10 and a signal output from the differentiator 40 so that the digital analog converter converts the signal.

By operating as described above, instability occurring in the higher order noise shaping structure can be improved.

However, when using the higher-order noise shaping structure, the result of the final output is a large number of bits, usually 3 or more bits are required, and there is a problem in the linearity during the digital-to-analog conversion, and as with the conventional noise shaping structure, There is a problem that the filtering burden of the rear end is gradually increased.

Accordingly, an object of the present invention is to solve the conventional problems as described above, and to eliminate noise generated when converting a digital signal into an analog signal, or conversely, converting an analog signal into a digital signal. By constructing the noise shaping structure in multiple stages, it is possible to reduce the number of bits in the final output, reduce the filtering order at the rear end, and expand to higher order structure, and higher order noise shaping modulator using sigma-delta modulation that can reduce the size of the circuit. Is in providing.

A configuration of the present invention for achieving the above object comprises: first modulating means for receiving a digital signal and shaping and outputting noise by sigma-delta modulation; Noise extraction means for extracting and outputting a noise component from the signal output from the first modulation means; Quantization noise removing means for receiving noise component signals output from the noise extracting means and performing noise shaping by sigma-delta modulation and removing quantum and noise; And a signal completion means for receiving and outputting a signal output from the first modulating means and a signal output from the quantization noise removing means.

Hereinafter, with reference to the accompanying drawings will be described the most preferred embodiment that can be easily carried out this invention.

3 is a block diagram of a high-order noise shaping modulator using sigma-delta modulation according to the first embodiment of the present invention.

As shown in FIG. 3, the configuration of the higher-order noise shaping modulator using sigma-delta modulation according to the first embodiment of the present invention includes a first modulation that receives a digital signal and shapes and outputs noise by sigma-delta modulation. Section 60; A subtractor (70) for extracting and outputting a noise component from the signal output from the first modulator (60); A quantization noise removing unit (80) which receives a noise component signal output from the subtractor (70) and performs noise shaping by sigma-delta modulation and removes quantization noise; The adder 90 receives the signal output from the first modulator 60 and the signal output from the quantization noise removing unit 80, and adds the received signal.

The first modulator 60 is configured to receive a first delay unit DY61 and a digital signal X which are fed back to the signal processed by the first modulator 60, delayed, and output. A subtractor DF62 for subtracting and outputting the signal fed back from the first delay unit DY61, an integrator 65 for integrating and outputting a signal output from the subtractor DF62, and the integrator 65; It consists of a quantizer Q66 for quantizing and outputting the signal output from the.

The integrator 65 has an adder AD65 which adds a signal output from the subtractor DF62 and a feedback signal, and outputs the adder AD65 to the quantizer Q66 and a signal output from the adder AD65. And a second delay unit DY65 which is fed back, delayed and outputted to the adder AD65.

The subtractor 70 receives the output signal of the integrator 65 of the first modulator 60 and subtracts the output signal of the quantizer Q66 of the first modulator 60.

The configuration of the second modulator 80 includes a first delay unit DY81 for delaying and outputting a signal processed by the second modulator 80 immediately before it is delayed and the first delay unit DY81. A differentiator 82 for differentiating and outputting a signal output from the first subtractor, a first subtractor DF83 for receiving a signal output from the subtractor 70 and subtracting and outputting a signal output from the differentiator 82; An integrator 85 for integrating and outputting the signal output from the first subtractor DF83 and a signal output from the differentiator 82 after receiving the signal output from the integrator 85 A second subtractor DF86 and a quantizer Q87 for quantizing and outputting a signal output from the second subtractor DF86.

The configuration of the differentiator 82 includes a second delay unit DY82 for receiving a signal output from the first delay unit DY81 and delaying and outputting the signal again, and outputting from the first delay unit DY81. The first adder AD82 receives the signal and subtracts the signal output from the second delay unit DY82.

The integrator 85 includes a second adder AD85 for adding a signal output from the first subtractor DF83 and a feedback signal to the second subtractor DF86, and a second adder. And a third delay unit DY85 which feeds back the signal output from AD85, delays it, and outputs it to the second adder AD85.

Operation of the first embodiment of the present invention made as described above is as follows.

When the digital signal X is input, the first modulator 60 outputs noise by sigma-delta modulation. First, the first delay unit DY61 is processed by the first modulator 60 immediately before. The signal is fed back and delayed, and the subtractor DF62 receives the digital signal X and subtracts and outputs the signal fed back from the first delay unit DY61.

The integrator 65 including the adder AD65 and the second delay unit DY65 integrates and outputs the signal output from the subtractor DF62, and the quantizer Q66 is output from the integrator 65. The signal to be quantized is output.

The subtractor 70 receives the output signal of the integrator 65 of the first modulator 60 and subtracts the output signal of the quantizer Q66 of the first modulator 60 to thereby subtract the first modulator. The noise component is extracted from the signal output from the unit 60 and output.

The quantization noise removing unit 80 receives the noise component signal output from the subtractor 70 and removes the quantization noise by noise shaping by sigma-delta modulation. The first delay unit DY81 is immediately before the second delay unit DY81. The signal processed by the modulator 80 is fed back, delayed and output, and the differentiator 82 differentially outputs the signal output from the first delay unit DY81.

That is, the second delay unit DY82 of the differentiator 82 receives a signal output from the first delay unit DY81 and delays and outputs the signal again, and the first adder AD82 outputs the first delay unit. The signal output from the device DY81 is received, and the signal output from the second delay unit DY82 is subtracted and output.

The first subtractor DF83 receives the signal output from the subtractor 70 and subtracts the signal output from the differentiator 82, and the integrator 85 receives the first subtractor DF83. Integrate and output the signal output from

That is, the second adder AD85 of the integrator 85 adds and outputs the signal output from the first subtractor DF83 and the feedback signal, and the third delayer DY85 outputs the second adder AD85. The signal outputted from the reference signal) is fed back, delayed, and output to the second adder AD85.

The second subtractor DF86 receives the signal output from the integrator 85 and subtracts the signal output from the differentiator 82, and outputs the quantizer Q87 from the second subtractor DF86. Quantize and output the output signal.

The adder 90 receives and outputs the signal output from the first modulator 60 and the signal output from the quantization noise removing unit 80, thereby outputting the digital analog converter.

Using the transfer function equation for the circuit of Figure 3, the following equation (3) is given.

The above formula (3) is summarized as shown in the following formula (4).

By operating as described above, the number of differentiators present in the lower stage of the multi-stage is reduced, so that the number of bits of the final output is reduced, and the noise-formed order is also reduced, thereby improving instability in the higher-order noise shaping structure.

Hereinafter, with reference to the accompanying drawings will be described a second embodiment of the present invention.

4 is a block diagram of a high-order noise shaping modulator using sigma-delta modulation according to a second embodiment of the present invention.

As shown in FIG. 4, the configuration of the higher-order noise shaping modulator using sigma-delta modulation according to the second embodiment of the present invention includes a first signal receiving a digital signal and shaping and outputting noise by sigma-delta modulation. A modulator 100; A subtractor 200 for extracting and outputting a noise component from a signal output from the first modulator 100; A quantization noise canceller (300) for receiving a noise component signal output from the subtractor (200) and shaping noise by sigma-delta modulation and removing quantization noise; The adder 400 receives the signal output from the first modulator 100 and the signal output from the quantization noise remover 300, and adds the received signal.

The first modulator 100 includes a first delay unit DY101 for delaying and outputting a signal processed by the first modulator 100 before being delayed and a digital signal X. A first adder AD102 that adds and outputs a signal fed back from the first delay unit DY101, a first integrator 103 that integrates and outputs a signal output from the first adder AD102, and the first adder AD102; Integrates the third adder (AD104) and the signal output from the third adder (AD104) by receiving the signal output from the first integrator 103, and adds and outputs the signal output from the first delay unit (DY101) And a second integrator 105 for outputting and a quantizer Q106 for receiving a signal output from the second integrator 105 and quantizing and outputting the signal.

The first integrator 103 may include a second adder AD103 for adding a signal output from the first adder AD102 and a feedback signal to the third adder AD104, and the second adder. And a second delay unit DY103 which feeds back the signal output from the AD103, delays it, and outputs it to the second adder AD103.

The second integrator 105 includes a fourth adder AD105 for outputting the signal output from the third adder AD104 and a feedback signal to the quantizer Q106, and the fourth adder ( And a third delay unit DY105 which feeds back the signal output from AD105, delays it, and outputs it to the fourth adder AD105.

The subtractor 200 receives the output signal of the second integrator 105 of the first modulator 100 and subtracts the output signal of the quantizer Q106 of the first modulator 100. .

The configuration of the quantization noise removing unit 300 includes a first delay unit DY301 for delaying and outputting a signal processed by the quantization noise removing unit 300 immediately before the delay signal, and the first delay unit DY301. A first integrator 302 for integrating and outputting a signal output from the second integrator; a second integrator 303 for integrating and outputting a signal output from the first integrator 302; and outputted from the subtractor 200 A first subtractor DF304 for receiving a signal and subtracting the signal output from the second integrator 303 and a signal output from the first subtractor DF304 and the first integrator 302. A second subtractor DF305 for subtracting and outputting a signal output from the second subtractor DF305, and a quantizer Q306 for receiving a signal output from the second subtractor DF305 and quantizing the signal.

The first integrator 302 includes a second delayer DY302 for receiving a signal output from the first delayer DY301 and delaying and outputting the signal again, and the first delayer DY301. The first adder AD302 receives a signal output from the second delayer DY302 and adds the signal output from the second delayer DY302.

The second integrator 303 includes a third delay unit DY303 for delaying and outputting a signal output from the first integrator 302 and a signal output from the first integrator 302. And a second adder AD303 that adds and outputs a signal output from the third delay unit DY303.

Operation of the second embodiment of the present invention made as described above is as follows.

When the digital signal X is input, the first modulator 100 performs noise shaping by sigma-delta modulation, and first, the first delay unit DY101 is processed by the first modulator 100 immediately before. The delayed signal is fed back and delayed, and the first adder AD102 receives the digital signal X and adds and outputs the signal fed back from the first delay unit DY61.

In addition, the first integrator 103 including the second adder AD103 and the second delay unit DY103 integrates and outputs the signal output from the first adder AD102. The AD103 adds the signal output from the first adder AD102 and the feedback signal and outputs the signal to the third adder AD104, and the second delay unit DY103 outputs the signal from the second adder AD103. Is fed back, delayed, and outputted to the second adder AD103.

The third adder AD104 receives the signal output from the first integrator 103 and adds and outputs the signal output from the first delay unit DY101.

The second integrator 105 integrates and outputs the signal output from the third adder AD104. Specifically, the fourth adder AD105 outputs a signal output from the third adder AD104 and a signal fed back. In addition, the output signal is output to the quantizer Q106, and the third delay unit DY105 feeds back the signal output from the fourth adder AD105, delays it, and outputs it to the fourth adder AD105.

The quantizer Q106 receives the signal output from the second integrator 105 and quantizes the signal.

The subtractor 200 receives the output signal of the second integrator 105 of the first modulator 100 and subtracts and outputs the output signal of the quantizer Q106 of the first transformer 100. The noise component is extracted from the signal output from the first modulator 100 and output.

The quantization noise removing unit 300 receives a noise component signal output from the subtractor 200 and shapes noise by sigma-delta modulation and removes quantization noise.

Specifically, first, the first delayer DY301 feedbacks the signal processed by the quantization noise removing unit 300 immediately before, delays the output, and the first integrator 302 outputs the first delayer DY301. The first integrator 302 for integrating and outputting the signal output from the first integrator and the signal output from the first integrator 302 are integrated for output.

That is, the second delay unit DY302 of the first integrator 302 receives the signal output from the first delay unit DY301 and delays and outputs the signal again, and the first adder AD302 outputs the first delay unit. The signal output from the delay unit DY301 is input and integrated by outputting the signal output from the second delay unit DY302.

In addition, the second integrator 303 integrates and outputs the signal output from the first integrator 302. Specifically, the third delay unit DY303 outputs the signal output from the first integrator 302. The second adder AD303 receives the signal output from the first integrator 302 and adds the signal output from the third delayer DY303.

The first subtractor DF304 receives the signal output from the subtractor 200 and subtracts the signal output from the second integrator 303, and outputs the subtractor DF305. The signal output from the unit DF304 is input, and the signal output from the first integrator 302 is subtracted and output.

The quantizer Q306 receives the signal output from the second subtractor DF305 and quantizes the signal.

The adder 400 receives and outputs the signal output from the first modulator 100 and the signal output from the quantization noise removing unit 300, thereby outputting the digital analog converter.

Using the transfer function equation for the circuit of Figure 4, the following equation (5) is given.

The above formula (4) is summarized as shown in the following formula (6).

By operating as described above, the number of differentiators in the lower stage of the multi-stage is reduced, so that the number of bits of the final output is reduced, the noise-formed order is also reduced, and it is possible to expand to higher order structures and to improve the instability of the noise-forming structure. Can be.

Accordingly, the higher-order noise shaping modulator using sigma-delta modulation, which operates as described above, eliminates noise generated when converting a digital signal into an analog signal, or conversely, converting an analog signal into a digital signal. By constructing the noise shaping structure in multiple stages, it is possible to reduce the number of bits in the final output, reduce the filtering order at the rear end, and expand to a higher order structure.

Claims (14)

First modulation means for receiving a digital signal and shaping and outputting noise by sigma-delta modulation; Noise extraction means for extracting and outputting a noise component from the signal output from the first modulation means; Quantization noise removing means for receiving noise component signals output from the noise extracting means and performing noise shaping by sigma-delta modulation and removing quantum and noise; And a signal completion means for receiving and outputting a signal output from the first modulating means and a signal output from the quantization noise removing means, and outputting the signal. The first modulator according to claim 1, wherein the first modulator comprises a first delay unit (DY61) and a digital signal (X) for feeding back a signal processed by the first modulator and delaying the signal. A subtractor DF62 for subtracting and outputting the signal fed back from the first delay unit DY61, an integrator 65 for integrating and outputting a signal output from the subtractor DF62, and the integrator 65; A high order noise shaping modulator using sigma-delta modulation, characterized in that it comprises a quantizer (Q66) for quantizing and outputting the signal output from the signal. The adder (AD65) according to claim 2, wherein the integrator (65) includes an adder (AD65) for adding the signal output from the subtractor (DF62) and a feedback signal to the quantizer (Q66), and the adder (AD65). And a second delay unit (DY65) which feeds back the signal outputted from the signal), delays it, and outputs the delayed signal to the adder (AD65). The first modulator according to claim 1, wherein the first modulator comprises a first delay unit DY101 for delaying and outputting a signal processed by the first modulator for delay, and receiving a digital signal X. A first adder AD102 that adds and outputs a signal fed back from the first delay unit DY101, a first integrator 103 that integrates and outputs a signal output from the first adder AD102, and the first adder AD102; Integrates the third adder (AD104) and the signal output from the third adder (AD104) by receiving the signal output from the first integrator 103, and adds and outputs the signal output from the first delay unit (DY101) A high order noise shaping modulator using sigma-delta modulation, comprising a second integrator 105 for outputting and a quantizer Q106 for receiving a signal output from the second integrator 105 and quantizing and outputting the signal. . The second adder (AD103) according to claim 4, wherein the first integrator (103) is configured to add a signal output from the first adder (AD102) and a feedback signal and output the result to the third adder (AD104). And a second delay unit DY103 which feeds back the signal output from the second adder AD103, delays it, and outputs it to the second adder AD103. Noise shaping modulator. The second integrator 105 includes: a fourth adder AD105 which adds a signal output from the third adder AD104 and a feedback signal and outputs the signal to the quantizer Q106; Higher-order noise shaping using sigma-delta modulation characterized in that it comprises a third delay unit (DY105) for feeding back the signal output from the fourth adder (AD105), delaying it, and outputting it to the fourth adder (AD105). Modulator. The method of claim 1, wherein the noise extracting means receives the output signal of the integrator 65 of the first modulating means, and subtracts and outputs the output signal of the quantizer Q66 of the first modulating means. Higher-Order Noise-Formed Modulator Using Sigma-Delta Modulation. The method of claim 1, wherein the noise extracting means receives the output signal of the second integrator 105 of the first modulating means and subtracts and outputs the output signal of the quantizer Q106 of the first modulating means. A higher-order noise shaping modulator using sigma-delta modulation. 2. The structure of the first modulator according to claim 1, wherein the second modulator comprises a first delay unit (DY81) for delaying and outputting a signal processed by the second modulator immediately before the delay, and the first delay unit (DY81). A differentiator 82 for differentiating and outputting a signal output from the first signal, a first subtractor DF83 for receiving a signal output from the noise extracting means and subtracting and outputting a signal output from the differentiator 82; An integrator 85 that integrates and outputs a signal output from a first subtractor DF83, and a second output that subtracts and outputs a signal output from the differentiator 82 by receiving a signal output from the integrator 85 A high order noise shaping modulator using sigma-delta modulation, comprising a subtractor (DF86) and a quantizer (Q87) for quantizing and outputting a signal output from the second subtractor (DF86). 10. The apparatus of claim 9, wherein the differentiator 82 comprises: a second delay unit DY82 for receiving a signal output from the first delay unit DY81 and delaying and outputting the signal again; High order noise shaping using sigma-delta modulation characterized in that it comprises a first adder (AD82) for receiving the signal output from the device (DY81) and subtracts the signal output from the second delay unit (DY82). Modulator. The second adder (AD85) according to claim 9, wherein a configuration of the integrator (85) adds a signal output from the first subtractor (DF83) and a feedback signal and outputs it to the second subtractor (DF86). ), And a third delay unit DY85 for delaying the signal output from the second adder AD85 and outputting the delayed signal to the second adder AD85 using the sigma-delta modulation. Higher-order noise shaping modulator. 2. The apparatus of claim 1, wherein the configuration of the quantization noise removing means includes: a first delay unit DY301 for delaying and outputting a signal processed by the quantization noise removing unit immediately before, and the first delay unit DY301; A first integrator 302 for integrating and outputting a signal output from the second integrator, a second integrator 303 for integrating and outputting a signal output from the first integrator 302, and a signal output from the noise extracting means A first subtractor DF304 that receives an input and subtracts a signal output from the second integrator 303, and receives a signal output from the first subtractor DF304 from the first integrator 302 Sigma characterized in that it comprises a second subtractor (DF305) for subtracting and outputting the output signal, and a quantizer (Q306) for receiving the signal output from the second subtractor (DF305) and quantize and output the signal. Higher Order Using Delta Modulation Noise shaping modulator. The method of claim 12, wherein the configuration of the first integrator 302, the second delay unit (DY302) for receiving the signal output from the first delay unit (DY301) and delaying and outputting the signal again; Higher-order noise using sigma-delta modulation, comprising a first adder AD302 which receives a signal output from the first delay unit DY301 and adds the signal output from the second delay unit DY302 to output the signal. Orthopedic modulator. 13. The configuration of the second integrator 303 includes: a third delay unit DY303 for delaying and outputting a signal output from the first integrator 302, and the first integrator 302 from the first integrator 302; And a second adder (AD303) for receiving the output signal and adding the signal output from the third delay unit (DY303).