KR0174708B1 - Active Filter with Switched Capacitor - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active filter, and more particularly, to a low pass filter having a switched capacitor structure, the operational amplifier having a grounded inverting input stage and a first capacitor between the input stage and the non-inverting input stage of the operational amplifier. The first and second control signals having a resistor unit consisting of a switched capacitor and a second capacitor connected between the non-inverting input terminal and the output terminal of the operational amplifier, which are alternately turned on and do not overlap each other. The amount of charge increase ΔQin2 = C11 * ΔVin (t _n ) (where t = t _n is the second control signal is ON and C11 is the capacitance of the first capacitor) with respect to the input signal Vin input through the input terminal in the switched capacitor. It has a structure that is output periodically, and is connected to one end of the resistance section, and the charge amount increases ΔQin1 * 1/2 periodically A first charge generation unit for outputting a signal having a minute (wherein ΔQin1 is 2 * C11 * ΔVin (t _n-1 )); A signal having a charge amount increase of? Qin1 * 1/2 connected to the first charge amount generation unit and the input terminal and having a polarity opposite to the charge amount increase output from the first charge amount generation unit periodically is outputted to ground. A first parasitic capacitance removing unit for removing parasitic capacitance generated at the connection point A with the first charge generating unit; It is connected between the switched capacitor CN1 and the output terminal CN1 of the first charge generation portion and the output terminal, and periodically increases the charge amount increment of ΔQout1 * 1/2 (where ΔQout1 is 2 * C17 * ΔVout (t _n -1)). A second charge amount generation unit for outputting a signal having; A signal having a charge amount increment of? Qout1 * 1/2 connected to the second charge amount generation section and the output terminal periodically having a polarity opposite to the charge amount output from the second charge generation section, is outputted to ground; And a second parasitic capacitance removing unit for removing the parasitic capacitance generated at the connection point B with the second charge generation unit, wherein the signal having the amount of charge generated in the first and second charge generation units and the first capacitance It is delivered to the output terminal through two capacitors.

Description

Active Filter with Switched Capacitor

1 is a circuit diagram showing the structure of a conventional active switched capacitor filter.

2 is a waveform diagram showing the timing of signals for controlling the opening and closing of the analog switch of FIG.

3A and 3B are circuit diagrams showing charge and discharge of the capacitor of FIG. 1 according to the control signals of FIG.

4 is a circuit diagram showing the structure of an active switched capacitor filter according to an embodiment of the present invention.

5A and 5B are circuit diagrams showing charge and discharge of a capacitor in the active switched capacitor filter of FIG. 4 according to the control signals of FIG.

* Explanation of symbols for main parts of the drawings

SC: Switched Capacitor OP: Operational Amplifier

AS11-AS17, AS21-AS25: Analog Switches

C11-C17: Capacitor 110,120: Charge generation part

210,220: Parasitic capacitance removing unit Φ1, Φ2: Control signal

[Industrial use]

FIELD OF THE INVENTION The present invention relates to an active filter, and more particularly to a low pass filter having a switched capacitor structure.

[Conventional Technology and His Problems]

Many passive filters such as RLC filters using capacitors, inductors, and resistors have been implemented in the electronic circuit field. However, in recent years, with the development of semiconductor technology, integrated active filters, especially active RC filters using operational amplifiers, have been developed and applied to electronic circuits for filtering and outputting a specific band frequency for an input signal.

In particular, in the case of an active filter that processes an audio band signal, the RC time constant must be large. Therefore, in order to increase the RC time constant, the value of the resistor or capacitor that determines the RC time constant must be large, which impedes an increase in the integration degree of the active filter.

Further, in semiconductor manufacturing, since the processes for forming the resistor and the capacitor are different from each other, and each process error is within the range of about 10 to 20%, the characteristics of each active filter can be greatly changed.

In order to solve these problems, an active switched capacitor filter (SCF) has been developed that uses a switched capacitor that does not use a resistor of the active filter and allows the capacitor to charge and discharge to function as a resistor.

Such an active SCF can be manufactured differently from an active RC filter using a resistor as a component. That is, in the manufacturing process of an active SCF, a switched capacitor which functions as a resistor can be manufactured by the same capacitor formation process. As a result, in the manufacturing process of an active SCF, a process error that can occur when manufacturing an RC filter by forming a resistor and a capacitor can be greatly reduced, and the chip area is reduced because the characteristics of the filter are determined by the ratio of capacitors. Can be.

Such active SCFs are broadly classified into Euler, Bilinear, and LD (lossless discrete) SCFs according to a method of mapping a continuous signal domain into a sampled signal domain.

As is known, the Euler type SCF can be easily manufactured as a basic active SCF, but has a disadvantage in that the signal band that can be processed is narrow, whereas the Bilinear type SCF can handle the Euler type SCF. It has the advantage of being wider than the SCF method but has the disadvantage of being sensitive to parasitic capacitance.

A circuit diagram of such a bilinear SCF is shown in FIG.

Referring to FIG. 1, a conventional active SCF includes capacitors C1 and C2, an analog switch AS1 to AS4 composed of nMOSTs, and an operational amplifier OP. The capacitor C1 and the analog switches AS1 to AS4 constitute a switched capacitor SC. The first and fourth analog switches AS1 and AS4 of the analog switches AS1 to AS4 are periodically opened and closed under the control of the signal .phi.1 shown in FIG. The analog switches AS2 and AS3 are opened and closed periodically by the control of the signal .phi.2 shown in FIG.

First, as shown in FIG. 3A, when the analog switches AS1 and AS4 are turned on by the control signal .phi.1 and the analog switches AS2 and AS3 are turned off, the input signal is input. The signal Vin flows to ground through the analog switch AS1, the capacitor C1, and the analog switch AS4. At this time, when the analog switches AS1 and AS4 are momentarily turned off, that is, when the control signals .phi.1 and .phi.2 are both turned off as shown in FIG. Is charged to C1).

Subsequently, as shown in FIG. 3B, when the analog switches AS2 and AS3 are turned on by the control signal .phi.2 and the analog switches AS1 and AS4 are turned off. The polarity of the capacitor C1 is inverted momentarily so that the charge of the input signal Vin charged to the capacitor C1 is discharged to the inverting terminal of the operational amplifier OP through the analog switch AS2 and at the same time the capacitor It is discharged to the output terminal of the operational amplifier OP via (C2).

In an active SCF having such a structure, parasitic capacitance is generated at the junction of the source / drain and the metal lead of the analog switch. In the present invention, a circuit structure capable of removing the parasitic capacitance generated at the junction of the source / drain is provided. to provide.

In the filter having the above-described structure, when the source is connected to the input / output terminal Vin of the filter which is a low impedance node as in the analog switches AS1 and AS3, the low impedance node is generally shorted to ground. Since the parasitic capacitance generated at the source and the junction is grounded, it has no effect on the characteristics of the filter circuit. In addition, since the drain of the analog switch AS2 connected to the inverting input terminal of the operational amplifier OP is virtual ground, the parasitic capacitance generated at the drain and the junction does not affect the filter circuit.

However, in the conventional active SCF having the above-described structure, the parasitic capacitance Cjs generated between the junction and the source at the connection point ND of the analog switches AS1 and AS2 commonly connected to the capacitor C1. In addition, since the parasitic capacitance (Cjd) generated between the junction and the drain occurs nonlinearly and affects the filter circuit, there is a problem in that the nonlinear parasitic capacitance (Cp) cannot have desired filter characteristics. .

[Purpose of invention]

Accordingly, it is an object of the present invention to provide an active filter which is wide in the signal band which can be processed and which is not affected by nonlinear parasitic capacitance.

[Configuration of Invention]

According to a feature of the invention, the active filter comprises: an operational amplifier having an inverting input terminal grounded, a resistor comprising a switched capacitor having a first capacitor between an input terminal of the filter and a non-inverting input terminal of the operational amplifier, Input through the input stage at the switched capacitor by first and second control signals having a second capacitor connected between the non-inverting input stage and the output stage of the operational amplifier and alternately turned on and non-overlapping on each other; The charge increase ΔQin2 = C11 * ΔVin (t _n ) (wherein the second control signal is ON at t = t _n and C11 is the capacity of the first capacitor) is periodically output to the input signal Vin, and the resistor is connected to one end of, and periodically ΔQin1 * 1/2 incremental charge amount (here, the ΔQin1 is _{2 * C11 * ΔVin (t n} -1)) of a signal having the output A first charge generation unit for outputting; A signal having a charge amount increase of? Qin1 * 1/2 connected to the first charge amount generation unit and the input terminal and having a polarity opposite to the charge amount increase output from the first charge amount generation unit periodically is outputted to ground. A first parasitic capacitance removing unit for removing parasitic capacitance generated at the connection point A with the first charge generating unit; It is connected between the switched capacitor CN1 and the output terminal CN1 of the first charge generation portion and the output terminal, and periodically increases the charge amount increment of ΔQout1 * 1/2 (where ΔQout1 is 2 * C17 * ΔVout (t _n-1 )). A second charge amount generation unit for outputting a signal having; A signal having a charge amount increment of? Qout1 * 1/2 connected to the second charge amount generation section and the output terminal periodically having a polarity opposite to the charge amount output from the second charge generation section, is outputted to ground; And a second parasitic capacitance removing unit for removing the parasitic capacitance generated at the connection point B with the second charge generation unit, wherein the signal having the amount of charge generated in the first and second charge generation units and the first capacitance It is characterized in that it is transmitted to the output terminal through the two capacitors.

In this embodiment, the first charge amount generation unit includes a first analog switch and a third capacitor connected in series between the connection points CN1 and A, and a connection point between the first analog switch and the third capacitor. A second analog switch is connected between grounds, the first analog switch is opened and closed by the second control signal, and the second analog switch is opened and closed by the first control signal.

In this embodiment, the first parasitic capacitance removing unit is connected between the input terminal and the connection point A and is connected between the connection point A and the ground, the third analog switch being opened and closed by the first control signal. A fourth capacitor.

In this embodiment, the second charge amount generation section includes first charge amount output means for outputting a signal having a charge amount increase of? Qout1 * 1/2 periodically between the connection point B and the connection point CN1, and the connection point CN1 and the output terminal. And second charge amount output means for outputting a signal having a charge amount increment of? Qout2 periodically therebetween.

In this embodiment, the first charge quantity output means includes a fifth capacitor and a fourth analog switch connected in series between the connection point B and the connection point CN1, a connection point of the fifth capacitor and the fourth analog switch, and ground. And a fifth analog switch connected therebetween, wherein the fifth analog switch is opened and closed by the first control signal.

In this embodiment, the second charge quantity output means includes a sixth capacitor and a sixth analog switch connected in series between the connection point and the output terminal, and a connection point between the sixth capacitor and the sixth analog switch and ground. And a seventh analog switch connected to the sixth analog switch, the sixth analog switch is opened and closed by the second control signal, and the seventh analog switch is opened and closed by the first control signal.

In this embodiment, the second capacitance removing unit includes an eighth analog switch connected between the connection point B and the output terminal and a seventh capacitor connected between the connection point B and ground, and the eighth analog switch Is opened and closed by the first control signal.

[Action]

According to the active filter, parasitic capacitances generated at connection points A and B with the first and second charge generation units, i.e., between the source / drain and the junction of the nMOST constituting the analog switch are periodically grounded. .

EXAMPLE

Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 4 to 5.

Referring to FIG. 4, the novel active filters of the present invention are controlled by the first and second charge generation units 110 and 120 by first and second control signals that are alternately turned on and do not overlap each other. Periodically, each charge increase of ΔQin1 * 1/2 (wherein ΔQin1 is 2 * C11 * ΔVin (t _n-1 )) and a charge increase of ΔQout1 * 1/2 (wherein ΔQout1 is 2 * C17 * ΔVout ( t _n-1 )), and periodically the charge amount increase of ΔQin1 * 1/2 and the charge amount increase of ΔQout1 * 1/2 having polarities opposite to the first and second charge generation units 110 and 120 are grounded, respectively. The parasitic capacitances generated at the connection points A and B with the first and second charge generation units 110 and 120 are periodically removed.

4, the active filter of the present invention is provided to the switched capacitor (SC) in which the input signal (Vin) applied through the input terminal functions as a resistance, and the amount of charge provided through the switched capacitor (SC) is The non-inverting terminal is applied to the inverting terminal of the grounded operational amplifier OP, and includes a conventional configuration in which a negative feedback input capacitor C12 is connected between the inverting terminal of the operational amplifier OP and the output terminal. The switched capacitor SC has a general structure and is composed of four analog switches AS11, AS12, AS21, and AS22 and one capacitor C11, and the analog switches AS21 and AS22 are shown in FIG. It is opened and closed by the control signal .phi.2, and the analog switches AS11 and AS12 are opened and closed by the control signal .phi.1 shown in FIG. The high levels of the control signals .phi.1 and .phi.2 do not overlap each other in one cycle T as shown in FIG. The switched capacitor SC periodically operated by the control signals .phi.1 and .phi.2 outputs a signal having an increase in the charge amount of? Qin2 = C11 *? Vin (t _n ) through the capacitor C11. The signal having this increase amount is input to the inverting terminal of the operational amplifier OP through the analog switch AS22 turned on when the control signal .phi.2 is turned on.

Meanwhile, a first parasitic capacitance removing unit 210 and a first charge generating unit 110 are connected in series between an input terminal of the switched capacitor SC and a connection point of the capacitor C11 and the analog switch AS22. have.

The first charge generation unit 110 is installed between the connection point (A) and the connection point CN1 with the first parasitic capacitance removing unit 210 and outputs a signal having a charge amount increment of ΔQin1 * 1/2 periodically The analog switch AS23 and the capacitor C14, which are opened and closed by the control signal .phi.2, are connected in series between the connection points A and CN1, and the connection point and ground of the analog switch AS23 and the capacitor C14 are grounded. The analog switch AS14, which is opened and closed by the control signal .phi.1, is connected therebetween. The connection point CN1 is a connection point of the capacitor C11 of the switched capacitor SC and the analog switch AS22.

In addition, the first parasitic capacitance removing unit 210 is connected between the input terminal of the switched capacitor (SC) and the connection point (A) to have a polarity opposite to the signal output from the first charge generation unit (110). An analog switch AS13, which outputs a signal having the same amount of charge increase, and is opened and closed by the control signal .phi.1 between these connection points A and Vin, is connected, and a capacitor C13 is connected between the connection point A and the ground. Is connected.

In this embodiment, the capacitors C13 and C14 each have twice the capacity of the capacitor C11.

On the other hand, the second charge generation unit 120 and the second parasitic capacitance removing unit 220 are connected between the connection point CN1 and the output terminal Vin of the operational amplifier OP, and the second charge generation unit 120 ) Is divided into a first charge output unit for outputting a signal having a charge quantity increase of? Qout1 * 1/2 periodically between the connection point B and the connection point CN1, and between the connection point CN1 and the output terminal Vin. Has a second charge output means for periodically outputting a signal having a charge increase of? Qout2.

The first charge quantity output part is connected in series with the analog switch AS24, which is opened and closed between the connection point CN1 and the connection point B by the capacitor C15 and the control signal .phi.2, and a control signal between their connection point and ground. It has a structure to which the analog switch AS15 which is opened and closed by phi 1 is connected. The second charge output unit has an analog switch (AS25) connected in series between the connection point (CN1) and the output terminal (Vout) by the capacitor (C17) and the control signal Φ 2 in series and between the connection point and the ground between them Is connected to the analog switch AS17 which is opened and closed by the control signal .phi.1.

In addition, the second capacitance removing unit 220 is connected between the connection point (B) and the output terminal (Vout), the analog switch AS16 controlled by the control signal Φ 1, and between the connection point (B) and ground Has a configuration in which a capacitor C16 is connected.

The operation of the active filter having the above-described configuration will be described based on FIG. 5A and FIG. 5B.

FIG. 5A is a circuit diagram showing a state in which the capacitors of the active filter of FIG. 4 are charged and discharged when the control signal .phi.1 shown in FIG. 2 is on. FIG. 5b is a diagram showing the state when the control signal .phi.2 shown in FIG. 4 is a circuit diagram showing charge and discharge of capacitors of an active filter of 4 degrees.

First, when the control signal .phi.1 is turned on at t = t _n-1 (see FIG. 2), the active filter of the present invention is operated as in FIG. 5a. That is, since the control signal .phi.2 is off when the control signal .phi.1 is on, the analog switches AS11-AS17 are turned on and the analog switches AS21-AS25 are turned off. At this time, as shown in FIG. 5A, the capacitors C11, C14, C15, and C17 are grounded, and the charges charged in the capacitors are discharged to the ground.

In this case, the amount of charge is generated in the capacitors C13 and C16 included in the first and second parasitic capacitance removing units 210 and 220, respectively.

ΔQin1 = 2 * C11 * ΔVin (t _n-1 )---(Equation 1)

ΔQout1 = 2 * C17 * ΔVout (t _n-1 )---(Equation 2)

Where ΔQin1 is the increase in charge of the capacitor C13, C11 is the capacitance of the capacitor C11, Vin is the input voltage of the switched capacitor SC, C17 is the capacitance of the capacitor C17 and Vout Is the output voltage of the operational amplifier OP.

On the other hand, when the control signal .phi.2 is turned on at t = t _n (see FIG. 2), the active filter of the present invention operates as shown in FIG. 5b. That is, since the control signal .phi.1 is off when the control signal .phi.2 is on, the analog switches AS21-AS25 are turned on and the analog switches AS11-AS17 are turned off. At this time, as shown in Figure 5b, the amount of charge is generated in the capacitor (C11) of the switched capacitor (SC) and the capacitor (C17) of the second charge output unit as shown in the following equation.

ΔQin2 = C11 * ΔVin (t _n )---(Equation 3)

ΔQout2 = C17 * ΔVout (t _n )---(Equation 4)

Here, ΔQin2 and ΔQout2 are the charge increase of the capacitors C11 and C17, respectively, C11 is the capacitance of the capacitor C11, Vin is the input voltage of the switched capacitor SC, and ΔQout2 is the capacitor ( The increase in charge amount of C17), C17 is the capacitance of the capacitor C17, and ΔVout is the output voltage of the operational amplifier OP.

In the capacitor C14 of the first charge generation unit 110 and the capacitor C15 of the second charge generation unit 120, according to the law of voltage division, the equations (1) and (2) are used. The amount of charges ΔQin1 and ΔQout1 is generated. As a result, the first charge generation unit 110 and the second charge generation unit 120 generates a charge amount as follows.

ΔQin = ΔQin1 / 2 + ΔQin2---(Equation 5)

ΔQout = ΔQout1 / 2 + ΔQout2---(Equation 6)

Here, ΔQin is a signal having an increase amount of charge generated in the first charge generation unit 110, and ΔQout is a signal having an increase amount of charge generated in the second charge generation unit 120.

In addition, in the capacitor C13 of the first parasitic capacitance removing unit 210, an increase in charge amount having a polarity opposite to the same magnitude as that of the increase amount ΔQin output from the first charge generation unit 110 flows to ground. . As a result, the parasitic capacitance (parasitic generated at the connection point A) periodically generated between the analog switch AS13 of the first parasitic capacitance removing unit 210 and the analog switch AS23 of the first charge generation unit 110. Capacitance), i.e., the parasitic capacitance between the junction and the source and the parasitic capacitance between the junction and the drain, are grounded, so that the active filter of the present invention is not affected by such parasitic capacitance.

In addition, in the capacitor C16 of the first parasitic capacitance removing unit 220, the opposite polarity of the same magnitude as that of the charge increase ΔQout1 / 2 output from the first charge output unit of the first charge generation unit 120 is obtained. An increase in charge with a flows to ground. As a result, the parasitic capacitance (parasitic capacitance generated at the connection point B) periodically generated between the analog switch AS16 of the second parasitic capacitance removing unit 220 and the analog switch AS24 of the first charge output unit, that is, Since the parasitic capacitance between the junction and the source and the parasitic capacitance between the junction and the drain are grounded, the active filter of the present invention is not affected by such parasitic capacitance.

Among the signals ΔQout output from the second charge generation unit 120, ΔQout1 / 2 is output from the capacitor C15 of the first charge output unit and ΔQout is output from the capacitor C17 of the second charge output unit. .

As such, the amount of charge output from the first and second charge generation units 110 and 120 is transferred to the output terminal Vout through the analog switch AS22 and the feedback capacitor C12 of the switched capacitor SC. At this time, if the transfer function is obtained using the Z-transformation, the following equation (7) is obtained.

As described above, according to the active filter of the present invention, the amount of charge ΔQin generated in the input block including the switched capacitor SC, the first charge generation unit 110 and the first parasitic capacitance removing unit 210 = ΔQin1 / 2 + ΔQin2), and the amount of charge generated in the output block (or feedback block) consisting of the second charge generation unit 120 and the second parasitic capacitance removing unit 220 (ΔQout = ΔQout1 / 2 + ΔQout2) The gain is determined by the A and the cutoff frequency is determined by the amount of charge generated in the capacitor C12, the second charge generation unit 120, and the second parasitic capacitance removing unit 220. Is determined.

In addition, according to the active filter of the present invention, since the parasitic capacitance between the junction and the source, and the parasitic capacitance between the junction and the drain, which can be generated at the connection point between the analog switches, can be eliminated, the parasitic capacitance is excellent. The characteristics of the active filter can be obtained.

In addition, since the active filter of the present invention is composed of a bilinear filter structure, the signal band has a wide characteristic.

Claims (7)

A resistor unit comprising an operational amplifier OP having an inverted input terminal grounded, a switched capacitor SC having a first capacitor C11 between the input terminal and the non-inverting input terminal of the operational amplifier OP, and the operational amplifier OP. In the switched capacitor (SC) by first and second control signals having a second capacitor (C12) connected between the non-inverting input terminal and the output terminal of OP), which are alternately turned on and do not overlap each other. In an active filter in which the charge amount increase ΔQin2 = C11 * ΔVin (t _n ) (where t = t _n is ON) is periodically output to the input signal Vin input through the input terminal. A first charge generation unit 110 connected to one end of the resistor unit and periodically outputting a signal having a charge increase of ΔQin1 * 1/2 (wherein ΔQin is 2 * C11 * ΔVin (t _n-1 )) )Wow; The charge amount increase of ΔQin1 * 1/2 which is connected between the first charge amount generation unit 110 and the input terminal and has a polarity opposite to the charge amount increase output from the first charge amount generation unit 110 periodically A first parasitic capacitance removing unit 210 for outputting a signal to ground to remove parasitic capacitance generated at the connection point A with the first charge generating unit 110; It is connected between the connection point CN1 of the switched capacitor SC and the first charge generation unit 110 and the output terminal, and periodically increases the charge amount of ΔQout1 * 1/2 (wherein ΔQout1 is 2 * C17 * A second charge generation unit 120 for outputting a signal having? Vout (t _n-1 ); It is connected between the second charge generation unit 120 and the output terminal, and has a charge amount increment of ΔQout1 * 1/2 having a polarity opposite to the charge amount periodically output from the second charge generation unit 120. And a second parasitic capacitance removing unit 220 for outputting a signal to ground to remove the parasitic capacitance generated at the connection point B with the second charge generation unit 120. Active signal, characterized in that the signal having the amount of charge generated in the first capacitance (C11) is transmitted to the output terminal through the second capacitor (C12). The first charge generating unit 110 and the first analog switch AS23 and the third capacitor C14 connected in series between the connection points CN1 and A, and the analog switch. And a second analog switch AS14 connected between the connection point of the AS23 and the third capacitor C14 and the ground, wherein the first analog switch AS23 is opened and closed by the second control signal, and And the second analog switch AS14 is opened and closed by the first control signal. The third analog switch AS13 of claim 1, wherein the first parasitic capacitance removing unit 210 is connected between the input terminal and the connection point A and is opened and closed by the first control signal. And a fourth capacitor (C13) connected between the connection point (A) and the ground. The method of claim 1, wherein the second charge generation unit 120 is a first charge output unit for outputting a signal having a charge increase of ΔQout1 * 1/2 periodically between the connection point (B) and the connection point (CN1) And second charge quantity output means for outputting a signal having a charge quantity increment of? Qout2 periodically between the connection point CN1 and the output terminal. The method of claim 4, wherein the first charge output means comprises a fifth capacitor (C15) and a analog switch (AS24) connected in series between the connection point (B) and the connection point (CN1), and the fifth capacitor ( C15) and a fifth analog switch AS15 connected between the connection point of the fourth analog switch AS24 and the ground, wherein the fifth analog switch AS15 is opened and closed by the first control signal. The active filter characterized by the above. 5. The second charge output unit according to claim 4, wherein the second charge output unit comprises a sixth capacitor C17 and a sixth analog switch AS25 connected in series between the connection point CN1 and the output terminal, and the sixth capacitor C17. ) And a seventh analog switch AS17 connected between a connection point of the sixth analog switch AS25 and a ground, wherein the sixth analog switch AS25 is opened and closed by the second control signal and the The seventh analog switch AS17 is opened and closed by the first control signal. The second capacitance removing unit 220 is connected to an eighth analog switch AS16 connected between the connection point B and the output terminal, and is connected between the connection point B and the ground. And an eight capacitor (C16), wherein the eighth analog switch (AS16) is opened and closed by the first control signal.