KR0174623B1 - Efm plus demodulation device for dvd - Google Patents

Abstract

The present invention relates to an EFM plus demodulation device for effective EFM plus (Eight to Fourteen Modulation Plus) demodulation in a DVD (Digital Video Disc), and shifts the input EFM plus data to present a 16-bit current state. A shift register for outputting data and 16-bit Next State data, a first latch for latching current state data output from the shift register, and a next state for inputting data output from the shift register First, second, and third demodulating the signal state output from the next state discriminator, the next state discriminator, and the current state data output from the first latch into four states, respectively, and outputting symbol data; And a fourth EFM table, a second latch for latching and delaying a signal output from the next state discriminator, and the first latch. And a multiplexer for selecting and outputting one of symbol data output from the first, second, third, and fourth EFM tables according to the signal output from the second latch.

Description

DVD EFM Plus Demodulation Device

1 is a block diagram of an EFM plus demodulation device according to the present invention.

2 is a detailed configuration diagram of the next state discriminator of FIG.

3 is a signal waveform diagram of each part of FIG.

* Explanation of symbols for main parts of the drawings

1: 32-bit shift register 2: next state discriminator

3, 8, 10, 11: latch 4, 5, 6, 7: EFM table

9: multiplexer 21, 28, 29: ora gate

22, 23, 24: Noah Gate 25, 27: And Gate

26: inverter

The present invention relates to an EFM plus demodulation device for effective EFM plus (Eight to Fourteen Modulation Plus) demodulation in a DVD (Digital Video Disc).

The DVD system is a next-generation recording device capable of recording about 8 times more data per side on a disc of the same size as a CD (Compact Disc). The data modulation method employs an EFM plus method.

The EFM plus modulation method consists of an EFM plus encoder with a 16-bit output on an 8-bit input and serially output from the most significant bit (MSB). In the serial stream, '1' is modulated. It means the conversion of data.

EFM Plus is encoded using a four-state finite state sequential machine (FSM), unlike digital sum value (DSV) control using merging bits in the conventional EFM modulation. The main EFM plus translation table contains one 16-bit EFM plus code for each possible data symbol and state. For each data symbol (0-255) and state (1-4), the 16-bit EFM plus code and the next data symbol are encoded.

In order to minimize the DSV, the symbol data (0-87) is converted according to the main table or the replacement table.

An object of the present invention is to provide an EFM plus demodulation device for effective EFM plus demodulation in a DVD.

In order to achieve the above object, the present invention shifts the input EFM plus data and outputs 16-bit current state data and 16-bit next state data, and a shift register for outputting from the shift register. A first latch for latching current state data, a next state discriminator for determining a next state by inputting data output from the shift register, a signal output from the next state discriminator, and an output from the first latch First, second, third, and fourth EFM tables for demodulating the current state data into four states and outputting symbol data, and a second latch for latching and delaying a signal output from the next state discriminator. And a symbol data output from the first, second, third, and fourth EFM tables according to a signal output from the second latch. Characterized in that it comprises a multiplexer for selecting and outputting one of the other.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a configuration diagram of the EFM plus demodulation device according to the present invention, FIG. 2 is a detailed configuration diagram of the next state discriminator 2 of FIG. 1, and FIG. 3 is a signal waveform diagram of each part of FIG.

The EFM plus demodulation device for a DVD according to the present invention includes a 32-bit shift register 1, a next state discriminator 2, latches 3, 8, 10, 11, and an EFM table 4 as shown in FIG. , 5, 6, 7, and a multiplexer 9.

The 32-bit shift register 1 shifts the input EFM plus data to output 16-bit current state data and 16-bit next state data.

The latch 11 latches the 16-bit current state data output from the 32-bit shift register 1 in accordance with the current state enable signal CWQDEN input from the outside to allow the EFM table 4, 5, 6, and 7 to be latched. Will output

The next state discriminator 2 determines the next state by inputting data output from the 32-bit shift register 1, and 16 output from the 32-bit shift register 1 as shown in FIG. OR gate 21 for ORing data Q16 and Q17 among the next state data of the bit and data Q16, Q17, Q18, Q19, Q20 and Q21 among the next state data output from the 32-bit shift register 1 NOR gate 22 for negating OR, NOR gate 23 for ignoring AND of data Q3 and Q15 among the current state data output from the 32-bit shift register 1, ora gate 21 and NOR gate ( Noah gate 24 that performs an AND logic on the output of the 22, AND gate 25 and a NOA gate 22 that outputs the outputs of the Noah gates 23 and 24 to the EFM tables 4, 5, 6, and 7. ) And AND output of AND gate 25 to latch 8 ORA gate 28 for outputting, inverter 26 for inverting output of NOA gate 23, AND gate 27 for ANDing the output of NOA gate 24 and inverter 26, and NOA gate 22) And OR gate 29 for ORing the output of AND gate 27 and outputting to latch 8.

The EFM tables 4, 5, 6, and 7 respectively input the signals output from the end gate 25 of the next state discriminator 2 and the current state data output from the latch 11 into four states. Demodulation outputs symbol data.

The latch 8 latches and delays a signal output from the OR gates 28 and 29 of the next state discriminator 2, and outputs the result to the select terminal of the multiplexer 9. A multiplexer 9 by latching a signal output from the next state flip-flop (NS F / F) and a signal output from the next state flip-flop (NS F / F). It consists of a current state flip-flop (CS F / F) that is outputted as.

The multiplexer 9 selects and outputs one of the symbol data output from the EFM tables 4, 5, 6, and 7 according to the signal output from the latch 8.

The latch 3 latches the signal NS2 output from the AND gate 25 of the next state discriminator 2 in accordance with the current state enable signal CWQDEN input from the outside to synchronize the EFM table ( 4, 5, 6, 7).

The latch 10 latches and outputs demodulated symbol data output from the multiplexer 9 in accordance with a symbol data enable signal SYDEN input from the outside.

The operation of the EFM plus demodulation device for the DVD according to the present invention configured as described above will be described with reference to FIG.

FIG. 3A is a waveform diagram of a frame synchronizing signal, FIG. 3B is a waveform diagram of a current enable signal CWQDEN, and FIG. 3C is output from the latch 11. FIG. 3D is a waveform diagram of the current state data CWQ, and FIG. 3D is a waveform diagram of the current state signal CS output from the latch 8, and FIG. 3E is a multiplexer 9 from the multiplexer 9; FIG. 3 is a waveform diagram of the demodulated symbol data SYM, and FIG. 3 f is a waveform diagram of the symbol data enable signal SYDEN, and FIG. 3 g is the final output from the latch 10. FIG. This is a waveform diagram of symbol data SYM.

EFM plus data input serially is shifted into the 32-bit shift register 1 in order. At this time, after the first 32-bit synchronization signal is input and determined according to the frame synchronization signal shown in FIG. 3A, during the next 32 clock 32T, 31:16 indicates current state data and 15: 0 indicates next state data. Will be stored.

In this way, 16-bit current state data is latched in the latch 11 according to the current state enable signal CWQDEN input from the outside of the 32-bit current and next state data stored in the 32-bit shift register 1. Here, the current enable signal CWQDEN is input immediately after the 16 clock clock 16T after the frame synchronization signal is input as shown in FIG. 3 (b) to enable the latch 11.

On the other hand, the next state discriminator 2 determines the next state by inputting some data Q3, Q15 to Q21 from the EFM plus data input to the 32-bit shift register 1.

That is, the data Q16 and Q17 are ORed in the OR gate 21 in the next state data of 16 bits, and the data Q16, Q17, Q18, Q19, Q20 and Q21 in the NOA gate 22 in the next state data. Negative OR is performed, and data Q3 and Q15 are negatively ORed at the NOR gate 23 among the current state data. In addition, the outputs NS1 and NS4 of the OR gate 21 and the NOA gate 22 are negatively ORed at the NOA gate 24, and then are ANDed to the AND gate 25 again and logically multiplied by the output of the NOA gate 23 to the EFM. It is output to tables 4, 5, 6 and 7 and used to demodulate symbol data.

Further, the outputs of the noah gate 22 and the end gate 25 are ANDed at the OR gate 28, and the output of the NOA gate 23 is inverted in the inverter 26 and then the output of the NOA gate 24 After being ANDed at AND gate 27, the output of NOA gate 22 is ORed at OR gate 29. As such, the signal output from the OR gates 28 and 29 is a signal for determining the current state. The signal is input to the multiplexer 9 through the latch 8 and output from the EFM tables 4, 5, 6, and 7. It is used to select one of the demodulated symbol data.

As shown in FIG. 3 (c), 16-bit present state data CWQ latched and output from the latch 11 is stored in the EFM tables 4, 5, 6, and 7 of the next state discriminator 2; The signal is input together with the signal NS2 output from the AND gate 25 to be demodulated into symbol data.

Here, the signal NS2 output from the AND gate 25 of the next state discriminator 2 is delayed through the latch 3 made of a flip-flop according to the current state enable signal CWQDEN, and then the EFM table 4 , 5, 6, and 7) are entered together with the current status data.

Each EFM table (4, 5, 6, 7) contains not only the main table but also information about the replacement table, and sometimes has different symbol data in the same codeword. It is when there is one. In this way, when the next state of the EFM table 4, 5, 6, and 7 is coded together, the signal output from the ora gates 28 and 29 of the next state discriminator 2 through the multiplexer 9 is coded together. Can be correctly distinguished according to.

Here, the 2-bit signal output from the OR gates 28 and 29 of the next state discriminator 2 is delayed through the next state flip flop NS F / F and the current state flip flop CS F / F. The current state signal CS is output to the select terminal of the multiplexer 9 as shown in FIG.

The synchronization judgment result is such that the next state is 1 as modulated. A state delayed once by the same current state enable signal CWQDEN becomes a current state, which is to select the conversion result of each EFM table 4, 5, 6, 7.

Finally, as shown in FIG. 3E, the demodulated symbol data SYM7: 0 output from the multiplexer 9 has a delay between the EFM tables 4, 5, 6, and 7 and the multiplexer 9. The 8-bit symbol data (which is finally demodulated as shown in FIG. 3G after being latched to the latch 10 by the symbol data enable signal SYDEN shown in FIG. The output is SYM7: 0).

As described above, the DVD EFM plus demodulation device according to the present invention enables effective demodulation of the EFM plus.

Claims (5)

Shift register (1) for shifting the input EFM plus data to output 16-bit current state data and 16-bit next state data, and the current state output from the shift register (1). A first latch 11 for latching data, a next state discriminator 2 for determining a next state by inputting data output from the shift register 1, and a output from the next state discriminator 2 First, second, third, and fourth EFM tables 4, 5, which output the symbol data by demodulating the signal and the current state data output from the first latch 11 into four states as inputs. 6, 7), the second latch 8 for latching and delaying the signal output from the next state discriminator 2, and the first and the second according to the signal output from the second latch 8; Symbols output from the 2nd, 3rd, and 4th EFM tables 4, 5, 6, and 7 DVD of EFM plus demodulation device characterized in that comprises a multiplexer (9) for selecting and outputting one of the itaconic. A third latch (3) for latching the signal output from the next state discriminator (2) to synchronize and output the signal to the first, second, third and fourth EFM tables (4, 5, 6, 7) EFM plus demodulation device of a DVD, characterized in that it further comprises. 2. The second latch 8 according to claim 1, wherein the second latch 8 latches a signal output from the next state discriminator 2, and a next state flip flop NS F / F, and the next state flip flop NS F. EF plus demodulation device for a DVD, comprising a current state flip-flop (CS F / F) which latches a signal outputted from the / F) and outputs it to the multiplexer (9) at all times. The apparatus of claim 1, further comprising a third latch 10 configured to latch and output demodulated symbol data output from the multiplexer 9 according to a symbol data enable signal SYDEN input from the outside. EFM plus demodulation device for DVD. 2. The shift register (1) according to claim 1, wherein the next state discriminator (2) comprises a first OR gate (21) and the shift register for ORing the sixteenth and seventeenth data (Q16, Q17) output from the shift register (1). First NOR gate 22 for negating and ORing the 16th, 17th, 18th, 19th, 20th, and 21st data Q16, Q17, Q18, Q19, Q20, and Q21 outputted from (1). And a second NOR gate 23 for negating and ORing the third and fifteenth data Q3 and Q15 outputted from the shift register 1, the first oa gate 21 and the first noah gate 22. The third, third, and fourth EFM tables 4, 4, and 4 are multiplied by the outputs of the third NOR gate 24 and the outputs of the second and third Noah gates 23 and 24. A second AND gate 25 output to the 5, 6, and 7 and a second AND logic output of the first NOA gate 22 and the first AND gate 25 to the second latch 8 Ora gate 28, above Inverter 26 for inverting the output of the 2 NOR gates 23, the second AND gate 27 for ANDing the outputs of the third NOR gate 24 and the inverter 26, and the first NOR gate 22. ) And a third OR gate (29) for ORing the output of the second AND gate (27) to the second latch (8).