KR0168999B1 - Video cassette recorder - Google Patents

Abstract

The present invention relates to a video cassette recorder with a multi-vision processor, comprising: video signal reproducing means for reproducing a composite video signal recorded on a video tape and simultaneously detecting a vertical synchronization signal and a horizontal synchronization signal of the composite video signal; Clock control means for receiving the vertical synchronizing signal and the horizontal synchronizing signal detected by the reproducing means and outputting a clock signal to control each component of the system; and a composite video signal reproduced by the image signal reproducing unit in red, green, and blue. RGB separation means for separating into a signal and red, green, and blue signals separated by the RGB separation means are respectively applied, and digital red, green, and blue signals in analog form are converted according to the clock signal applied from the clock control means. Analog / digital converting means for converting the data into the Storage means for storing red, green, and blue signals in a form in real time according to a clock signal applied from the clock control means, and dividing and outputting one frame of red, green, and blue signals into N pieces; N digital / analog converting means for receiving 1 / N digital red, green, and blue signals divided by the digital signal, and converting them into analog form according to the applied clock signal from the clock control means, and the N digital / N images which are synthesized in synchronization with the vertical and horizontal synchronous signals detected by the video signal reproducing means by synthesizing the 1 / N red, green and blue signals applied after being converted by the analog converting means to the display means. A signal synthesis unit is provided to incorporate a multi-vision processor into an existing video cassette recorder.

Description

Video cassette recorder with built-in multivision processor

1 is a schematic block diagram of a video cassette recorder and its peripherals for implementing a conventional multivision processor.

2 is a schematic block diagram of a video cassette recorder with a multi-vision processor according to the present invention.

* Explanation of symbols for main parts of the drawings

6: Video signal reproducing unit 7: R, G, B separation unit

8, 9, 10: A / D converter 11: A / D converter

12, 13, 14: memory 15: memory

16 to 18, 20 to 22, 24 to 26: D / A converter

19, 23, 27: 1st, 2nd, Nth D / A converter

28: D / A conversion subgroup

29, 30, 31: first, second, N-th video signal synthesis unit

32: clock control unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video cassette recorder (hereinafter, referred to as VCR) with a multi-vision processor. More specifically, a multi-vision processor function is implemented only by embedding a conventional multi-vision processor converter in a VCR. It relates to a multi-vision processor built-in VCR.

In general, a multi-vision processor function is to divide a video frame of one frame by the number of monitors in order to output a video frame of one frame using a plurality of monitors.

As shown in FIG. 1, the multi-vision processor converter 1 includes the VCR 2 and the plurality of monitors 3 to 5, as shown in FIG. (3) to (5), and to divide the composite video signal output from the VCR (2) by the number (N) of the monitors (3) to (5), red (R), green (G), blue (B). After separating into vertical sync signal (Vsync) and horizontal sync signal (Hsync) and storing them in the built-in memory in real time, after detecting the stored divided video signal in synchronization with the vertical and horizontal sync signals (Vsync, Hsync), The divided video signals synthesized by combining R, G, and B are sequentially output to the plurality of monitors 3 to 5.

However, the conventional multivision processor converter configured as described above has a problem in that a huge cost is required for the consumer to separately purchase the VCR and the multivision processor converter.

In addition, the process of interconnecting the VCR and the multi-vision processor converter is very complicated and the user feels inconvenient, and the space occupied by the multi-vision processor converter has a problem that the space cannot be efficiently utilized.

Accordingly, an aspect of the present invention is to solve the problems described above, and an object of the present invention is to provide a multi-vision processor built-in VCR that can implement a multi-vision processor function in the VCR by embedding the multi-vision processor function in the VCR. have.

A feature of the present invention for achieving the above object is a video signal reproducing means for reproducing a composite video signal recorded on a video tape and at the same time detect a vertical synchronization signal and a horizontal synchronization signal of the composite video signal; Clock control means for receiving a vertical synchronization signal and a horizontal synchronization signal detected by the video signal reproducing means and outputting a clock signal to control each component of the system; R.G.B separation means for separating the composite video signal reproduced by the video signal reproducing unit into red, green, and blue signals; An analog / digital converting means for receiving the red, green, and blue signals separated by the R.G.B separating means, and converting the red, green, and blue signals in an analog form into digital forms according to a clock signal applied from the clock control means; The digital type red, green, and blue signals converted by the analog / digital converting means are stored in real time according to the clock signal applied from the clock control means, and the red, green, and blue signals of one frame are converted into N pieces. A storage means for dividing the output; N digital / analog converting means for receiving 1N digital red, green, and blue signals divided by the storage means and converting them into an analog form according to the clock signal applied from the clock control means; And synthesizing the 1 / N red, green, and blue signals applied after being converted by the N digital / analog conversion means in synchronization with the vertical and horizontal synchronous signals detected by the video signal reproducing means, respectively. A video cassette recorder with a multi-vision processor having N video signal synthesizing means for outputting the video signal.

Where N is a natural number.

Hereinafter, a preferred embodiment of a multi-vision processor built-in VCR according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a schematic block diagram of a multi-vision processor embedded VCR according to the present invention.

2, a video signal reproducing section 6 for reproducing a video signal recorded on a video tape and a composite video signal outputted from the video signal reproducing section 6 are received and separated into R, G, and B signals. In order to receive the analog R, G, and B signals separated by the RGB separation unit 7 and the RGB separation unit 7 and convert them into digital forms, an analog / digital converter for an R signal will be described below. A / D converter section 11 and A / D converter section 11, which are composed of an A / D converter (8), an A / D converter 9 for G signals, and an A / D converter 10 for B signals. R, G, and B signals stored in digital form are stored for a predetermined time, and R, G, and B signals are divided by the number of monitors by the control means described below, and each R is outputted in real time. It consists of a memory section 15 comprising a signal memory 12, a G signal memory 13, and a B signal memory 14.

Further, a digital / analog converter for an R signal that converts the first digital R, G, and B signals into an analog form among N video signals divided into one frame by the memory unit 15 is described below. And a first D / A converter 19 composed of a D / A converter 17 for a G signal and a D / A converter 18 for a B signal, and divided into N pieces. R / D converter 20 for R signal, D / A converter 21 for G signal, and D / A converter 22 for B signal that converts the second digital R, G, and B signals into analog form Second D / A converter 23 and R-signal D / A converter 24 and G-signal D for converting the R, G, and B signals of the N-th digital form into the analog form among the N divided video signals. A D / A converter section 28 having a ND / A converter section 27 constituted of a / A converter 25 and a B signal D / A converter 26 is provided.

The first R, G, and B signals converted into an analog form by the first D / A converter 19 are output from the image signal reproducing unit 6, and the vertical synchronous signal Vsync and the horizontal synchronous signal Hsync. The first video signal synthesizing unit 29 and the second D / A converting unit 23 converting the first composite video signal synthesized and synthesized according to Second video outputting the second composite video signal synthesized by synthesizing the G, B signals according to the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync output from the image synchronizing and reproducing unit 6 to the second monitor The vertical synchronizing signal Vsync output from the video signal reproducing unit 6 to the Nth, R, G, and B signals converted into an analog form by the signal synthesizing unit 30 and the ND / A converting unit 27. And the N-th video signal synthesizing unit 31 for synthesizing the N-th composite video signal synthesized according to the horizontal synchronization signal Hsync to the N-th monitor.

In addition, the A / D converter 11, the memory unit 15, and the D / A are generated by generating the predetermined clock signal by receiving the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync from the video signal reproducing unit 6. It consists of the clock control part 32 output to the conversion part group 28. As shown in FIG.

The operation of the multi-vision processor built-in VCR having the configuration as described above is as follows.

The composite video signal reproduced by the video signal reproducing section 6 is separated into an R signal, a G signal and a B signal by the R. G. B separating section 7, respectively. In addition, the vertical synchronizing signal Vsync and the horizontal synchronizing signal Hsync output from the video signal reproducing unit 6 are applied to the clock control unit 32. The R, G, and B signals separated by the R, G, and B separators 7 are each converted into an A / D converter 8 for R signals and an A / D converter for G signals in the A / D converter 11. And R / G and B signals are respectively input to the A / D converter 10 for B signals and converted into digital R, G, and B signals so that the analog R, G, and B signals can be stored in the memory unit 15.

The R, G, and B signals, each converted into a digital form by the A / D conversion unit 11, are applied to the memories 12 to 14 in the memory unit 15 by the clock signals output from the clock control unit 32, respectively. And stored. At this time, each of the R, G, and B signals stored in the memories 12 to 14 becomes a video signal of one frame.

One frame of R, G, and B signals stored in each of the memories 12 to 14 are divided into 1 / N according to the number N of externally set monitors, and the divided 1 / N amount of R, The G and B signals are sequentially output according to the clock signal output from the clock control unit 32. The R, G and B signals thus divided and output are the Nth D / A from the first D / A converter 19. The conversion unit 27 is sequentially supplied. That is, the first D / A converter 19 is supplied with R, G, and B signals of the first 1 / N of N R, G, and B signals divided into 1 / N, and the second D / A is supplied. The A converter 23 is supplied with R, G, B signals of the second 1 / N of the N R, G, and B signals divided into 1 / N parts, and the Nth D / A converter 27 is provided. The Nth 1 / N portion of the R, G, and B signals among the N R, G, and B signals divided into 1 / N portions is supplied to the signal.

Each 1 / N amount of R, G, and B signals converted by each of the D / A converters 19, 23, and 27 is a video signal corresponding to each of the D / A converters 19, 23, and 27. Each of the video signal synthesizing units 29 to 31 is supplied with the synthesizing units 29 to 31, and each of the video signal synthesizing units 29 to 31 vertically supplies the N-split divided video signal supplied from the image signal reproducing unit 6 to the Vsync signal Vsync. ) And the horizontal sync signal (Hsync) are output in synchronization with the initial composite video signal.

Therefore, the user can watch the screen divided into N screens as one screen through the multi-vision.

As described above, according to the multi-vision processor built-in VCR according to the present invention, since the multi-vision processor function is built in the VCR, there is an effect of reducing the cost as compared to the case where a consumer purchases a separate multi-vision processor converter.

In addition, since the VCR has a multi-vision processor, it is not necessary for the consumer to connect the VCR and the multi-vision processor converter, and it is convenient and can utilize the space occupied by a separate multi-vision processor converter. There is an advantage to this.

Claims (1)

Video signal reproducing means for reproducing a composite video signal recorded on a video tape and simultaneously detecting a vertical synchronization signal and a horizontal synchronization signal of the composite video signal; Clock control means for receiving a vertical synchronous signal and a horizontal synchronous signal detected by the video signal reproducing means and outputting a clock signal to control each component of the system; R.G.B separation means for separating the composite video signal reproduced by the video signal reproducing unit into red, green, and blue signals; Analog / digital conversion means for receiving the red, green, and blue signals separated by the R.B.G separation means, and converting the red, green, and blue signals in analog form into digital forms according to the clock signal applied from the clock control means; The digital type red, green, and blue signals converted by the analog / digital converting means are stored in real time according to the clock signal applied from the clock control means, and the red, green, and blue signals of one frame are converted into N pieces. A storage means for dividing the output; N digital / analog converting means for receiving 1 / N digital red, green, and blue signals divided by the storage means, and converting them into an analog form according to the clock signal applied from the clock control means; And synthesizing the 1 / N red, green, and blue signals applied after being converted by the N digital / analog conversion means in synchronization with the vertical and horizontal synchronous signals detected by the video signal reproducing means, respectively. A video cassette recorder with a multi-vision processor, comprising: N video signal synthesizing means for outputting the video signal. Where N is a natural number.