KR0168234B1 - The integration of processor control and processor communication in all electronic exchange - Google Patents

Abstract

The present invention integrates an interprocessor communication control board (PCCA) and a communication node into a single printed circuit board (PBA), which is a board for communication between upper level processor blocks (MPHs) in charge of upper control in an electronic switchboard. The present invention relates to a method of integrating an interprocessor communication control board (PCCA) and an interprocessor communication (IPC) node in an exchange. The existing interprocessor communication (IPC) link structure is connected by a U-link cable between a node and a communication board. It is vulnerable to cable sheathing, and at the time of initial installation, a number of tables must be connected between the correct node and the communication board so that errors such as incorrect wiring occur easily, and the noise countermeasure in the cable is also an important problem. Conventionally, to solve this problem, each subsystem IPC format is replaced with a bus format, and the function of the conventional 'CIP' is changed from the upper processor (MP). By integrating the nodes into the inter-processor communication control board (PCCA), the number of PBAs is greatly reduced, as well as the connection with the bus-type IPC, which simplifies cabling and prevents errors due to cable hernia. There is an advantage to this.

Description

Integrating Interprocessor Communication Control Board (PCCA) and Inter Processor Communication (IPC) Nodes in Electronic Switching System

1 is a diagram of a conventional interprocessor communication (IPC) node structure,

2 is an architecture diagram of an interprocessor communication (IPC) node according to the present invention.

* Explanation of symbols for main parts of the drawings

10: CIPCU Communication Unit

15 ': Match Exchange Subsystem IPC (ASS IPC)

20 ': network control subsystem IPC (INS IPC)

25 ': Central control subsystem IPC (CCS IPC)

The present invention relates to a method for integrating an interprocessor communication control board (PCCA) and an inter-processor communication (hereinafter referred to as IPC) node in an electronic switching system. A processor communication controller board (PCCA) and a communication node, which are boards for communication between processor blocks (Main Processor Hardware (MPH)) and communication nodes, are connected to a single printed circuit board assembly (PBA). The present invention relates to a method for integrating an interprocessor communication control board (PCCA) and an interprocessor communication (IPC) node in an integrated electronic switch.

In general, in the TDX-10, an electronic switch, a plurality of distributed processors perform call processing by exchanging messages with each other. To this end, each processor provides a separate IPC network dedicated to high-speed message exchange, which is called Control Interworking (CI).

These are high-performance packet switches capable of connecting approximately 1800 ports. In this case, the message is in the form of a bit oriented frame, and messages can be exchanged among all processors, and in the communication form, a point-to-point form in which one processor communicates with another processor is described. And a multicast form in which one processor can send a message to a plurality of processors, and a broadcast form in which a message can be sent to all processors in the system. This feature is very useful for startup and initialization.

In addition, CI, which has the advantage of modularity, consists of a bus connecting nodes and each node, and a central inter-processor (CIP) for maintenance, and can be expanded by mounting as many nodes as necessary.

The inter-processor communication link structure of the electronic switching center is called an inter-processor communication unit (hereinafter referred to as IPCU) based on a center inter-processor communication unit (hereinafter referred to as CIPCU). Is connected, and a subscriber processor is connected to an Access Switching Subsystem (ASS) IPCU of the interprocessor communication device (IPCU). As shown in FIG. A matching exchange subsystem IPCU (15) connected to each subscriber and switching when a signal is input from the subscriber; A central control subsystem (CCS IPCU) 25 for performing a corresponding process when an operation signal is input from the matching exchange sub-system IPCU 15 through the inter-processor communication device 10; Inter-Connection Netwrok Subsystem (INS IPCU) 20, which is in charge of networking between the matching exchange subsystem IPCU 15 and the central control subsystem IPCU 25, and each subsystem IPCU 15, 20, 25, and is composed of a central processor inter-processor communication unit (CIPCU) (10) to control them centrally,

Each of the subsystems IPUCs 15, 20, and 25 is connected with a plurality of Main Processors (MPs) and Peripheral Processors (PPs), all of which are connected through a U-link.

In addition, a plurality of 'CIP' shown in the drawing is connected to each subsystem IPCU (15, 20, 25) and one side of the central inter-processor communication device 10, the role of which is the node of the device to which it is connected For example, the central control subsystem IPCU (15) is performed by the central control subsystem IPCU (15). For example, you can calculate billing until you get to work, or manage the operation and maintenance of each board.

In the IPC link structure in the conventional electronic switching system configured as described above, a node, which is a basic unit providing a path of an interprocessor communication network, is connected one-to-one with a control processor, and transmits an IPC message received from a U-link to a D-bus. It has a function of transmitting an IPC message received from a D-bus to a U-link.

Most of these nodes are implemented in hardware, so the IPC message processing speed is very fast, redundant configuration is possible, and 8-bit microcontroller is provided for self-diagnostic management.

In addition, the communication board performs inter-processor communication by performing a matching function between the upper control system block and the CI block using a 32-bit microprocessor (MC68020), and the main functions of the PCCA are the interface function between the upper control system block and the CI block, U Link redundancy, intercept, message FIFO, and more.

However, such an interprocessor communication (IPC) link structure is connected by a U-link cable between the node and the communication board, which is vulnerable to cable hernia, and requires that multiple cables be connected between the correct node and the communication board during the initial installation. Errors such as wiring easily occur, and noise countermeasures in cables are also an important problem.

Therefore, in order to solve the above-mentioned problems, the present invention integrates a node into a communication board to remove a U-link and a cable used therein, so that the communication board is directly connected to a local IPC in a bus form. The purpose of the present invention is to increase the economic efficiency by reducing the number of back-boards dedicated to nodes and half-size self and U-link cables used up to now, by not being greatly affected by the connection position.

DETAILED DESCRIPTION Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings, and a conventional configuration will be described with the same reference numerals.

FIG. 2 is a schematic diagram showing a structure of a communication link between processors simplified by the present invention, wherein each sub is connected to a higher processor performing a function of a CIP in the form of a bus and performs the same functions performed in each existing subsystem. System IPC) 15 ', 20', 25 '; A central inter-processor communication unit (CIPCU) 10 connected to the subsystem IPCs 15 ', 20', and 25 'to control respective operations; Each subsystem IPC 15 ', 20', 25 'and the upper and lower processors (MP / PP) is connected to the communication device between the central processor.

In the CIPCU operation in the message exchange between the MP of the ASS and the OMP of the CCS, the CI used in the CIPCU is set to compare only the subsystem addresses, so that if the subsystem addresses are the same regardless of the process address, the CIIP is received.

When the MP in the ASS sends a message to the OMP in the CCS, this message is output from the CIPCU to the internal bus via the CI associated with the ASS (this is called D-BUS and all CIs are connected) and other CIs connected to this internal bus The subsystem address of the message is compared.

The present invention configured as described above configures communication apparatuses (ASS IPCU, INS IPCU, CCS IPCU) 15, 20, and 25 used in the form of a bus, and inter-processor communication between each subsystem processor (ASS IPCU, By implementing INS IPC, CCS IPC) (15 ', 20', 25 '), the configuration and cabling is simplified, and' CIP ', which was previously used separately for maintenance of each node, is a corresponding subsystem. The upper core processor is removed from the bus by connecting each subsystem IPC to perform its function instead. This structure is not only simpler than the existing one, but also the cabling is simplified, which eliminates malfunctions during installation. prevent.

In addition, the self-requirement is greatly reduced by eliminating the need for CI self, which has been used separately for mounting the node. Especially, the node PBA, which was a half-size circuit board, is eliminated, so all self can be unified to full size. It is possible to achieve a mutually compatible system among other block self-structures.

As described in detail above, the present invention not only significantly reduces the number of PBAs due to the integration of the node and the communication board, but also requires the connection of the correct communication board and the node to be connected with the communication board with a U-link cable. This eliminates the need for a U-link cable, simplifies cabling by connecting to bus-type IPCs, and prevents errors due to cable hernias.

Claims (1)

In an interprocessor communication control board (PCCA) and interprocessor communication (IPC) node design method for interprocessor communication in an electronic switching system, each subsystem IPC connected to a central interprocessor communication device (CIPCU) 10, respectively. A higher processor (MP) that replaces the format of (15 ', 20', 25 ') with a bus format and performs maintenance functions on each of the subsystem IPCs 15', 20 ', 25' of the bus format. And integrating a node in the interprocessor communication control board (PCCA). 2. The method of claim 1, wherein the interprocessor communication control board (PCCA) and the interprocessor communication (IPC) node are integrated in the electronic switching center.