KR0147598B1 - Method for forming wiring layer in semiconductor device - Google Patents

Abstract

A method of forming a wiring layer of a semiconductor device for improving the step coatability of a deposited metal layer and / or the investment of a contact hole is disclosed. The present invention provides a method of forming an underlayer on a semiconductor substrate, forming an insulating film having contact holes on the underlayer, forming a metal material to fill the contact holes, and flowing the metal material. After performing the step of forming a metal layer by patterning, the step is repeatedly performed again using the metal layer as a base film to form a plurality of metal layers vertically. According to the present invention, a coating failure of a metal wiring film can be solved by a flow process of aluminum or an aluminum alloy when forming a contact of a multilayer wiring structure.

Description

A wiring layer forming method of a semiconductor device having a stacked contact

1 to 3 are cross-sectional views illustrating a metal wiring layer forming method according to the prior art.

4 to 7 are cross-sectional views illustrating a method of forming a wiring layer of a semiconductor device having a stacked contact structure according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact of a semiconductor device, and more particularly, to a stacked via contact of a semiconductor device for improving step coverage of an interconnect layer or investment.

As the technology of semiconductor devices is becoming highly integrated (ULSI), the semiconductor wiring method is considered to be the most important in semiconductor device manufacturing technology because it is a factor that determines the yield, performance (eg, operating speed) and reliability of semiconductor devices. do. Due to the relatively small curvature outer surface shape such as a low aspect ratio (a ratio of depth to width) and a low depth step, application of metal step coverage in a conventional low density semiconductor device has not been a problem. However, as the degree of integration of semiconductor devices increases and the multi-layer wiring process becomes practical, the horizontal reduction of the contact hole continues, but the reduction of the thickness of the wiring metal film or the interlayer insulating film is hardly achieved compared to the horizontal reduction for the high performance of the product. The impurity region formed in the surface portion of the semiconductor substrate became much shallower. As a result, the aspect ratio is increased at the contact hole in the semiconductor device and the step is deepened. Especially in multilayer wiring processes that are widely used in products that reduce chip area and increase integration, such as logic arrays such as gate arrays, aspect ratios and deep steps tend to be more severe. Therefore, the conventional aluminum wiring process needs to be improved for high speed performance, high yield, and good reliability, which are the purpose of the standard design of semiconductor devices.

1 to 3 are cross-sectional views illustrating a metal wiring layer forming method according to the prior art.

1 is a cross-sectional view schematically showing a conventional contact structure. Specifically, a separation insulating film 3 is formed on the semiconductor substrate 1, and a gate electrode 5 and a first interlayer insulating film 7 are formed on the separation insulating film 3. First metal wiring layers 9 and 9a are buried and connected to the openings of the gate electrode 5 or formed on the first interlayer insulating film 7. In addition, second metal wiring layers 11 and 11a are buried and connected to the openings of the first metal wiring layer 9a or formed on the second interlayer insulating film 13. In addition, a third metal wiring layer 15 and a third interlayer insulating film 17 connected to the second metal wiring layer 11a are formed.

The contact structure described above is formed to form a contact on the substrate in a forceful manner, and when the aspect ratio is not extremely high, it can be formed by a conventional sputtering method. However, as the chip size decreases, a stacked contact forming method of vertically forming a contact structure has been proposed.

2 is a schematic cross-sectional view of a semiconductor device having stacked contacts. In FIG. 2, reference numerals denote the same members as those in FIG. An electrode 19, for example a gate electrode, is formed on the semiconductor substrate 1 on which the isolation insulating film 3 is formed, and serves to insulate the electrode 19, and has a first contact hole a. The insulating film 7 is formed. A barrier metal layer 21 is formed on the inner surface of the first contact hole a, the first interlayer insulating film 7, and the surface of the electrode 19, and the barrier metal layer 21 is formed on the barrier metal layer 21. 23) and cap metal layer 25 are formed.

In addition, a second interlayer insulating film 13 having a second contact hole b is formed on the cap metal layer 25 and the first interlayer insulating film 7, and the surface and the second of the cap metal layer 25 are formed. A second metal layer 27 is formed and connected to the sidewall of the interlayer insulating film 13. In addition, a third interlayer insulating film 13 having a third contact hole c is formed on the second interlayer insulating film 13, and the surface of the second metal layer 27 and the third interlayer insulating film 17 are formed. The third metal layer 29 is formed and connected to the side wall.

In the contact structure having the structure as shown in FIG. 2, the first contact hole (a), the second contact hole (b), and the third contact hole (c) are configured in the longitudinal direction (vertical), and the stacked vias It is called a contact. The laminated via contact structure is a failure of aluminum mutual contact due to the high aspect ratio of the contact hole and the poor step coverage of sputtered A1, and the reliability and yield decrease, when using the conventional sputtering method using aluminum. Increasing contact resistance due to precipitation and aluminum spiking cause problems such as deterioration of shallow bonding properties.

In order to solve the above problem, a structure for forming a selective tungsten or tungsten plug in a contact hole has been proposed.

3 is a cross-sectional view schematically showing a laminated contact structure using a tungsten plug.

Reference numerals in FIG. 3 denote the same members as those in FIG. An electrode 19, for example, a gate electrode, is formed on the semiconductor substrate 1 on which the isolation insulating film 3 is formed, and serves to insulate the electrode 19 and has a first interlayer having a first contact hole a. The insulating film 7 is formed. A barrier metal layer 21 is formed on the inner surface of the first contact hole a, the first interlayer insulating film 7, and the surface of the electrode 19, and selectively tungsten or tungsten on the barrier metal layer 21. The plug 31 is formed. In the method of forming the tungsten plug 31, tungsten is deposited on the entire surface and then etched back to form the first contact hole a. The first metal layer 23 and the cap metal layer 25 are formed on the tungsten plug 31.

In addition, a second interlayer insulating film 13 having a second contact hole b is formed on the first metal layer 23 and the first interlayer insulating film 7, and the surface and the second interlayer of the first metal layer are formed. The second metal layer 27 is formed and connected to the sidewall of the insulating film 13. In addition, a third interlayer insulating film 13 having a third contact hole c is formed on the second interlayer insulating film 13, and the surface of the second metal layer 27 and the third interlayer insulating film 17 are formed. The third metal layer 29 is formed and connected to the side wall.

The stacked via contact using the tungsten plug shown in FIG. 3 has a long process processing time and thus a process manufacturing cost.

Accordingly, an object of the present invention is to provide a method for forming a wiring layer of a semiconductor device, in which a stepped coating property of a metal layer is improved in a semiconductor device having a stacked contact, thereby improving the buried property of the opening.

In order to achieve the object of the present invention, forming an underlayer on a semiconductor substrate;

Forming an insulating film having a contact hole on the base film;

Forming a metal material to fill the contact hole; And

After the step of flowing and patterning the metal material to form a metal layer, the step is repeatedly performed again using the metal layer as an underlying layer, thereby forming a plurality of metal layers vertically. It provides a method of forming.

The metal material is preferably formed of aluminum or an aluminum alloy, for example, A1CuSi-based material, more preferably A1-1% Si-0.5% Cu or A1-0.2% Si-0.5% Cu. The flow temperature of the metal material is performed at a high temperature of 560 ℃, after which the flow temperature of the metal material is repeatedly performed at a temperature of 520 ℃ ~ 530 ℃.

The method may further include forming a barrier metal film on the insulating film, wherein the barrier metal film is formed on the surface of the lower structure exposed by the insulating film, an inner surface of the contact hole, and the opening. The barrier metal film may be formed of any one or more selected from the group consisting of transition metals, transition metal alloys and transition metal compounds, the first barrier metal film composed of transition metals, and the transition metal compound formed on the first barrier metal film or It may also be composed of a second barrier metal film composed of a transition metal alloy.

The base layer may be a lower wiring layer, and the contact hole may be a via hole for electrically connecting the upper conductive layer and the lower wiring layer, and further comprising forming a cap metal layer formed of TiN on the metal layer. It may include.

According to the present invention, a coating failure of a metal wiring film can be solved by a flow process of aluminum or an aluminum alloy when forming a contact of a multilayer wiring structure.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

4 to 7 are cross-sectional views illustrating a method of forming a wiring layer of a semiconductor device having a stacked contact structure according to the present invention.

4 shows forming the field insulating film 43, the first interlayer insulating film 45, and the electrode 47 on the semiconductor substrate 41. As shown in FIG.

Specifically, the isolation insulating film 43 is formed on the semiconductor substrate 1 by using an element isolation method such as a LOCOS method. Subsequently, the electrode 47 is formed by depositing the polysilicon or aluminum on the substrate 43 on which the isolation insulating layer 43 is formed and then patterning the same. Next, an insulating material such as an oxide is deposited on the entire surface of the substrate 41 on which the electrode 47 is formed, and then patterned to form an insulating film having a first contact hole 49 through which the electrode 47 is exposed. 45).

5 shows forming the barrier metal film 51 and the first metal film 53. Specifically, a barrier metal, for example, Ti or Ti / TiN, for preventing aluminum spikes when the first metal film 53 is formed on the entire surface of the substrate 41 on which the first contact hole 49 is formed. After the deposition, the barrier metal film 51 is formed by patterning. The barrier metal film 51 may be formed of any one or more selected from the group consisting of a transition metal, a transition metal alloy, and a transition metal compound, and formed on the first barrier metal film and the first barrier metal film. The second barrier metal film may be composed of a transition metal compound or a transition metal alloy.

Subsequently, a metal, such as aluminum or an aluminum alloy, is deposited on the entire surface of the substrate 41 on which the barrier metal film 51 is formed to a thickness of about 6000 kPa. As the aluminum alloy, for example, an AlCuSi-based alloy composed of A1-1% si-0.5% Cu is used.

In particular, the present invention after the deposition of the aluminum or aluminum alloy is moved to another chamber without exposure in the chamber is subjected to a heat treatment for 90 seconds at a high temperature of about 560 ℃. Next, the heat treated aluminum or aluminum alloy is patterned to form a first metal film 53 corresponding to the barrier metal film.

FIG. 6 shows a step of forming the first metal film 55, the second interlayer insulating film 57, the second metal film 59, and the second cap metal film 61.

Specifically, a metal, for example Ti or TiN, is deposited on the entire surface of the substrate on which the first metal film 53 and the insulating film 45 are formed, and then an insulating material, for example, an oxide film is formed to insulate the metal film. Subsequently, the formed aluminum or aluminum alloy and the oxide film are patterned to form the second cap metal film 55 and the second interlayer insulating film 57 having the second contact hole 63 formed on the first metal film 53. Form.

Subsequently, while filling the second contact hole 63, a metal, for example, aluminum or an aluminum alloy, is formed on the entire surface of the substrate 41 to a thickness of about 6000 μm, and then Ti or TiN is deposited. As the aluminum alloy, for example, an A1CuSi-based alloy composed of A1-1% si-0.5% Cu is used.

After depositing the Ti or TiN and moving to another chamber without being exposed in the chamber, the temperature is about 30 ° C. to 40 ° C. lower than the temperature of about 560 ° C. used for the flow of the first metal film 53, that is, 520 ° C. Heat treatment is performed at 530 ° C. for about 90 seconds. The reason for using a lower temperature than the flow of the first metal film 53 is that the first metal film 53 is opened to be damaged when excessive heat treatment is performed.

Next, the heat treated aluminum or aluminum alloy and Ti or TiN are patterned to form a second metal film 59 and a second cap metal film 61.

FIG. 7 shows the steps of forming the third interlayer insulating film 67, the third metal film 63, and the third cap metal film 65. As shown in FIG.

Specifically, an insulating material, for example, an oxide film is formed on the entire surface of the substrate on which the second cap metal film 61 and the first interlayer insulating film 57 are formed, and then patterned to form a third interlayer insulating film 67 having a third contact hole. ). Subsequently, a metal, such as aluminum or an aluminum alloy, is deposited on the entire surface of the substrate 41 while the third contact hole 69 is embedded, and then Ti or TiN is formed. As the aluminum alloy, for example, an A1CuSi-based alloy composed of A1-1% si-0.5% Cu is used.

Subsequently, after the process of depositing Ti or TiN, the substrate is moved to another chamber without being exposed in the chamber and heat-treated for about 90 seconds at a temperature of about 520 to 530 ° C., which is a heat treatment temperature of the second metal film. Next, the heat treated aluminum or aluminum alloy and Ti or TiN are patterned to form a third metal film 63 and a third cap metal film 65.

Although the above embodiment has been described in the case of using a three-layer metal film, even if additional metal film is formed, the above-described method can be used as it is, and the coating degree of aluminum or aluminum alloy according to the present invention can obtain 80% or more, It can be used for multilayer wiring devices such as ASIC and LOGIC.

According to the present invention, the coating failure of a metal wiring film is solved by a flow process of aluminum or aluminum alloy in forming a multilayer contact structure, and the contact due to failure of mutual contact of metal films, reliability and yield reduction, and precipitation of Si Problems such as deterioration of shallow bonding properties can be improved by increasing resistance and aluminum spiking.

As mentioned above, although this invention was concretely demonstrated as an Example, this invention is not limited to this, A deformation | transformation and improvement are possible within the range of the common knowledge of a person skilled in the art.

Claims (10)

Forming an undelayer on the semiconductor substrate; Forming an insulating film having a contact hole on the base film; Forming a metal material to fill the contact hole; And after forming the metal layer by flowing and patterning the metal material, the step is repeatedly performed again using the metal layer as an underlying film to form a plurality of metal layers vertically. Method of forming a wiring layer. The method of claim 1, wherein the metal material is formed of aluminum or an aluminum alloy. The semiconductor device of claim 1, wherein the flow temperature of the metal material is performed at a high temperature of 560 ° C., and the flow temperature of the metal material repeatedly performed thereafter is performed at a temperature of 520 ° C. to 530 ° C. 6. Wiring layer formation method. The method of forming a wiring layer of a semiconductor device according to claim 1, further comprising forming a barrier metal film on said insulating film. 4. The method of claim 3, wherein the barrier metal film is formed on a surface of the lower structure exposed by the insulating film, an inner surface of the contact hole, and the opening. The method of claim 1, wherein the base layer is a lower wiring layer, and the contact hole is a via hole for electrically connecting the upper conductive layer and the lower wiring layer. The method of forming a wiring layer of a semiconductor device according to claim 1, further comprising forming a cap metal layer on the metal layer. 7. The method of claim 6, wherein the cap metal layer is made of TiN. The method of claim 4, wherein the barrier metal film is formed of at least one selected from the group consisting of a transition metal, a transition metal alloy, and a transition metal compound. 4. The semiconductor device according to claim 3, wherein the barrier metal film comprises a first barrier metal film composed of a transition metal and a second barrier metal film composed of a transition metal compound or a transition metal alloy formed on the first barrier metal film. Wiring layer formation method.