KR0138363B1 - Voltage controlling oscillator - Google Patents

Abstract

The present invention relates to a voltage controlled oscillator capable of keeping the oscillation level low and eliminating the variation of the DC level in the PLL circuit, wherein each base terminal has a pair of first resistors and a pair of collector terminals of each other. First and second transistors connected to two resistors, each emitter terminal is commonly connected to one constant current source, and each collector terminal is connected to a reference power supply via a pair of third resistors, and first and second transistors. A voltage controlled oscillator having a pair of output terminals connected to each collector terminal of a transistor, comprising a tuning means connected between each base terminal to vary the oscillation frequencies of the first and second transistors in accordance with the control voltage.

Description

Voltage controlled oscillator

1 is a block diagram showing an image detection circuit using the PLL synchronous detection method.

2 is a detailed circuit diagram of a conventional voltage controlled oscillator in FIG.

3 is a detailed circuit diagram of a voltage controlled oscillator according to the present invention in FIG.

* Description of the symbols for the main parts of the drawings *

10 ... surface acoustic wave filter 20 ... image intermediate frequency amplifier

30 ... PLL circuit 32 ... phase detector

34 ... low pass filter 36 ... voltage controlled oscillator

40 ... 90 degree phase shifter 50 ... image detector

C3, C4 ... Variable capacitor I _E ... Current source

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase-locked loop (hereinafter referred to as a PLL) circuit, and in particular, a voltage-controlled oscillator (VCO) which can keep the oscillation level low and eliminate the variation of the DC level. It is related to).

In video equipment such as televisions or video tape records (VTRs), a reference signal, generally called a VIF carrier, that is synchronized with the VIF signal to reproduce the video signal from the Video Intermediate Frequency (VIF) signal. In case of NTSC broadcasting, 45.75MHz) signal is extracted and synchronized with VIF signal. Synchronous detection methods mainly used in the prior art include quasi-synchronous detection and PLL synchronous detection.

The former uses a limiter to reproduce an intermediate frequency carrier signal to detect an image. It is rarely used in recent years because of phase distortion caused by a limiter and accurate synchronization detection is difficult.

In other words, the PLL synchronous detection method uses PLL to generate an intermediate frequency carrier signal synchronized with a transmission carrier signal to detect an image. This method has the advantage of reproducing a stable amplitude and phase VIF carrier. This is mainly used.

FIG. 1 is a block diagram showing an image detection circuit using a PLL synchronous detection method. A VIF signal is applied to a VIF amplifier 20 through a surface acoustic wave filter (hereinafter referred to as SAW) filter 10. The output signal Wi of the amplifier 20 is applied to the PLL circuit 30 and the image detector 50.

The PLL circuit 30 is composed of a phase detector 32, a low pass filter 34 and a voltage controlled oscillator 36. The phase detector 32 has two input signals, i.e., an output signal Wi of the VIF amplifier 20. ) And a voltage corresponding to the phase difference between the output signal (Wo) of the VCO (36), and the low pass filter (34) removes the high frequency components generated by the phase detector (32) as well as the PLL circuit (30). VCO 36 has a function of determining the synchronous or response characteristics of the VCO 36, and the oscillation frequency is changed by the control voltage output from the low pass filter 34. The output signal is added to the phase detector 32. do.

In more detail, the phase detector 32 generates an error voltage corresponding to the time (phase) difference between two signals when a periodic signal having the same frequency but having a time difference (that is, a phase difference if the signal is a sine wave) is input. Since the phase difference between the two signals Wi and Wo input to the phase detector 32 is 90 degrees, the output of the phase detector 32 entering the VCO 36 becomes zero and becomes in an equilibrium state. In addition, when the frequency of the input signal Wi is changed by w at any time, the change in frequency causes a linear increase with time of the phase so that a phase difference occurs between Wo and Wi, and the phase detector 32 corresponds to the phase difference. Output voltage is generated. The output voltage of this phase detector 32 increases the frequency of the VCO 36, resulting in a new equilibrium when the frequency of the VCO 36 increases by the frequency of the input signal Wi. When the equilibrium state is reached, the input signal Wi and the output signal Wo of the VCO 36 are only 90 degrees out of phase and the same frequency. That is, when the phase difference between two signals Wi and Wo input to the phase detector 32 in the PLL circuit 30 using the phase detector 32 is 90 degrees, the PLL circuit 30 is completely locked. With the PLL circuit 30 locked, the output signal Wo of the VCO 36 is passed through the 90 degree phase shifter 40 to correct the phase to generate a reference signal necessary for detection, that is, a VIF carrier signal, to generate an image detector (50). )

Accordingly, the PLL circuit 30 obtains a VIF carrier signal having the same frequency as the output signal of the VIF amplifier 20, and shifts the phase of the VIF carrier signal by 90 degrees through the 90 degree phase shifter 40 to detect the image detector 50. The VIF signal and the VIF carrier signal are synchronized so that the synchronous detection of the video signal is performed.

2 is a detailed circuit diagram of the conventional VCO 36 in FIG.

Referring to the circuit diagram shown in FIG. 2, since the base terminals of the transistors Q1 and Q2 that form the differential amplifier are connected to the collector terminals of the counter transistors Q1 or Q2, positive feedback is applied. It forms and oscillates.

Here, the oscillation frequency f ₀ can be changed by varying the bias current I _E supplied to the differential amplifier. That is, when the bias current I _E is varied by the output voltage of the low pass filter 36, that is, the control voltage, the capacitor C1 connected between the collector terminal and the base terminal of the transistors Q1 and Q2 is connected. The capacitance changes and the oscillation frequency is changed by the following equation (1).

However, the conventional VCO 36 must increase the bias current I _{E in} order to increase the variable range of the oscillation frequency. When the bias current I _E increases, the oscillation level of the VCO 36 also increases because the amplification degree of the differential amplifier increases.

Therefore, in the case of a general intermediate frequency signal processing circuit, the size of an image intermediate frequency signal, which is an input signal, generally has a size of about 100 uV to 100 mV. Interfering with the frequency signal has a problem of reducing the signal-to-noise ratio (S / N ratio) of the video signal after image detection.

In addition, when the bias current I _E is varied to change the oscillation frequency, the DC voltages output from the collector terminals of the transistors Q1 and Q2 fluctuate as well to input the output signal of the VCO 36 as an input. There was a problem of causing distortion in the signal by changing the dynamic range of the next stage.

Accordingly, an object of the present invention is to provide a voltage controlled oscillator capable of keeping the oscillation level low and eliminating the variation of the DC voltage level.

In order to achieve the above object, in the present invention, each base terminal is connected to each other's collector terminal and a pair of second resistors through a pair of first resistors, and each emitter terminal is commonly connected to one constant current source, In a voltage controlled oscillator having each collector terminal having a pair of output terminals connected to each collector terminal of the first and second transistors connected to a reference power source through a pair of output load resistors,

And a tuning means connected between the base terminals of the first and second transistors to oscillate the first and second transistors according to a predetermined resonance frequency to generate a stable oscillation signal.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

3 is a detailed circuit diagram of the VCO 36 according to the present invention in FIG.

The configuration of the circuit diagram shown in FIG. 3 includes the resistors R _L1 and R _L2 where one terminal is connected to the reference power supply Vcc, and the collector terminal is connected to the other terminal of the resistors R _L1 and R _L2 , respectively. The emitter terminal is connected, and the transistors Q1 and Q2 are respectively connected to the current source I _E , the resistor R1 is connected between the base terminal of the transistor Q1 and the collector terminal of the transistor Q2, and the transistor Resistor R3 connected between the base terminal of Q2 and the collector terminal of transistor Q1, resistor R2 connected between the base terminal of transistor Q1 and ground, and the base terminal of transistor Q1. A resistor R4 connected between the ground and ground, a resistor R5 connected in parallel between the base terminal of the transistor Q1 and the base terminal of the transistor Q2, the inductor 12 and the capacitor C2, Variable cones connected in series between the base terminal of transistor Q1 and the base terminal of transistor Q2, respectively It made of; (C3, C4 Variable Capacitor) standing.

The output signal of the VCO is obtained from the collector terminal of the transistor Q1 and the collector terminal of the transistor Q2, and oscillation frequency control is performed at the connection point of the variable capacitors C3 and C4.

Hereinafter, the operation of the present invention will be described in detail with reference to FIG.

First, the collector voltage of transistor Q2 is divided by the resistance ratio of resistor R1 and resistor R2 and applied to the base terminal of transistor Q1, and the collector voltage of transistor Q1 is applied to resistor R3 and resistor R4. The voltage is divided by the resistance ratio of the transistor and applied to the base terminal of the transistor Q2. This connection relationship forms a positive feedback so that the differential amplifier composed of the transistors Q1 and Q2 is oscillated.

By connecting the tuning circuit composed of the capacitor C2 and the inductor L2 to the base terminal of the differential amplifier, the oscillation level can be made smaller than when connecting to the collector terminal of the conventional differential amplifier.

In addition, since the bias current I _E is always kept constant as a current source, there is no variation in the DC voltage level at the output terminal.

Here, the variable capacitors C3 and C4 change their capacity in inverse proportion to the change in the reverse voltage applied to the connection points of the variable capacitors C3 and C4.

That is, the oscillation frequency f ₀ is variable by changing the capacitance of the variable capacitors C3 and C4 as the output signal of the low pass filter 34 applied to the connection point of the variable capacitors C3 and C4, that is, the control voltage, changes. do.

As described above, in the voltage controlled oscillator according to the present invention, the oscillation level is kept low, and the S / N ratio after image detection is improved by preventing the output signal from interfering with the image intermediate frequency input signal. In addition, when the oscillation frequency is variable, there is no change in the DC bias of the output signal, which does not affect the input dynamic range of the next stage.

Claims (3)

Each base terminal is connected to each other's collector terminal and a pair of second resistors through a pair of first resistors, each emitter terminal is commonly connected to one constant current source, and each collector terminal is a pair of third resistors. In a voltage controlled oscillator having a first transistor and a second transistor connected to a reference power supply through a pair, and a pair of output terminals connected to each collector terminal of the first and second transistors, And a tuning means connected between the base terminals of the first and second transistors to oscillate the first and second transistors according to a predetermined resonance frequency to generate a stable oscillation signal. The control means according to claim 1, wherein the tuning means is connected in series with a fourth resistor connected between each of the base terminals, an inductor and a first capacitor connected in parallel with the fourth resistor, respectively, and the control voltage is connected to a connection point. And a second and a third capacitor applied and connected in parallel to the fourth resistor. 2. The voltage controlled oscillator according to claim 1, wherein the tuning means further comprises a variable capacitor having a variable capacitance according to a control voltage to vary the oscillation frequency according to the control voltage.