KR0123769B1 - Picture in picture display circuit of image only in 16:9 - Google Patents

Abstract

There is provided a display circuit of dual images on a 16:9 sized screen without distortion regardless of difference between an input video signal size ratio and the screen size ratio. The display circuit includes: an analog/digital converter for converting an analog video signal into a digital video signal; a vertical low pass filter for shutting off a vertical frequency interference of the digital video signal; a video memory for storing the compressed digital video signal; a vertical compression control part(20) connected to the write enable terminal of the video memory, for selecting one vertical scan line per N vertical scan lines of the second video signal output from the vertical low pass filter; and an oscillator(30) connected to the write clock terminal of the video memory, for rapidly performing the write clock of the video memory to compress a horizontal data of the selected scan line.

Description

Picture-in-picture display circuit on the 16: 9 screen

1 is a clock diagram illustrating a general picture-in-picture display circuit.

2A, 2B, and 3C show a compressed state of the picture-in-picture according to FIG.

3A and 3B are views showing states displayed according to a 16: 9 screen display method.

4 is a block diagram showing an embodiment of a picture-in-picture display circuit in a 16: 9 screen according to the present invention.

5 is a timing diagram showing an operating state of FIG.

* Explanation of symbols for main parts of the drawings

10: vertical low pass filter 20: vertical compression control unit

21: counter 22, 23: inverter

24, 25: AND gate 30: oscillator

40: picture memory

The present invention relates to a display device having a picture in picture function (hereinafter referred to as PIP) on a 16: 9 screen, and more particularly, an aspect ratio of an input video signal and a display device are different from each other. When the size of the PIP does not change and there is no distortion relates to the PIP display circuit on the 16: 9 screen.

PIP refers to a technique of compressing a second screen and displaying a second screen on a part of the original screen to show another second screen on one television screen. Reduces 1 / N in the vertical direction (scanning line) and 1 / N in the horizontal direction again to display a small screen on one part of the TV with the original screen reduced to 1 / (N * N). will be.

Fig. 1 is a block diagram showing such a conventional PIP display circuit, and Figs. 2 (a), 2 (b), and (c) are diagrams showing the compressed state of the picture-in-picture according to Fig. 1, respectively. The control unit 600, which is composed of the converter 100, the vertical low pass filter 200, the vertical compression unit 300, the image memory 400, and the digital / analog converter 500, provides a control signal and a clock. Connected to wealth.

The second screen signal is a signal having the same format as the first screen signal at the time of initial input, that is, having 62.5 ㎲ horizontal and 262.5 vertical scanning lines (in case of NTSC) on one screen. The second screen signal is input to the analog / digital converter 100 and converted into a digital signal.

In addition, the vertical compression is a kind of vertical sampling in which one vertical scan line is selected every N, so that the output of the analog / digital converter 100 uses the vertical low pass filter 200 to prevent vertical frequency aliasing. Via the vertical compression unit 300 is applied.

The vertical compression unit 300 selects one scan player for every N scans in order to prevent vertical frequency interference as a vertical sampling of the second screen as shown in FIG. After 1 / N compression is performed as described above, it is output to the image memory 400 and stored.

At this time, if two scan lines are read out in the form of line 1, line 4, and line 7, the vertical scan line is 1/3 vertically compressed.

Then, the vertically compressed video signal is stored in the image memory 400, and when the PIP screen is to be displayed on the first screen signal, the data stored in the image memory 400 is read and synthesized with the first screen video signal. Display on a television screen.

Therefore, in order to display the PIP on the screen, it is necessary to read data stored in the image memory 400. If the reading speed is N times faster than the speed of storing data in the image memory 400, FIG. As in c), 1 / N compression is done horizontally and 3 times faster is 1/3 compression horizontally.

The compressed data read from the image memory 400 is output to the digital / analog converter 500, converted into an analog signal, and then applied to the synthesis and signal processing unit 700 to be combined with the first screen signal to be combined with the television screen. Will be displayed.

On the other hand, since the aspect ratio of the video signal according to the current broadcast system is 4: 3 (horizontal: vertical), the display device is also 4: 3. Therefore, there are two main ways to display such a signal on a 16: 9 display device (also called a wide vision).

First, black bands are formed in a space other than the aspect ratio 4: 3 by the side panel method as shown in the third (a), and are displayed without damaging the original image.

This means that when the 16: 9 display device sees the height of the 4: 3 display device as 1, the width is longer by 4 / times, so when the normal video signal is displayed, the image is spread by 3/4 times horizontally. In order to achieve this, you must compress and display 3/4 in advance.

In this case, since the horizontally becomes long when the PIP image is inserted, the video signal of the PIP may also be horizontally compressed by 3/4 times and displayed in combination with the first screen signal. At this time, in order to compress by 3/4 times horizontally, the read speed of the image memory may be increased by 4/3.

Secondly, in the letter box method as shown in FIG. 2 (b), the upper and lower images (scan lines) of the original image are removed to artificially adjust the aspect ratio of 16: 9.

In other words, the video signal is input as it is, and only the overscanning is performed to prevent the up and down video signals from being scanned during CRT deflection. At this time, the injection player is reduced to the original three quarters to increase the interval between injection lines.

At this time, if the PIP signal without any processing is synthesized and displayed on the first screen video signal, a normal screen having a constant horizontal and vertical ratio is obtained, but the horizontal and vertical sizes of the PIP are increased by 4/3. It will be larger than size.

The present invention is to solve the problem that the PIP image is larger or distorted than the desired size in the letter box method, the object of the present invention is to change the size of the PIP in the letter box method 3/4, A picture-in-picture display circuit for displaying a PIP by vertically reducing 3/4 is displayed.

A feature of this invention for achieving this object is the vertical frequency interference of an analog / digital converter for converting a second screen signal into a digital signal and a digitally converted second screen signal connected to an output shaft of the analog / digital converter. A picture-in-picture display circuit comprising a vertical low pass filter which prevents a signal and an image memory connected to an output side of the low pass filter and storing a vertically compressed second screen signal, the picture-in picture display circuit being connected to a write enable end of the image memory. And a vertical compression control unit configured to select one vertical scan line for every N vertical scan lines of the second screen signal that has passed through the vertical low pass filter according to the aspect ratio, and store the selected vertical scan line in the image memory. The image memory of the picture memory to compress the horizontal data of the selected scanning line. Comprising the oscillator for performing the fast clock 16: 9 aspect picture to the picture in the display circuit.

Hereinafter, an embodiment of a PIP display circuit in a 16: 9 screen according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a block diagram showing an embodiment of a PIP display circuit in a 16: 9 screen according to the present invention, and a vertical low pass filter 10 for preventing vertical frequency interference and a vertical compression control unit 20 for controlling vertical compression. Is connected to the image memory 49.

The vertical compression control unit 20 is connected to a counter 21 repeatedly counting 00, 01, 10, and 11, and output terminals QA and QB of the counter 21, respectively. The inverters 22 and 23 for inverting the output, an AND gate 24 connected to the output terminals of the inverters 22 and 23 and performing an AND operation to output to the image memory 40, and the counter 21 The AND gate 25 is connected to the output terminals QA and QB, respectively, and performs an AND to feed back to the clear terminal CLEAR of the counter 21.

On the other hand, an oscillator 30 that provides a clock is connected to the counter 21 and the image memory 40 of the vertical compression controller 20 to provide a clock. At this time, the oscillator 30 increases the write clock frequency of the image memory 40 so as to perform the write clock quickly for horizontal compression.

FIG. 5 is a timing diagram showing the operating state of FIG. 4, wherein FIG. 5A is a clock output from the oscillator 30 to the image memory 40, and FIG. 5B is the vertical compression. The waveform is output from the control unit 30 to the image memory 40.

The present invention configured as described above shows a case of selecting one vertical scanning line every four.

In other words, in order to prevent vertical frequency interference, the N-bit data of the second screen image signal passed through the vertical low pass filter 10 is transferred by the vertical compression control unit 30 to 1, 5, 9... After the scan lines are selected, they are stored in the image memory 40 to be vertically compressed 3/4.

When reading data from the image memory 40, if the read clock is 4/3 times faster than the write clock, the PIP screen which is 3/4 compressed even horizontally can be obtained.

Here, the counter 21 of the vertical compression controller 20 receives a clock (same as a horizontal sync signal) as shown in FIG. 5A from the oscillator 30 and outputs QA and QB according to the clock. Outputs 00,01,10,11

At this time, if 11 is outputted from the output terminals QA and QB of the counter 21, the output of the AND gate 25 is also 1, and the counter 21 is cleared and repeats 00, 01, 10, 11 again. To count.

The signals output from the output terminals QA and QB of the counter 21 are inverted by the inverters 22 and 23, respectively, and then output to the two input terminals of the AND gate 24.

At this time, since the output terminal of the AND gate 24 is connected to the write enable terminal of the image memory 40, when the output of the counter 21 is 00 as shown in FIG. 5B, the AND gate 24 is output. ) Outputs 1, and the image memory 40 receives data.

Then, from the moment when the output of the counter 21 becomes 01, the output of the AND gate 24 becomes 0 in the second, third, and fourth syringe intervals (01, 10, 11) to the image memory 40. The data will not be written.

Therefore, the counter 21 repeats this operation so that the scanning signals stored in the image memory 40 are 1, 5, 9... The 261th scan line is input and 3/4 compression is performed vertically.

As described above, when the image signal of the second screen passing through the vertical low pass filter is stored in the image memory, the vertical compression control unit selects and stores one vertical scan line every four, so as to store the image signal of the second screen. When compression is performed and data is read from the image memory, the read box provides a read clock that is 4/3 times faster than the write clock of the image memory so that 3/4 compression is performed horizontally, thereby displaying a PIP signal on a 16: 9 screen. In this method, it is possible to express PIP without distortion and size change.

Claims (2)

An analog / digital converter for converting a second screen signal input from the outside into a digital signal, and a vertical low pass filter connected to an output shaft of the analog / digital converter to prevent vertical frequency interference of the digitally converted second screen signal. And a picture memory comprising an image memory connected to an output side of the low pass filter to store a vertically compressed second screen signal, wherein the vertical low pass is connected to a write enable end of the picture memory according to an aspect ratio. A vertical compression control unit 20 for selecting one vertical scanning line for each of the N vertical scanning lines of the second screen signal passing through the filter and storing the selected vertical scanning lines in the image memory; Oscillation to speed up the write clock of the picture memory to compress horizontal data Consisting of 30 16: 9 screen, picture-in-picture in the display circuit. The vertical compression control unit (20) according to claim 1, wherein the vertical compression control unit (20) receives a clock from an oscillator (21) for repeatedly counting 00,01,10,11, and the output terminals (QA, QB) of the count (21). Inverters 22 and 23 connected to the counter 21 and inverting the output of the counter 21, and connected to the output terminals of the inverters 22 and 23, perform logical multiplication to write in to the write enable end of the image memory. An AND gate 24 providing an enable signal, and an AND gate 25 connected to the output terminals QA and QB of the counter 21 and performing a logical multiplication to feed back to the counter 21 and a clear stage. The picture-in-picture display circuit on the 16: 9 screen.