KR0119650B1 - Heat sing of thin type semiconductor package - Google Patents
Heat sing of thin type semiconductor packageInfo
- Publication number
- KR0119650B1 KR0119650B1 KR1019940003494A KR19940003494A KR0119650B1 KR 0119650 B1 KR0119650 B1 KR 0119650B1 KR 1019940003494 A KR1019940003494 A KR 1019940003494A KR 19940003494 A KR19940003494 A KR 19940003494A KR 0119650 B1 KR0119650 B1 KR 0119650B1
- Authority
- KR
- South Korea
- Prior art keywords
- heat sink
- semiconductor chip
- semiconductor package
- heat dissipation
- outside
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
제1도는 본 발명에 따른 박형 반도체 패키지의 구조를 나타낸 단면도.1 is a cross-sectional view showing the structure of a thin semiconductor package according to the present invention.
제2도 내지 제4도는 본 발명에 따른 방열판의 여러 실시예를 나타낸 단면도.2 to 4 are cross-sectional views showing various embodiments of the heat sink according to the present invention.
제5도와 제6도는 종래의 방열판을 나타낸 단면도.5 and 6 are cross-sectional views showing a conventional heat sink.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 방열판 2 : 몸체1: heat sink 2: body
3 : 안치부 4 : 요흠3: Settlement 4: Yo-Hum
5 : 돌기 6 : 돌출부5: protrusion 6: protrusion
7 :반도체칩7: semiconductor chip
본 발명은 박형 반도체 패키지의 방열판구조에 관한 것으로서, 특히 반도체 패키지에 내장되어 방열성을 높이는 방열판의 안치부를 확장시켜 반도칩(chip)의 실장(實裝 : 단위체적속에 안치(조립)되는 부품의 밀도) 체적면적을 넓게하여 크기가 다른 반도체칩을 다양하게 실장시킬 수 있게함은 물론, 몰딩 점착력을 높인 박형 반도체 패키지의 방열판 구조에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heat sink structure of a thin semiconductor package. In particular, the density of a component placed in a unit volume of a semiconductor chip by extending the settled portion of a heat sink, which is embedded in the semiconductor package and improves heat dissipation. The present invention relates to a heat dissipation structure of a thin semiconductor package, in which a large volume area can be used to variously mount semiconductor chips having different sizes, as well as high molding adhesive strength.
일반적으로 반도체 패키지에 내장된 방열판은 반도체칩의 회로동작시 발생하는 열을 외부로 효율적으로 방출하기 위한 목적으로 전기전도성과 열방출이 우수한 재질을 반도체칩의 저면에 부착하는 것으로, 종래의 방열판은 반도체 패키지에 내장될 때 봉지재와의 접착력 향상을 위하여 제5도와 제6도에 도시된 바와같이 이 방열판의 측면을 적절한 형상으로 가공하여 봉지재와 점착력을 향상시키도록 되어 있었다.In general, a heat sink embedded in a semiconductor package attaches a material having excellent electrical conductivity and heat dissipation to the bottom of the semiconductor chip for the purpose of efficiently dissipating heat generated during circuit operation of the semiconductor chip to the outside. In order to improve adhesion to the encapsulant when embedded in the semiconductor package, the side surface of the heat sink was processed to an appropriate shape as shown in FIGS. 5 and 6 to improve the encapsulant and the adhesive force.
즉, 종래의 반도체 패키지에 내장되는 방열판(21)의 구조는 상면에 안치부(23)를 가진몸체(22)의 외측면 중앙부분에 돌기(24)를 형성하여서 된 것으로, 이러한 방열판(21)의 안치부(23)에 반도체칩을 실장시켜 봉지재로 몰딩하는 것이다.That is, the structure of the heat dissipation plate 21 embedded in the conventional semiconductor package is formed by forming the protrusions 24 on the central portion of the outer surface of the body 22 having the settled portion 23 on the upper surface thereof. The semiconductor chip is mounted on the settling portion 23 of the mold 23 and molded into an encapsulant.
그러나, 이와같은 방열판(21)은 봉지재와의 점착력을 향상시키기 위하여 몸체(22)의 외측면 중앙부분에 돌기(24)를 형성하였으나, 이러한 돌기(24)는 반도체 패키지의 두께가 큰 것에 조립되는 방열판(21)은 상기 한 돌기(24)의 형성이 용이하나, 두께가 얇은 반도체 패키지에 있어서는 몸체(22)의 외측면에 돌기(24)를 형성하기가 매우 어려웠다.However, the heat dissipation plate 21 has a protrusion 24 formed at the center of the outer surface of the body 22 in order to improve adhesive force with the encapsulant, but the protrusion 24 is assembled to a large thickness of the semiconductor package. The heat dissipation plate 21 is easy to form the protrusions 24, but in the thin semiconductor package, it is very difficult to form the protrusions 24 on the outer surface of the body 22.
또한, 제5도와 같은 방열판(21)은 몸체(22)의 상면에 형성된 안치부(23)의 실장면적(l1)이 방열판(21)의 전체길이(l)에서 몸체(22)의 외측면에 형성된 길이(l1)가 좁아지게 되고, 이로 인하여 안치부(23)의 반도체칩의 실장범위가 길이(l1)만큼 좁아짐으로 이에 실장되는 다양한 크기의 반도체칩의 실장상태가 체적이 작은 반도체칩만 실장시켜 조립하게 되어 다양한 크기의 반도체 패키지의 제조에 많은 제약이 따랐던 것이다.In addition, the heat dissipation plate 21 as shown in FIG. 5 has a mounting area l 1 of the mounting portion 23 formed on the upper surface of the body 22 at the entire length l of the heat dissipation plate 21 at the outer surface of the body 22. Since the length (l 1 ) formed in the narrower portion, the mounting range of the semiconductor chip of the settlement portion 23 is narrowed by the length (l 1 ), so that the semiconductor chip of various sizes mounted thereon is small in volume. Since only the chip is mounted and assembled, many constraints have been placed on the manufacture of semiconductor packages of various sizes.
따라서, 이를 보완하고자 방열판(21)의 실장면적을 최대화하기 위하여 몸체(22)를 넓히도록 하였으나 소정크기로 규격화 되어 제조되는 반도체 패키지의 몰딩 작업시 방여판(21)의 크기가 크므로 인하여 몰딩시의 점착부위가 협소되어 점착력을 충분히 유지하는 데에는 많은 무리가 따라 제품의 품질저하 및 신뢰성 유지에 많은 문제점이 있었던 것이다.Therefore, in order to compensate for this, the body 22 is widened to maximize the mounting area of the heat sink 21, but the molding plate is large due to the large size of the barrier plate 21 during molding of a semiconductor package manufactured to a predetermined size. Since the adhesive part of the narrow narrow enough to maintain the adhesive force was a lot of problems in maintaining the quality degradation and reliability of the product.
본 발명은 상기와 같은 종래의 문제점을 해결하기 위하여 발명된 것으로서, 방열판의 몸체 상부를 확장시켜 안치부를 형성하고, 상기 안치부에 실장되는 반도체 칩의 실장범위를 최대화 하며, 안치부 저부면에 요흠 또는 돌기를 형성시켜 몰딩 점착력을 높이고, 몸체와 안치부의 접선 모서리부에 만곡 돌출부를 형성하여 몰링 점착력 향상 및 방열판을 견고하게 한 것을 목적으로 한다.The present invention has been invented to solve the above-mentioned conventional problems, the upper part of the body of the heat sink to form a settled portion, maximizing the mounting range of the semiconductor chip mounted on the settled portion, the bottom surface of the settled portion Or to form a projection to increase the molding adhesive force, and to form a curved protrusion on the tangential edge of the body and the settled object to improve the molding adhesive strength and to heat the heat sink.
이하, 첨부된 도면에 의하여 본 발명을 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
제1도는 본 발명에 따른 박형 반도체 패키지의 구조를 나타낸 단면도로서, 전자회로가 집적되어 있는 반도체칩(7)과, 상기 반도체칩(7)의 신호를 외부로 전달하는 리드(8)와, 상기의 리드(8)와 반도체칩(7)의 신호를 전기적으로 연결해주는 와이어(10)와, 상기 반도체칩(7)의 회로동작시 발생되는 열을 외부로 방출하도록 반도체칩(7)의 저면에 부착된 방열판(1)과, 상기 반도체칩(7)과 그 외의 구성부품들을 외부로부터 보호하기 위하여 몰딩된 봉지재(11)로 이루어진 반도체 패키지에 있어서, 상기한 방열판(1)의 몸체(2) 저면은 붕지재(11)의 외부로 노출되고, 상기 방열판(1)의 몸체(2) 상부는 외측으로 확장시켜 몸체(2) 보다 넓은 표면적의 안치부(3)를 형성하여 반도체칩(7)이 실장될 수 있는 범위를 최대화 한 것이다.1 is a cross-sectional view showing the structure of a thin semiconductor package according to the present invention, a semiconductor chip 7 in which an electronic circuit is integrated, a lead 8 for transmitting a signal of the semiconductor chip 7 to the outside, and A wire 10 electrically connecting the leads 8 of the semiconductor chip 7 and a signal of the semiconductor chip 7 to the outside of the semiconductor chip 7 to dissipate heat generated during a circuit operation of the semiconductor chip 7 to the outside. In the semiconductor package consisting of a heat sink (1) attached, and an encapsulant (11) molded to protect the semiconductor chip (7) and other components from the outside, the body (2) of the heat sink (1) The bottom surface is exposed to the outside of the brazing material 11, the upper portion of the body (2) of the heat sink (1) is extended outward to form a settled portion (3) having a larger surface area than the body (2) semiconductor chip (7) This is to maximize the range that can be implemented.
상기에 있어서, 방열판(1)의 안치부(2) 상면 중앙에 반도체칩(7)을 부착하여 실장하고, 이 반도체칩(7)의 외측으로 위치하도록 방열판(1)의 안치부(3) 상면 외측에 리드(8)를 접착테이프(9)로 접착하는 것이다.In the above, the semiconductor chip 7 is attached to the center of the upper surface of the settled portion 2 of the heat sink 1, and the upper surface of the settled portion 3 of the heat sink 1 is positioned so as to be located outside the semiconductor chip 7. The lead 8 is bonded to the outside with an adhesive tape 9.
제2도 내지 제4도는 본 발명에 따른 방열판의 여러 실시예를 나타낸 단면도로서, 제2도는 상기한 방열판(1)의 안치부(3) 저부면에 요흠(4)을 형성한 것으로, 이러한 요흠(4)은 제2도의 (ａ)와 같이 삼각형 형상으로 형성하거나, 또는 제2도의 (ｂ)와 같이 상부로 1단계의 홈을 형성하고, 이 1단계의 홈 중앙 상부로 2단계의 홈을 형성할 수 있다.2 to 4 are cross-sectional views showing various embodiments of the heat sink according to the present invention, and FIG. 2 is a recess 4 formed on the bottom surface of the settle portion 3 of the heat sink 1. (4) is formed in a triangular shape as shown in (a) of FIG. 2, or one step groove is formed upward as shown in (b) of FIG. Can be formed.
제3도는 상기한 방열판(1)의 몸체(2)와 안치부(3)가 접선되는 모서리부에 돌출부 및 만곡 돌출부(6)를 형성한 것이고, 제4도는 상기한 방열판(1)의 안치부(3) 외측단 끝부분에 하향으로 돌기(5)를 형성한 것으로, 이러한 요홈(4) 및 돌출부(6) 또는 돌기(5)는 봉지재(11)와의 몰딩 점착력을 향상시키기 위한 것이다.FIG. 3 shows protrusions and curved protrusions 6 formed at corners where the body 2 and the settling portion 3 of the heat sink 1 tangentially contact each other, and FIG. 4 shows the settled portion of the heat sink 1 described above. (3) The protrusion 5 is formed downward at the outer end, and the recess 4 and the protrusion 6 or the protrusion 5 are for improving the molding adhesive force with the encapsulant 11.
이와 같이 구성된 본 발명의 작용효과를 설명하면, 몸체(2)의 상부가 확장되어형상으로된 방열판(1)의 안치부(2)에 크기가 다양한 반도체칩(7)을 부착하여 실장하고, 상기 안치부(3)의 상면 외측으로는 리드(8)를 접착테이프(9)로 접착시켜 봉지개(11)로 몰딩시킨다.Referring to the effect of the present invention configured as described above, the upper portion of the body (2) is expanded The semiconductor chip 7 having various sizes is attached to the settled portion 2 of the heat sink 1 having a shape, and the lead 8 is attached to the outside of the upper surface of the settled portion 3 with the adhesive tape 9. Adhesion is molded into the sealer 11.
이와같이 방열판(1)의 안치부(3)에 안치되는 반도체칩(7)은 안치부(3)가 확장되어 실장면적이 넓어지므로 실장체면적에 안치되는 크기가 반도체칩(7)을 도시된 도면 제1도의 안치부(3)의 상면 외측으로 접착된 리드(8)의 내측상에 넓혀진 유효면적(Ｓ)에 실장할 수 있다.In this way, the semiconductor chip 7 placed in the settling portion 3 of the heat sink 1 has the size of the semiconductor chip 7 settled in the mounting area since the settling portion 3 is extended to widen the mounting area. It can be mounted in the effective area S extended on the inner side of the lid 8 bonded to the outer side of the upper surface of the settled part 3 of FIG.
이러한 방열판(1)은 전체길이(1)에서 반도체칩(7)이 실장되는 안치부(3)가 확장되도록 박판의 몸체(2) 상부의 길이를 유효시키고, 안치부(3)의 상면 외측에 접착되는 리드(8) 내측의 길이(l1)를 실장유효면적으로 형성하도록 몸체(2) 하부를 좁게 형성하여서 된 길이(l2)에 의하여 소정크기로 규격화된 반도체 패키지의 일정 크기내에 설치되는 방열판(1)의 유효면적을 크게 확장 시키지 않은 상태에서 반드시 패키지를 제조할 수 있게 한다.The heat sink 1 is effective in the length of the upper body (2) of the thin plate so that the mounting portion (3) on which the semiconductor chip 7 is mounted on the entire length (1), the outside of the upper surface of the mounting portion (3) It is installed within a predetermined size of a semiconductor package sized to a predetermined size by a length l 2 formed by narrowly forming a lower portion of the body 2 so as to form a length l 1 of the inside of the lead 8 to be bonded to an effective area. It is possible to manufacture a package without a significant expansion of the effective area of the heat sink (1).
상기한 방열판(1)은 몸체(2) 상부의 안치부(3) 하부면에 각각 요흠(4) 또는 하향으로 형성되는 돌기(5)를 형성함으로서 봉지재(11)의 몰딩 점착력을 향상시키고, 몸체(2)와 안치부(3)의 접선부의 모서리에 만곡 돌출부(6)를 형성하여 봉지재의 점착력을 증가시키면서 얇은 박판으로 된 방열판(1)의 몸체(2)와 안치부(3)의 견고성을 높여 변형을 방지하였다.The heat sink 1 is to improve the molding adhesive strength of the encapsulant 11 by forming projections (5) formed in the recess (4) or downwards on the lower surface of the settled portion 3 of the upper body (2), respectively, Tightness of the body 2 and the settling portion 3 of the thin heat dissipating plate 1 is formed by increasing the adhesive force of the encapsulant by forming a curved protrusion 6 at the corner of the tangent of the body 2 and the settling portion 3. To prevent deformation.
따라서, 소정규격품으로 설정되는 박판형 반도체 패키지의 제조시에 상기한 방열판(1)을 설치하고, 이 방열판(1)의 안치부(3)에 형성된 실장유효면적(Ｓ)에 다양한 크기의 반도체칩(7)을 실장시켜 제조할 수 있게한 것이다.Therefore, the above-described heat sink 1 is provided at the time of manufacture of the thin plate-shaped semiconductor package set to a predetermined standard product, and semiconductor chips of various sizes are provided in the mounting effective area S formed in the settled portion 3 of the heat sink 1. 7) can be manufactured by mounting.
상술한 바와같이 본 발명은 몸체 상부를 확장시킨 방열판에 요홈과 돌기 및 돌출부를 형성하여 다양한 크기의 반도체칩을 안치부에 실장시키고 봉지재로 몰딩시켜 소정규격품으로 설정되어 제조되는 반도체 패키지를 제조하므로서 제품의 다양성을 괴하고 품질과 신뢰성을 높이도록 한 발명인 것이다.As described above, the present invention forms grooves, protrusions, and protrusions on the heat spreader extending the upper part of the body to mount semiconductor chips of various sizes in the settled part and to mold the encapsulant, thereby manufacturing a semiconductor package that is set to a predetermined standard product. It's an invention that breaks down the variety of products and improves quality and reliability.
Claims (6)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940003494A KR0119650B1 (en) | 1994-02-25 | 1994-02-25 | Heat sing of thin type semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019940003494A KR0119650B1 (en) | 1994-02-25 | 1994-02-25 | Heat sing of thin type semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950026325A KR950026325A (en) | 1995-09-18 |
| KR0119650B1 true KR0119650B1 (en) | 1997-10-23 |
Family
ID=19377808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019940003494A KR0119650B1 (en) | 1994-02-25 | 1994-02-25 | Heat sing of thin type semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0119650B1 (en) |
-
1994
- 1994-02-25 KR KR1019940003494A patent/KR0119650B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR950026325A (en) | 1995-09-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6246111B1 (en) | Universal lead frame type of quad flat non-lead package of semiconductor | |
| US4774635A (en) | Semiconductor package with high density I/O lead connection | |
| US5172214A (en) | Leadless semiconductor device and method for making the same | |
| US6723582B2 (en) | Method of making a semiconductor package having exposed metal strap | |
| US6246115B1 (en) | Semiconductor package having a heat sink with an exposed surface | |
| US5581118A (en) | Electronic surface mount device | |
| US6262479B1 (en) | Semiconductor packaging structure | |
| US6271581B2 (en) | Semiconductor package structure having universal lead frame and heat sink | |
| TW447096B (en) | Semiconductor packaging with exposed die | |
| KR19980032479A (en) | Surface installation TO-220 package and its manufacturing process | |
| US20030038347A1 (en) | Stackable-type semiconductor package | |
| US20060237826A1 (en) | Leadframe designs for plastic overmold packages | |
| US20050104201A1 (en) | Heat spreader and semiconductor device package having the same | |
| KR0119650B1 (en) | Heat sing of thin type semiconductor package | |
| KR100379089B1 (en) | leadframe and semiconductor package using it | |
| KR950003907B1 (en) | Lead frame | |
| KR100244721B1 (en) | Semiconductor package | |
| KR0156515B1 (en) | Semiconductor package | |
| KR19990086280A (en) | Semiconductor package | |
| US9917040B1 (en) | Stress relieved thermal base for integrated circuit packaging | |
| KR970006162Y1 (en) | Heat sink of semiconductor package | |
| KR200154509Y1 (en) | Thermal type semiconductor package | |
| KR0124827Y1 (en) | Surface mounted semiconductor package | |
| KR0185571B1 (en) | Leadframe and semiconductor chip package | |
| KR100537893B1 (en) | Leadframe and multichip package using the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E902 | Notification of reason for refusal | ||
| E701 | Decision to grant or registration of patent right | ||
| GRNT | Written decision to grant | ||
| FPAY | Annual fee payment |
Payment date: 20110805 Year of fee payment: 15 |
|
| FPAY | Annual fee payment |
Payment date: 20120801 Year of fee payment: 16 |
|
| LAPS | Lapse due to unpaid annual fee |