JPWO2024185131A1 - - Google Patents
Info
- Publication number
- JPWO2024185131A1 JPWO2024185131A1 JP2025505034A JP2025505034A JPWO2024185131A1 JP WO2024185131 A1 JPWO2024185131 A1 JP WO2024185131A1 JP 2025505034 A JP2025505034 A JP 2025505034A JP 2025505034 A JP2025505034 A JP 2025505034A JP WO2024185131 A1 JPWO2024185131 A1 JP WO2024185131A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/383—Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
- G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D80/00—Assemblies of multiple devices comprising at least one device covered by this subclass
- H10D80/20—Assemblies of multiple devices comprising at least one device covered by this subclass the at least one device being covered by groups H10D1/00 - H10D48/00, e.g. assemblies comprising capacitors, power FETs or Schottky diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/85—Superconducting active materials
- H10N60/855—Ceramic superconductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/293—Configurations of stacked chips characterised by non-galvanic coupling between the chips, e.g. capacitive coupling
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Evolutionary Computation (AREA)
- General Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Data Mining & Analysis (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- Computational Mathematics (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2023/009066 WO2024185131A1 (ja) | 2023-03-09 | 2023-03-09 | 量子デバイス及び量子デバイスの製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2024185131A1 true JPWO2024185131A1 (https=) | 2024-09-12 |
| JPWO2024185131A5 JPWO2024185131A5 (https=) | 2025-11-25 |
Family
ID=92674556
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2025505034A Pending JPWO2024185131A1 (https=) | 2023-03-09 | 2023-03-09 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20260006862A1 (https=) |
| EP (1) | EP4680002A4 (https=) |
| JP (1) | JPWO2024185131A1 (https=) |
| WO (1) | WO2024185131A1 (https=) |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA2667640C (en) * | 2006-12-01 | 2016-10-04 | D-Wave Systems, Inc. | Superconducting shielding for use with an intergrated circuit for quantum computing |
| US10068181B1 (en) | 2015-04-27 | 2018-09-04 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafer and methods for making the same |
| JP6974470B2 (ja) | 2016-09-14 | 2021-12-01 | グーグル エルエルシーGoogle LLC | ローカル真空キャビティーを使用して量子デバイスの中の散逸および周波数ノイズを低減させること |
| CN110431568B (zh) * | 2017-03-13 | 2024-03-08 | 谷歌有限责任公司 | 在堆叠的量子计算装置中的集成电路元件 |
| WO2019132963A1 (en) * | 2017-12-29 | 2019-07-04 | Intel Corporation | Quantum computing assemblies |
| GB201813188D0 (en) | 2018-08-13 | 2018-09-26 | Univ Oxford Innovation Ltd | Superconducting quantum computing circuit package |
| WO2020168097A1 (en) * | 2019-02-15 | 2020-08-20 | D-Wave Systems Inc. | Kinetic inductance for couplers and compact qubits |
| US10840428B2 (en) * | 2019-03-07 | 2020-11-17 | International Business Machines Corporation | Scalable quantum devices with vertical coaxial resonators |
| US12033981B2 (en) | 2020-12-16 | 2024-07-09 | International Business Machines Corporation | Create a protected layer for interconnects and devices in a packaged quantum structure |
-
2023
- 2023-03-09 JP JP2025505034A patent/JPWO2024185131A1/ja active Pending
- 2023-03-09 WO PCT/JP2023/009066 patent/WO2024185131A1/ja not_active Ceased
- 2023-03-09 EP EP23926341.1A patent/EP4680002A4/en active Pending
-
2025
- 2025-09-04 US US19/318,718 patent/US20260006862A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US20260006862A1 (en) | 2026-01-01 |
| EP4680002A4 (en) | 2026-04-08 |
| WO2024185131A1 (ja) | 2024-09-12 |
| EP4680002A1 (en) | 2026-01-14 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20251001 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20251001 |