JPWO2024029067A1 - - Google Patents
Info
- Publication number
- JPWO2024029067A1 JPWO2024029067A1 JP2024538786A JP2024538786A JPWO2024029067A1 JP WO2024029067 A1 JPWO2024029067 A1 JP WO2024029067A1 JP 2024538786 A JP2024538786 A JP 2024538786A JP 2024538786 A JP2024538786 A JP 2024538786A JP WO2024029067 A1 JPWO2024029067 A1 JP WO2024029067A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/418—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/030078 WO2024029067A1 (ja) | 2022-08-05 | 2022-08-05 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2024029067A1 true JPWO2024029067A1 (https=) | 2024-02-08 |
| JPWO2024029067A5 JPWO2024029067A5 (https=) | 2025-04-16 |
Family
ID=89848743
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024538786A Pending JPWO2024029067A1 (https=) | 2022-08-05 | 2022-08-05 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20250157532A1 (https=) |
| JP (1) | JPWO2024029067A1 (https=) |
| WO (1) | WO2024029067A1 (https=) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4802257B2 (ja) * | 2009-03-16 | 2011-10-26 | 株式会社東芝 | 半導体記憶装置 |
| JP5878837B2 (ja) * | 2012-07-06 | 2016-03-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2022
- 2022-08-05 WO PCT/JP2022/030078 patent/WO2024029067A1/ja not_active Ceased
- 2022-08-05 JP JP2024538786A patent/JPWO2024029067A1/ja active Pending
-
2025
- 2025-01-15 US US19/022,682 patent/US20250157532A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US20250157532A1 (en) | 2025-05-15 |
| WO2024029067A1 (ja) | 2024-02-08 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20250121 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20250731 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20260414 |