JPWO2023190244A5 - - Google Patents
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- JPWO2023190244A5 JPWO2023190244A5 JP2023550661A JP2023550661A JPWO2023190244A5 JP WO2023190244 A5 JPWO2023190244 A5 JP WO2023190244A5 JP 2023550661 A JP2023550661 A JP 2023550661A JP 2023550661 A JP2023550661 A JP 2023550661A JP WO2023190244 A5 JPWO2023190244 A5 JP WO2023190244A5
- Authority
- JP
- Japan
- Prior art keywords
- recess
- main surface
- circuit board
- metal
- ceramic plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 239000002184 metal Substances 0.000 claims 25
- 239000000919 ceramic Substances 0.000 claims 12
- 238000005219 brazing Methods 0.000 claims 7
- 239000010410 layer Substances 0.000 claims 6
- 239000000463 material Substances 0.000 claims 5
- 238000010030 laminating Methods 0.000 claims 4
- 239000011247 coating layer Substances 0.000 claims 2
- 238000001035 drying Methods 0.000 claims 2
- 238000005304 joining Methods 0.000 claims 2
- 238000004519 manufacturing process Methods 0.000 claims 2
- 238000005192 partition Methods 0.000 claims 2
- 238000002360 preparation method Methods 0.000 claims 2
- 238000013459 approach Methods 0.000 claims 1
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
- 239000000945 filler Substances 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
Claims (10)
前記金属板の前記主面の外縁の少なくとも一部に沿って前記金属板に凹部が形成されており、
前記金属板の側面における前記凹部の端縁に直交し、前記金属板の厚さ方向に沿う断面で見たときに、前記凹部の幅Ｘが０．５ｍｍ以下であり、
前記凹部を構成する前記金属板の壁面の入隅部が前記ろう材層で覆われている、回路基板。 A circuit board comprising a ceramic plate, a metal plate, and a brazing material layer that joins the main surface of the ceramic plate and the main surface of the metal plate,
A recess is formed in the metal plate along at least a part of the outer edge of the main surface of the metal plate,
When viewed in a cross section perpendicular to the edge of the recess on the side surface of the metal plate and along the thickness direction of the metal plate, the width X of the recess is 0. 5 mm or less ,
A circuit board , wherein an inner corner of a wall surface of the metal plate constituting the recess is covered with the brazing material layer .
前記複数の金属板の少なくとも一つに前記凹部が形成されている、請求項１に記載の回路基板。 A ceramic plate, a plurality of metal plates, and a plurality of brazing filler metal layers bonding the main surface of the ceramic plate and the main surface of the plurality of metal plates,
The circuit board according to claim 1, wherein the recess is formed in at least one of the plurality of metal plates.
セラミック板の主面にろう材を塗布及び乾燥して一つ又は複数の塗布層を設ける塗布乾燥工程と、
前記一つ又は複数の塗布層を挟むようにして前記セラミック板と前記一つ又は複数の金属板とを積層して積層体を作製する積層工程と、
前記積層体を加熱して前記セラミック板と前記一つ又は複数の金属板とが一つ又は複数のろう材層で接合された接合体を得る接合工程と、を有し、
前記金属板の側面における前記凹部の端縁に直交し、前記一つ又は複数の金属板の厚さ方向に沿う断面で見たときに、前記凹部の幅Ｘが０．５ｍｍ以下であり、前記凹部を構成する前記金属板の壁面の入隅部が前記ろう材層で覆われており、
前記積層工程において、前記一つ又は複数の金属板の前記一方の主面と前記セラミック板の前記主面とが対向するように前記セラミック板と前記一つ又は複数の金属板とを積層する、回路基板の製造方法。 a preparation step of preparing one or more metal plates in which a recess is formed along at least a part of the outer edge of one main surface;
a coating and drying step of applying and drying a brazing material on the main surface of the ceramic plate to form one or more coating layers;
a laminating step of laminating the ceramic plate and the one or more metal plates so as to sandwich the one or more coating layers to produce a laminate;
a joining step of heating the laminate to obtain a joined body in which the ceramic plate and the one or more metal plates are joined with one or more brazing metal layers,
When viewed in a cross section perpendicular to the edge of the recess on the side surface of the metal plate and along the thickness direction of the one or more metal plates, the width X of the recess is 0. 5 mm or less, and an inner corner of the wall surface of the metal plate constituting the recess is covered with the brazing material layer,
In the laminating step, the ceramic plate and the one or more metal plates are laminated so that the one main surface of the one or more metal plates and the main surface of the ceramic plate face each other. Method of manufacturing circuit boards.
前記積層工程では、前記複数の金属板のそれぞれが、前記セラミック板の前記主面における区画線で画定される区画領域毎に独立して設けられた前記積層体を作製し、
前記接合工程の後に、前記接合体における前記セラミック板を前記区画線に沿って分割する分割工程を有する、請求項８に記載の回路基板の製造方法。 In the preparation step, a plurality of metal plates in which the recesses are formed are prepared,
In the laminating step, the laminated body is manufactured in which each of the plurality of metal plates is provided independently for each partition area defined by a partition line on the main surface of the ceramic plate,
9. The method for manufacturing a circuit board according to claim 8, further comprising a dividing step of dividing the ceramic plate in the joined body along the division line after the joining step.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2022060336 | 2022-03-31 | ||
| PCT/JP2023/011995 WO2023190244A1 (en) | 2022-03-31 | 2023-03-24 | Circuit board and method for manufacturing same, and power module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2023190244A1 JPWO2023190244A1 (en) | 2023-10-05 |
| JPWO2023190244A5 true JPWO2023190244A5 (en) | 2024-03-08 |
Family
ID=88201619
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023550661A Pending JPWO2023190244A1 (en) | 2022-03-31 | 2023-03-24 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPWO2023190244A1 (en) |
| WO (1) | WO2023190244A1 (en) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4926033B2 (en) * | 2007-12-25 | 2012-05-09 | 京セラ株式会社 | Circuit board, package using the same, and electronic device |
| JP5957862B2 (en) * | 2011-12-05 | 2016-07-27 | 三菱マテリアル株式会社 | Power module substrate |
| JP2014086581A (en) * | 2012-10-24 | 2014-05-12 | Nippon Steel & Sumikin Electronics Devices Inc | Package for housing semiconductor element |
| JP2017011216A (en) * | 2015-06-25 | 2017-01-12 | 京セラ株式会社 | Circuit board and electronic device |
| JP2022000871A (en) * | 2018-07-31 | 2022-01-04 | 京セラ株式会社 | Electrical circuit board and power module |
| JP7484268B2 (en) * | 2020-03-18 | 2024-05-16 | 三菱マテリアル株式会社 | METHOD FOR TEMPORARY FIXING OF METAL MEMBER, METHOD FOR MANUFACTURING JOINT BODY, AND METHOD FOR MANUFACTURING INSULATED CIRCUIT BOARD |
-
2023
- 2023-03-24 JP JP2023550661A patent/JPWO2023190244A1/ja active Pending
- 2023-03-24 WO PCT/JP2023/011995 patent/WO2023190244A1/en active Application Filing
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