JPWO2023106249A1 - - Google Patents
Info
- Publication number
- JPWO2023106249A1 JPWO2023106249A1 JP2023566302A JP2023566302A JPWO2023106249A1 JP WO2023106249 A1 JPWO2023106249 A1 JP WO2023106249A1 JP 2023566302 A JP2023566302 A JP 2023566302A JP 2023566302 A JP2023566302 A JP 2023566302A JP WO2023106249 A1 JPWO2023106249 A1 JP WO2023106249A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
- G06G7/18—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals
- G06G7/184—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/48—Analogue computers for specific processes, systems or devices, e.g. simulators
- G06G7/60—Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/017—Adjustment of width or dutycycle of pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Health & Medical Sciences (AREA)
- Biomedical Technology (AREA)
- Mathematical Physics (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- General Physics & Mathematics (AREA)
- General Health & Medical Sciences (AREA)
- Software Systems (AREA)
- Molecular Biology (AREA)
- Evolutionary Computation (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Data Mining & Analysis (AREA)
- Computational Linguistics (AREA)
- Artificial Intelligence (AREA)
- Neurology (AREA)
- Computer Hardware Design (AREA)
- Neurosurgery (AREA)
- Physiology (AREA)
- Nonlinear Science (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021198579 | 2021-12-07 | ||
| JP2021198579 | 2021-12-07 | ||
| PCT/JP2022/044655 WO2023106249A1 (ja) | 2021-12-07 | 2022-12-05 | モジュール回路、及びレザバー回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2023106249A1 true JPWO2023106249A1 (https=) | 2023-06-15 |
| JPWO2023106249A5 JPWO2023106249A5 (https=) | 2024-07-30 |
| JP7659852B2 JP7659852B2 (ja) | 2025-04-10 |
Family
ID=86730344
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023566302A Active JP7659852B2 (ja) | 2021-12-07 | 2022-12-05 | モジュール回路、及びレザバー回路 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US12525968B2 (https=) |
| JP (1) | JP7659852B2 (https=) |
| WO (1) | WO2023106249A1 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2025239025A1 (ja) * | 2024-05-17 | 2025-11-20 | ソニーセミコンダクタソリューションズ株式会社 | 電子回路 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005267105A (ja) * | 2004-03-17 | 2005-09-29 | Canon Inc | 並列パルス信号処理装置、パターン認識装置、及び画像入力装置 |
| US20180211165A1 (en) * | 2017-01-25 | 2018-07-26 | Electronics And Telecommunications Research Institute | Neuromorphic arithmetic device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0390226A1 (en) * | 1984-07-31 | 1990-10-03 | Yamaha Corporation | Jitter absorption circuit |
| US6819190B2 (en) * | 2002-12-10 | 2004-11-16 | Intersil Americas Inc. | Robust fractional clock-based pulse generator for digital pulse width modulator |
| US7271754B2 (en) * | 2005-02-22 | 2007-09-18 | The Regents Of The University Of Colorado, A Body Corporate | Digital pulse-width modulator |
| US10396807B1 (en) * | 2016-02-08 | 2019-08-27 | Auburn University | Multi-ring coupled ring oscillator with improved phase noise |
| US20180191356A1 (en) * | 2017-01-03 | 2018-07-05 | Allegro Microsystems, Llc | Control circuit |
-
2022
- 2022-12-05 US US18/715,699 patent/US12525968B2/en active Active
- 2022-12-05 WO PCT/JP2022/044655 patent/WO2023106249A1/ja not_active Ceased
- 2022-12-05 JP JP2023566302A patent/JP7659852B2/ja active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005267105A (ja) * | 2004-03-17 | 2005-09-29 | Canon Inc | 並列パルス信号処理装置、パターン認識装置、及び画像入力装置 |
| US20180211165A1 (en) * | 2017-01-25 | 2018-07-26 | Electronics And Telecommunications Research Institute | Neuromorphic arithmetic device |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023106249A1 (ja) | 2023-06-15 |
| US20250030412A1 (en) | 2025-01-23 |
| JP7659852B2 (ja) | 2025-04-10 |
| US12525968B2 (en) | 2026-01-13 |
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