JPWO2023105916A1 - - Google Patents
Info
- Publication number
- JPWO2023105916A1 JPWO2023105916A1 JP2023566111A JP2023566111A JPWO2023105916A1 JP WO2023105916 A1 JPWO2023105916 A1 JP WO2023105916A1 JP 2023566111 A JP2023566111 A JP 2023566111A JP 2023566111 A JP2023566111 A JP 2023566111A JP WO2023105916 A1 JPWO2023105916 A1 JP WO2023105916A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
- H04N25/58—Control of the dynamic range involving two or more exposures
- H04N25/581—Control of the dynamic range involving two or more exposures acquired simultaneously
- H04N25/583—Control of the dynamic range involving two or more exposures acquired simultaneously with different integration times
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
- H04N25/46—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/10—Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
- H04N25/11—Arrangement of colour filter arrays [CFA]; Filter mosaics
- H04N25/13—Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements
- H04N25/134—Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements based on three different wavelength filter elements
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021199280 | 2021-12-08 | ||
| PCT/JP2022/038089 WO2023105916A1 (ja) | 2021-12-08 | 2022-10-12 | 固体撮像素子、撮像装置、および、固体撮像素子の制御方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2023105916A1 true JPWO2023105916A1 (https=) | 2023-06-15 |
Family
ID=86730060
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023566111A Pending JPWO2023105916A1 (https=) | 2021-12-08 | 2022-10-12 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US12556834B2 (https=) |
| JP (1) | JPWO2023105916A1 (https=) |
| CN (1) | CN118339849A (https=) |
| DE (1) | DE112022005856T5 (https=) |
| WO (1) | WO2023105916A1 (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2025074766A (ja) * | 2023-10-30 | 2025-05-14 | キヤノン株式会社 | 画像処理装置及び方法、撮像装置、プログラム及び記憶媒体 |
| WO2026034214A1 (ja) * | 2024-08-09 | 2026-02-12 | ソニーセミコンダクタソリューションズ株式会社 | 撮像装置 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7815120B2 (en) * | 2008-12-12 | 2010-10-19 | Symbol Technologies, Inc. | Electronic shutter for a dual-mode imager |
| WO2013100036A1 (ja) * | 2011-12-27 | 2013-07-04 | 富士フイルム株式会社 | カラー撮像素子 |
| TWI576653B (zh) * | 2015-07-31 | 2017-04-01 | 廣達電腦股份有限公司 | 曝光控制系統及其方法 |
| JP2018011162A (ja) * | 2016-07-13 | 2018-01-18 | ソニー株式会社 | 固体撮像素子、撮像装置、および、固体撮像素子の制御方法 |
| US10560629B2 (en) * | 2017-05-23 | 2020-02-11 | Google Llc | Systems and methods for automatic exposure in high dynamic range video capture systems |
| US11778333B2 (en) * | 2019-02-19 | 2023-10-03 | Sony Semiconductor Solutions Corporation | Signal processing method and imaging apparatus |
| JP7374630B2 (ja) | 2019-07-09 | 2023-11-07 | キヤノン株式会社 | 撮像装置及びその駆動方法 |
| WO2021215093A1 (ja) * | 2020-04-21 | 2021-10-28 | ソニーセミコンダクタソリューションズ株式会社 | 固体撮像素子、および、撮像装置 |
| US20240292097A1 (en) * | 2023-02-28 | 2024-08-29 | Comcast Cable Communications, Llc | Systems and methods for camera mode switching |
-
2022
- 2022-10-12 WO PCT/JP2022/038089 patent/WO2023105916A1/ja not_active Ceased
- 2022-10-12 JP JP2023566111A patent/JPWO2023105916A1/ja active Pending
- 2022-10-12 CN CN202280080050.8A patent/CN118339849A/zh active Pending
- 2022-10-12 DE DE112022005856.0T patent/DE112022005856T5/de active Pending
- 2022-10-12 US US18/715,194 patent/US12556834B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| WO2023105916A1 (ja) | 2023-06-15 |
| US20250030959A1 (en) | 2025-01-23 |
| US12556834B2 (en) | 2026-02-17 |
| DE112022005856T5 (de) | 2024-10-10 |
| CN118339849A (zh) | 2024-07-12 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20250821 |