JPWO2023100831A1 - - Google Patents
Info
- Publication number
- JPWO2023100831A1 JPWO2023100831A1 JP2023564980A JP2023564980A JPWO2023100831A1 JP WO2023100831 A1 JPWO2023100831 A1 JP WO2023100831A1 JP 2023564980 A JP2023564980 A JP 2023564980A JP 2023564980 A JP2023564980 A JP 2023564980A JP WO2023100831 A1 JPWO2023100831 A1 JP WO2023100831A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2021193779 | 2021-11-30 | ||
| PCT/JP2022/043849 WO2023100831A1 (en) | 2021-11-30 | 2022-11-29 | Chip periphery peeling apparatus, chip supply apparatus, chip supply system, chip bonding system, pickup apparatus, chip periphery peeling method, chip supply method, chip bonding method, and pickup method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPWO2023100831A1 true JPWO2023100831A1 (en) | 2023-06-08 |
Family
ID=86612265
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2023564980A Pending JPWO2023100831A1 (en) | 2021-11-30 | 2022-11-29 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPWO2023100831A1 (en) |
| TW (1) | TW202341318A (en) |
| WO (1) | WO2023100831A1 (en) |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06302630A (en) * | 1993-04-16 | 1994-10-28 | Sumitomo Electric Ind Ltd | Die bonding method and device thereof |
| JP2000252305A (en) * | 1999-03-02 | 2000-09-14 | Toshiba Corp | Chip mount device |
| JP4128319B2 (en) * | 1999-12-24 | 2008-07-30 | 株式会社新川 | Multi-chip bonding method and apparatus |
| JP4599631B2 (en) * | 2003-05-12 | 2010-12-15 | 株式会社東京精密 | Method and apparatus for dividing plate-like member |
| JP2011216529A (en) * | 2010-03-31 | 2011-10-27 | Furukawa Electric Co Ltd:The | Method for manufacturing semiconductor device |
| JP5648512B2 (en) * | 2011-02-08 | 2015-01-07 | トヨタ自動車株式会社 | Expanding method, expanding device, adhesive sheet |
| JP2020177963A (en) * | 2019-04-16 | 2020-10-29 | 株式会社デンソー | Method for manufacturing semiconductor chip |
| CN114730714A (en) * | 2019-11-21 | 2022-07-08 | 邦德泰克株式会社 | Component mounting system, component supply device, and component mounting method |
-
2022
- 2022-11-29 JP JP2023564980A patent/JPWO2023100831A1/ja active Pending
- 2022-11-29 WO PCT/JP2022/043849 patent/WO2023100831A1/en unknown
- 2022-11-30 TW TW111145840A patent/TW202341318A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| TW202341318A (en) | 2023-10-16 |
| WO2023100831A1 (en) | 2023-06-08 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20240514 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240514 |
|
| A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20240514 |