JPWO2023037490A1 - - Google Patents
Info
- Publication number
- JPWO2023037490A1 JPWO2023037490A1 JP2023546664A JP2023546664A JPWO2023037490A1 JP WO2023037490 A1 JPWO2023037490 A1 JP WO2023037490A1 JP 2023546664 A JP2023546664 A JP 2023546664A JP 2023546664 A JP2023546664 A JP 2023546664A JP WO2023037490 A1 JPWO2023037490 A1 JP WO2023037490A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2015—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline semiconductor material, e.g. lattice adaptation, heteroepitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2021/033281 WO2023037490A1 (ja) | 2021-09-10 | 2021-09-10 | ナノワイヤおよびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPWO2023037490A1 true JPWO2023037490A1 (ko) | 2023-03-16 |
Family
ID=85506168
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2023546664A Pending JPWO2023037490A1 (ko) | 2021-09-10 | 2021-09-10 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPWO2023037490A1 (ko) |
WO (1) | WO2023037490A1 (ko) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5032823B2 (ja) * | 2006-10-20 | 2012-09-26 | 日本電信電話株式会社 | ナノ構造およびナノ構造の作製方法 |
US8084337B2 (en) * | 2007-10-26 | 2011-12-27 | Qunano Ab | Growth of III-V compound semiconductor nanowires on silicon substrates |
GB201200355D0 (en) * | 2012-01-10 | 2012-02-22 | Norwegian Univ Sci & Tech Ntnu | Nanowires |
JP7103027B2 (ja) * | 2018-07-30 | 2022-07-20 | 富士通株式会社 | 化合物半導体装置、化合物半導体装置の製造方法、発電装置及び電源装置 |
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2021
- 2021-09-10 JP JP2023546664A patent/JPWO2023037490A1/ja active Pending
- 2021-09-10 WO PCT/JP2021/033281 patent/WO2023037490A1/ja active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2023037490A1 (ja) | 2023-03-16 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20240216 |