JPWO2021192551A1 - - Google Patents

Info

Publication number
JPWO2021192551A1
JPWO2021192551A1 JP2022509318A JP2022509318A JPWO2021192551A1 JP WO2021192551 A1 JPWO2021192551 A1 JP WO2021192551A1 JP 2022509318 A JP2022509318 A JP 2022509318A JP 2022509318 A JP2022509318 A JP 2022509318A JP WO2021192551 A1 JPWO2021192551 A1 JP WO2021192551A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022509318A
Other versions
JP7272506B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021192551A1 publication Critical patent/JPWO2021192551A1/ja
Application granted granted Critical
Publication of JP7272506B2 publication Critical patent/JP7272506B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241III-V semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02461Phosphides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02463Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02466Antimonides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647Lateral overgrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02505Layer structure consisting of more than two layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)
JP2022509318A 2020-03-25 2021-01-20 半導体層の形成方法 Active JP7272506B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPPCT/JP2020/013237 2020-03-25
PCT/JP2020/013237 WO2021192075A1 (ja) 2020-03-25 2020-03-25 半導体層の形成方法
PCT/JP2021/001837 WO2021192551A1 (ja) 2020-03-25 2021-01-20 半導体層の形成方法

Publications (2)

Publication Number Publication Date
JPWO2021192551A1 true JPWO2021192551A1 (ja) 2021-09-30
JP7272506B2 JP7272506B2 (ja) 2023-05-12

Family

ID=77889995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022509318A Active JP7272506B2 (ja) 2020-03-25 2021-01-20 半導体層の形成方法

Country Status (3)

Country Link
US (1) US11735418B2 (ja)
JP (1) JP7272506B2 (ja)
WO (2) WO2021192075A1 (ja)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0210825A (ja) * 1988-04-05 1990-01-16 Thomson Csf 単結晶半導体材料層及び絶縁材料層の交互層製造方法
JPH10321529A (ja) * 1997-05-22 1998-12-04 Nippon Telegr & Teleph Corp <Ntt> 2層選択成長法
JP2008542183A (ja) * 2005-05-31 2008-11-27 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア 側壁を用いた選択横方向エピタキシャル成長(sleo)法による無極性および半極性iii族窒化物の欠陥低減方法及び装置
JP2016072631A (ja) * 2014-09-26 2016-05-09 クヮンジュ・インスティテュート・オブ・サイエンス・アンド・テクノロジー 高品位窒化物系半導体成長方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8178427B2 (en) * 2009-03-31 2012-05-15 Commissariat A. L'energie Atomique Epitaxial methods for reducing surface dislocation density in semiconductor materials
EP3376525A4 (en) * 2015-11-12 2019-10-23 Sumco Corporation METHOD FOR PRODUCING A GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE AND GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE
US10453683B2 (en) * 2017-03-23 2019-10-22 International Business Machines Corporation Post growth heteroepitaxial layer separation for defect reduction in heteroepitaxial films
WO2021111521A1 (ja) * 2019-12-03 2021-06-10 日本電信電話株式会社 半導体層の形成方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0210825A (ja) * 1988-04-05 1990-01-16 Thomson Csf 単結晶半導体材料層及び絶縁材料層の交互層製造方法
JPH10321529A (ja) * 1997-05-22 1998-12-04 Nippon Telegr & Teleph Corp <Ntt> 2層選択成長法
JP2008542183A (ja) * 2005-05-31 2008-11-27 ザ リージェンツ オブ ザ ユニバーシティ オブ カリフォルニア 側壁を用いた選択横方向エピタキシャル成長(sleo)法による無極性および半極性iii族窒化物の欠陥低減方法及び装置
JP2016072631A (ja) * 2014-09-26 2016-05-09 クヮンジュ・インスティテュート・オブ・サイエンス・アンド・テクノロジー 高品位窒化物系半導体成長方法

Also Published As

Publication number Publication date
JP7272506B2 (ja) 2023-05-12
US20230135654A1 (en) 2023-05-04
WO2021192551A1 (ja) 2021-09-30
WO2021192075A1 (ja) 2021-09-30
US11735418B2 (en) 2023-08-22

Similar Documents

Publication Publication Date Title
BR112023005462A2 (ja)
BR112023012656A2 (ja)
BR112021014123A2 (ja)
BR112022009896A2 (ja)
BR112022024743A2 (ja)
BR112023009656A2 (ja)
BR112023006729A2 (ja)
BR102021018859A2 (ja)
BR102021007058A2 (ja)
BR102020022030A2 (ja)
BR112023011738A2 (ja)
BR112023016292A2 (ja)
BR112023004146A2 (ja)
BR112023011610A2 (ja)
BR112023011539A2 (ja)
BR112023008976A2 (ja)
BR102021020147A2 (ja)
BR102021018926A2 (ja)
BR102021018167A2 (ja)
BR102021017576A2 (ja)
BR102021016837A2 (ja)
BR112021017747A2 (ja)
BR102021012571A2 (ja)
BR102021012230A2 (ja)
BR102021012107A2 (ja)

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220613

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230124

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230307

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230328

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230410

R150 Certificate of patent or registration of utility model

Ref document number: 7272506

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150