JPWO2021176499A1 - - Google Patents

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Publication number
JPWO2021176499A1
JPWO2021176499A1 JP2022504760A JP2022504760A JPWO2021176499A1 JP WO2021176499 A1 JPWO2021176499 A1 JP WO2021176499A1 JP 2022504760 A JP2022504760 A JP 2022504760A JP 2022504760 A JP2022504760 A JP 2022504760A JP WO2021176499 A1 JPWO2021176499 A1 JP WO2021176499A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022504760A
Other languages
Japanese (ja)
Other versions
JP7358614B2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021176499A1 publication Critical patent/JPWO2021176499A1/ja
Application granted granted Critical
Publication of JP7358614B2 publication Critical patent/JP7358614B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2022504760A 2020-03-02 2020-03-02 Wiring formation method Active JP7358614B2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/008621 WO2021176499A1 (en) 2020-03-02 2020-03-02 Method for forming wiring line

Publications (2)

Publication Number Publication Date
JPWO2021176499A1 true JPWO2021176499A1 (en) 2021-09-10
JP7358614B2 JP7358614B2 (en) 2023-10-10

Family

ID=77613970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022504760A Active JP7358614B2 (en) 2020-03-02 2020-03-02 Wiring formation method

Country Status (2)

Country Link
JP (1) JP7358614B2 (en)
WO (1) WO2021176499A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011071417A (en) * 2009-09-28 2011-04-07 Murata Mfg Co Ltd Manufacturing method of wiring substrate
JP2017516295A (en) * 2014-03-25 2017-06-15 ストラタシス リミテッド Method and system for producing a layer crossing pattern

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011071417A (en) * 2009-09-28 2011-04-07 Murata Mfg Co Ltd Manufacturing method of wiring substrate
JP2017516295A (en) * 2014-03-25 2017-06-15 ストラタシス リミテッド Method and system for producing a layer crossing pattern

Also Published As

Publication number Publication date
JP7358614B2 (en) 2023-10-10
WO2021176499A1 (en) 2021-09-10

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