JPWO2021132680A1 - - Google Patents

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Publication number
JPWO2021132680A1
JPWO2021132680A1 JP2021533133A JP2021533133A JPWO2021132680A1 JP WO2021132680 A1 JPWO2021132680 A1 JP WO2021132680A1 JP 2021533133 A JP2021533133 A JP 2021533133A JP 2021533133 A JP2021533133 A JP 2021533133A JP WO2021132680 A1 JPWO2021132680 A1 JP WO2021132680A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2021533133A
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Japanese (ja)
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JP7033237B2 (en
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Publication of JPWO2021132680A1 publication Critical patent/JPWO2021132680A1/ja
Priority to JP2021144135A priority Critical patent/JP7176072B2/en
Priority to JP2021144129A priority patent/JP7256851B2/en
Application granted granted Critical
Publication of JP7033237B2 publication Critical patent/JP7033237B2/en
Active legal-status Critical Current
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00Layered products comprising a layer of synthetic resin
    • B32B27/18Layered products comprising a layer of synthetic resin characterised by the use of special additives
    • B32B27/26Layered products comprising a layer of synthetic resin characterised by the use of special additives using curing agents
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/06Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the heating method
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/10Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the pressing technique, e.g. using action of vacuum or fluid pressure
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/26Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer which influences the bonding during the lamination process, e.g. release layers or pressure equalising layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/06Interconnection of layers permitting easy separation
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08JWORKING-UP; GENERAL PROCESSES OF COMPOUNDING; AFTER-TREATMENT NOT COVERED BY SUBCLASSES C08B, C08C, C08F, C08G or C08H
    • C08J5/00Manufacture of articles or shaped materials containing macromolecular substances
    • C08J5/18Manufacture of films or sheets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/14Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers
    • B32B37/26Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by the properties of the layers with at least one layer which influences the bonding during the lamination process, e.g. release layers or pressure equalising layers
    • B32B2037/268Release layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/14Semiconductor wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Fluid Mechanics (AREA)
  • Materials Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Medicinal Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Organic Chemistry (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Mechanical Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Laminated Bodies (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2021533133A 2019-12-27 2020-12-25 How to manufacture kits and semiconductor chips Active JP7033237B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2021144135A JP7176072B2 (en) 2019-12-27 2021-09-03 Manufacturing method of kit and semiconductor chip
JP2021144129A JP7256851B2 (en) 2019-12-27 2021-09-03 Manufacturing method of kit and semiconductor chip

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2019239012 2019-12-27
JP2019239012 2019-12-27
JP2020031717 2020-02-27
JP2020031717 2020-02-27
PCT/JP2020/049015 WO2021132680A1 (en) 2019-12-27 2020-12-25 Kit and method for manufacturing semiconductor chip

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2021144135A Division JP7176072B2 (en) 2019-12-27 2021-09-03 Manufacturing method of kit and semiconductor chip
JP2021144129A Division JP7256851B2 (en) 2019-12-27 2021-09-03 Manufacturing method of kit and semiconductor chip

Publications (2)

Publication Number Publication Date
JPWO2021132680A1 true JPWO2021132680A1 (en) 2021-07-01
JP7033237B2 JP7033237B2 (en) 2022-03-09

Family

ID=76574525

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2021533133A Active JP7033237B2 (en) 2019-12-27 2020-12-25 How to manufacture kits and semiconductor chips
JP2021567737A Pending JPWO2021132679A1 (en) 2019-12-27 2020-12-25

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2021567737A Pending JPWO2021132679A1 (en) 2019-12-27 2020-12-25

Country Status (5)

Country Link
JP (2) JP7033237B2 (en)
KR (2) KR20220122999A (en)
CN (2) CN114930503A (en)
TW (2) TW202140663A (en)
WO (2) WO2021132680A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023234201A1 (en) * 2022-06-02 2023-12-07 住友ベークライト株式会社 Liquid resin composition and resin-encapsulated power module

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001326299A (en) * 2000-05-18 2001-11-22 Iep Technologies:Kk Semiconductor device and method for manufacturing the same
US20150357256A1 (en) * 2014-06-08 2015-12-10 UTAC Headquarters Pte. Ltd. Semiconductor packages and methods of packaging semiconductor devices
JP2016076694A (en) * 2014-10-02 2016-05-12 住友ベークライト株式会社 Semiconductor device manufacturing method and semiconductor device
WO2017077957A1 (en) * 2015-11-04 2017-05-11 リンテック株式会社 Method for manufacturing semiconductor device
JP2019050261A (en) * 2017-09-08 2019-03-28 株式会社ディスコ Wafer processing method
WO2019098329A1 (en) * 2017-11-17 2019-05-23 リンテック株式会社 Thermosetting resin film, and first protective film-forming sheet
JP2019106420A (en) * 2017-12-11 2019-06-27 日東電工株式会社 Dicing tape-integrated sealing sheet and method of manufacturing semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5380806B2 (en) * 2006-08-31 2014-01-08 日立化成株式会社 Adhesive sheet, integrated sheet, semiconductor device, and method for manufacturing semiconductor device
JP5830250B2 (en) 2011-02-15 2015-12-09 日東電工株式会社 Manufacturing method of semiconductor device
JP6328987B2 (en) * 2014-04-22 2018-05-23 デクセリアルズ株式会社 Manufacturing method of semiconductor device
JP2015092594A (en) 2014-12-10 2015-05-14 日東電工株式会社 Protection layer formation film

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001326299A (en) * 2000-05-18 2001-11-22 Iep Technologies:Kk Semiconductor device and method for manufacturing the same
US20150357256A1 (en) * 2014-06-08 2015-12-10 UTAC Headquarters Pte. Ltd. Semiconductor packages and methods of packaging semiconductor devices
JP2016076694A (en) * 2014-10-02 2016-05-12 住友ベークライト株式会社 Semiconductor device manufacturing method and semiconductor device
WO2017077957A1 (en) * 2015-11-04 2017-05-11 リンテック株式会社 Method for manufacturing semiconductor device
JP2019050261A (en) * 2017-09-08 2019-03-28 株式会社ディスコ Wafer processing method
WO2019098329A1 (en) * 2017-11-17 2019-05-23 リンテック株式会社 Thermosetting resin film, and first protective film-forming sheet
JP2019106420A (en) * 2017-12-11 2019-06-27 日東電工株式会社 Dicing tape-integrated sealing sheet and method of manufacturing semiconductor device

Also Published As

Publication number Publication date
CN114930503A (en) 2022-08-19
JPWO2021132679A1 (en) 2021-07-01
KR20220122999A (en) 2022-09-05
CN114930504A (en) 2022-08-19
WO2021132680A1 (en) 2021-07-01
TW202140641A (en) 2021-11-01
KR20220122998A (en) 2022-09-05
WO2021132679A1 (en) 2021-07-01
JP7033237B2 (en) 2022-03-09
TW202140663A (en) 2021-11-01

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