JPWO2020250381A1 - - Google Patents

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Publication number
JPWO2020250381A1
JPWO2020250381A1 JP2021525507A JP2021525507A JPWO2020250381A1 JP WO2020250381 A1 JPWO2020250381 A1 JP WO2020250381A1 JP 2021525507 A JP2021525507 A JP 2021525507A JP 2021525507 A JP2021525507 A JP 2021525507A JP WO2020250381 A1 JPWO2020250381 A1 JP WO2020250381A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021525507A
Other versions
JP7269341B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication of JPWO2020250381A1 publication Critical patent/JPWO2020250381A1/ja
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Publication of JP7269341B2 publication Critical patent/JP7269341B2/ja
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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0108—Transparent

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP2021525507A 2019-06-13 2019-06-13 多層回路基板及びその製造方法 Active JP7269341B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/023489 WO2020250381A1 (ja) 2019-06-13 2019-06-13 多層回路基板及びその製造方法

Publications (2)

Publication Number Publication Date
JPWO2020250381A1 true JPWO2020250381A1 (ja) 2020-12-17
JP7269341B2 JP7269341B2 (ja) 2023-05-08

Family

ID=73782113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021525507A Active JP7269341B2 (ja) 2019-06-13 2019-06-13 多層回路基板及びその製造方法

Country Status (4)

Country Link
US (1) US20220240378A1 (ja)
EP (1) EP3986093A4 (ja)
JP (1) JP7269341B2 (ja)
WO (1) WO2020250381A1 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023079607A1 (ja) 2021-11-04 2023-05-11 株式会社Fuji 回路形成方法、および回路形成装置
WO2023223562A1 (ja) * 2022-05-20 2023-11-23 株式会社Fuji 製造方法及び製造装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10213895A (ja) * 1997-01-30 1998-08-11 Sony Corp レチクルの合わせ測定用マーク
JP2005072227A (ja) * 2003-08-25 2005-03-17 Matsushita Electric Ind Co Ltd 多層回路板および多層回路板の層間位置ずれ検査方法
JP2013162082A (ja) * 2012-02-08 2013-08-19 Fuji Mach Mfg Co Ltd 部品積層精度測定治具セット及びその使用方法並びに部品実装機の部品積層精度測定装置及び３次元実装基板の生産方法
JP2015135933A (ja) * 2014-01-16 2015-07-27 株式会社ワールドメタル 多層配線板とその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3967935B2 (ja) * 2002-02-25 2007-08-29 株式会社日立製作所 合わせ精度計測装置及びその方法
JP2008016758A (ja) * 2006-07-10 2008-01-24 Adtec Engineeng Co Ltd 多層回路基板製造におけるマーキング装置
WO2012077288A1 (ja) * 2010-12-06 2012-06-14 パナソニック株式会社 多層配線基板および多層配線基板の製造方法
US20150104562A1 (en) * 2013-10-10 2015-04-16 Omega Optics, Inc. Method Of Manufacturing Multilayer Interconnects For Printed Electronic Systems
US9572257B2 (en) * 2014-07-31 2017-02-14 Keysight Technologies, Inc. Multi-layered printed circuit board having core layers including indicia
JP6832630B2 (ja) * 2016-03-28 2021-02-24 富士通インターコネクトテクノロジーズ株式会社 配線基板の製造方法
JP6804718B2 (ja) 2016-07-08 2020-12-23 富士ゼロックス株式会社 ３次元データ生成装置、３次元造形装置、造形物の製造方法及びプログラム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10213895A (ja) * 1997-01-30 1998-08-11 Sony Corp レチクルの合わせ測定用マーク
JP2005072227A (ja) * 2003-08-25 2005-03-17 Matsushita Electric Ind Co Ltd 多層回路板および多層回路板の層間位置ずれ検査方法
JP2013162082A (ja) * 2012-02-08 2013-08-19 Fuji Mach Mfg Co Ltd 部品積層精度測定治具セット及びその使用方法並びに部品実装機の部品積層精度測定装置及び３次元実装基板の生産方法
JP2015135933A (ja) * 2014-01-16 2015-07-27 株式会社ワールドメタル 多層配線板とその製造方法

Also Published As

Publication number Publication date
WO2020250381A1 (ja) 2020-12-17
EP3986093A4 (en) 2022-06-15
US20220240378A1 (en) 2022-07-28
EP3986093A1 (en) 2022-04-20
JP7269341B2 (ja) 2023-05-08

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