JPWO2020204121A1 - - Google Patents

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Publication number
JPWO2020204121A1
JPWO2020204121A1 JP2021512198A JP2021512198A JPWO2020204121A1 JP WO2020204121 A1 JPWO2020204121 A1 JP WO2020204121A1 JP 2021512198 A JP2021512198 A JP 2021512198A JP 2021512198 A JP2021512198 A JP 2021512198A JP WO2020204121 A1 JPWO2020204121 A1 JP WO2020204121A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021512198A
Other languages
Japanese (ja)
Other versions
JP7159456B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2020204121A1 publication Critical patent/JPWO2020204121A1/ja
Application granted granted Critical
Publication of JP7159456B2 publication Critical patent/JP7159456B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP2021512198A 2019-04-02 2020-04-02 基板処理方法及び基板処理装置 Active JP7159456B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019070739 2019-04-02
JP2019070739 2019-04-02
PCT/JP2020/015141 WO2020204121A1 (ja) 2019-04-02 2020-04-02 基板処理方法及び基板処理装置

Publications (2)

Publication Number Publication Date
JPWO2020204121A1 true JPWO2020204121A1 (zh) 2020-10-08
JP7159456B2 JP7159456B2 (ja) 2022-10-24

Family

ID=72668050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021512198A Active JP7159456B2 (ja) 2019-04-02 2020-04-02 基板処理方法及び基板処理装置

Country Status (3)

Country Link
JP (1) JP7159456B2 (zh)
TW (1) TW202105508A (zh)
WO (1) WO2020204121A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001068463A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 半導体集積回路装置の量産方法
JP2001237389A (ja) * 2000-02-24 2001-08-31 Nec Corp 半導体装置の製造方法
JP2006148149A (ja) * 2005-12-15 2006-06-08 Renesas Technology Corp 半導体集積回路装置の量産方法
JP2010278386A (ja) * 2009-06-01 2010-12-09 Renesas Electronics Corp 半導体装置の製造方法
WO2011074601A1 (ja) * 2009-12-17 2011-06-23 昭和電工株式会社 ルテニウム系金属のエッチング用組成物およびその調製方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001068463A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 半導体集積回路装置の量産方法
JP2001237389A (ja) * 2000-02-24 2001-08-31 Nec Corp 半導体装置の製造方法
JP2006148149A (ja) * 2005-12-15 2006-06-08 Renesas Technology Corp 半導体集積回路装置の量産方法
JP2010278386A (ja) * 2009-06-01 2010-12-09 Renesas Electronics Corp 半導体装置の製造方法
WO2011074601A1 (ja) * 2009-12-17 2011-06-23 昭和電工株式会社 ルテニウム系金属のエッチング用組成物およびその調製方法

Also Published As

Publication number Publication date
TW202105508A (zh) 2021-02-01
JP7159456B2 (ja) 2022-10-24
WO2020204121A1 (ja) 2020-10-08

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